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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-pxa.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 - $ref: mmc-controller.yaml#
14 - if:
18 const: marvell,armada-380-sdhci
23 reg-names:
26 - reg-names
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Dsdhci-dove.txt1 * Marvell sdhci-dove controller
3 This file documents differences between the core properties in mmc.txt
4 and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.
6 - compatible: Should be "marvell,dove-sdhci".
11 compatible = "marvell,dove-sdhci";
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
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Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "simple-bus";
27 interrupt-parent = <&intc>;
30 L2: l2-cache {
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Dberlin2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,berlin-smp";
34 next-level-cache = <&l2>;
38 clock-latency = <100000>;
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Dberlin2q.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 #include <dt-bindings/clock/berlin2q.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
12 #address-cells = <1>;
13 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 enable-method = "marvell,berlin-smp";
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Dberlin2cd.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 model = "Marvell Armada 1500-mini (BG2CD) SoC";
17 #address-cells = <1>;
18 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a9";
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/kernel/linux/linux-5.10/arch/arm/mach-mmp/
Dmmp2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/mmp2.c
18 #include <asm/hardware/cache-tauros2.h>
21 #include "addr-map.h"
22 #include "regs-apbc.h"
28 #include "pm-mmp2.h"
137 /* on-chip devices */
138 MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
139 MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
140 MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
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/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-pxav3.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/host.h>
28 #include "sdhci-pltfm.h"
80 dev_err(&pdev->dev, "no mbus dram info\n"); in mv_conf_mbus_windows()
81 return -EINVAL; in mv_conf_mbus_windows()
86 dev_err(&pdev->dev, "cannot get mbus registers\n"); in mv_conf_mbus_windows()
87 return -EINVAL; in mv_conf_mbus_windows()
90 regs = ioremap(res->start, resource_size(res)); in mv_conf_mbus_windows()
92 dev_err(&pdev->dev, "cannot map mbus registers\n"); in mv_conf_mbus_windows()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for MMC/SD host controller drivers
6 obj-$(CONFIG_MMC_ARMMMCI) += armmmci.o
7 armmmci-y := mmci.o
8 armmmci-$(CONFIG_MMC_QCOM_DML) += mmci_qcom_dml.o
9 armmmci-$(CONFIG_MMC_STM32_SDMMC) += mmci_stm32_sdmmc.o
10 obj-$(CONFIG_MMC_PXA) += pxamci.o
11 obj-$(CONFIG_MMC_MXC) += mxcmmc.o
12 obj-$(CONFIG_MMC_MXS) += mxs-mmc.o
13 obj-$(CONFIG_MMC_SDHCI) += sdhci.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
9 bool "MMC host drivers debugging"
10 depends on MMC != n
13 say N here. This enables MMC host driver debugging. And further
34 Qcom SOCs and MMC, you would probably need this option to get DMA working.
85 implements a hardware byte swapper using a 32-bit datum.
107 bool "Ricoh MMC Controller Disabler"
111 This adds a pci quirk to disable Ricoh MMC Controller. This
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