/kernel/linux/linux-5.10/arch/x86/kvm/svm/ |
D | nested.c | 100 kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, hsave->save.cr4, hsave->save.efer, in nested_svm_init_mmu_context() 259 * to avoid TOC/TOU races. For these save area checks in nested_vmcb_check_save() 264 if ((vmcb12->save.efer & EFER_SVME) == 0) in nested_vmcb_check_save() 267 if (((vmcb12->save.cr0 & X86_CR0_CD) == 0) && (vmcb12->save.cr0 & X86_CR0_NW)) in nested_vmcb_check_save() 270 if (!kvm_dr6_valid(vmcb12->save.dr6) || !kvm_dr7_valid(vmcb12->save.dr7)) in nested_vmcb_check_save() 273 vmcb12_lma = (vmcb12->save.efer & EFER_LME) && (vmcb12->save.cr0 & X86_CR0_PG); in nested_vmcb_check_save() 276 if (!(vmcb12->save.cr4 & X86_CR4_PAE) || in nested_vmcb_check_save() 277 !(vmcb12->save.cr0 & X86_CR0_PE) || in nested_vmcb_check_save() 278 (vmcb12->save.cr3 & vcpu->arch.cr3_lm_rsvd_bits)) in nested_vmcb_check_save() 281 if (kvm_valid_cr4(&svm->vcpu, vmcb12->save.cr4)) in nested_vmcb_check_save() [all …]
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D | svm.c | 177 /* enable/disable Next RIP Save */ 303 svm->vmcb->save.efer = efer | EFER_SVME; in svm_set_efer() 376 svm->int3_rip = rip + svm->vmcb->save.cs.base; in svm_queue_exception() 799 svm->vmcb->save.rflags &= ~X86_EFLAGS_TF; in disable_nmi_singlestep() 801 svm->vmcb->save.rflags &= ~X86_EFLAGS_RF; in disable_nmi_singlestep() 1110 struct vmcb_save_area *save = &svm->vmcb->save; in init_vmcb() local 1176 init_seg(&save->es); in init_vmcb() 1177 init_seg(&save->ss); in init_vmcb() 1178 init_seg(&save->ds); in init_vmcb() 1179 init_seg(&save->fs); in init_vmcb() [all …]
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/kernel/linux/linux-5.10/drivers/soc/samsung/ |
D | s3c-pm-debug.c | 49 struct pm_uart_save *save = &uart_save; in s3c_pm_save_uarts() local 51 save->ulcon = __raw_readl(regs + S3C2410_ULCON); in s3c_pm_save_uarts() 52 save->ucon = __raw_readl(regs + S3C2410_UCON); in s3c_pm_save_uarts() 53 save->ufcon = __raw_readl(regs + S3C2410_UFCON); in s3c_pm_save_uarts() 54 save->umcon = __raw_readl(regs + S3C2410_UMCON); in s3c_pm_save_uarts() 55 save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV); in s3c_pm_save_uarts() 58 save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT); in s3c_pm_save_uarts() 61 regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv); in s3c_pm_save_uarts() 67 struct pm_uart_save *save = &uart_save; in s3c_pm_restore_uarts() local 69 s3c_pm_arch_update_uart(regs, save); in s3c_pm_restore_uarts() [all …]
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/kernel/linux/linux-5.10/drivers/pci/ |
D | vc.c | 19 * pci_vc_save_restore_dwords - Save or restore a series of dwords 22 * @buf: buffer to save to or restore from 23 * @dwords: number of dwords to save/restore 24 * @save: whether to save or restore 27 u32 *buf, int dwords, bool save) in pci_vc_save_restore_dwords() argument 32 if (save) in pci_vc_save_restore_dwords() 171 * pci_vc_do_save_buffer - Size, save, or restore VC state 174 * @save_state: buffer for save/restore 175 * @save: if provided a buffer, this indicates what to do with it 177 * Walking Virtual Channel config space to size, save, or restore it [all …]
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/kernel/linux/linux-5.10/tools/testing/selftests/kvm/lib/x86_64/ |
D | svm.c | 76 struct vmcb_save_area *save = &vmcb->save; in generic_svm_setup() local 90 vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr); in generic_svm_setup() 91 vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr); in generic_svm_setup() 92 vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr); in generic_svm_setup() 93 vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr); in generic_svm_setup() 94 vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0); in generic_svm_setup() 95 vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0); in generic_svm_setup() 98 save->cpl = 0; in generic_svm_setup() 99 save->efer = rdmsr(MSR_EFER); in generic_svm_setup() 100 asm volatile ("mov %%cr4, %0" : "=r"(save->cr4) : : "memory"); in generic_svm_setup() [all …]
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/kernel/linux/linux-5.10/arch/powerpc/platforms/cell/spufs/ |
D | spu_save.c | 7 * SPU-side context save sequence outlined in 29 /* Save, Step 2: in save_event_mask() 30 * Read the SPU_RdEventMsk channel and save to the LSCSA. in save_event_mask() 40 /* Save, Step 3: in save_tag_mask() 41 * Read the SPU_RdTagMsk channel and save to the LSCSA. in save_tag_mask() 55 /* Save, Step 7: in save_upper_240kb() 72 /* Save, Step 9: in save_fpcr() 74 * read instruction, and save to the LSCSA. in save_fpcr() 84 /* Save, Step 10: in save_decr() 85 * Read and save the SPU_RdDec channel data to in save_decr() [all …]
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D | switch.c | 17 * save, and then later (optionally) restore the context of a 66 /* Save, Step 1: in acquire_spu_lock() 86 /* Save, Step 2: in check_spu_isolate() 87 * Save, Step 6: in check_spu_isolate() 99 /* Save, Step 3: in disable_interrupts() 101 * Save INT_Mask_class0 in CSA. in disable_interrupts() 103 * Save INT_Mask_class1 in CSA. in disable_interrupts() 105 * Save INT_Mask_class2 in CSA. in disable_interrupts() 136 /* Save, Step 4: in set_watchdog_timer() 139 * maximum allowable time for a context save sequence. in set_watchdog_timer() [all …]
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D | spu_save_crt0.S | 3 * crt0_s.S: Entry function for SPU-side context save. 7 * Entry function for SPU-side of the context save sequence. 23 /* SPU Context Save Step 1: Save the first 16 GPRs. */ 41 /* SPU Context Save, Step 8: Save the remaining 112 GPRs. */ 67 * This is needed so that main has a place to save the
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/kernel/linux/linux-5.10/arch/arm/mach-sa1100/ |
D | pm.c | 15 * Save more value for the resume function! Support 22 * 2002-05-27: Nicolas Pitre Killed sleep.h and the kmalloced save array. 38 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x macro 61 /* save vital registers */ in sa11x0_pm_enter() 62 SAVE(GPDR); in sa11x0_pm_enter() 63 SAVE(GAFR); in sa11x0_pm_enter() 65 SAVE(PPDR); in sa11x0_pm_enter() 66 SAVE(PPSR); in sa11x0_pm_enter() 67 SAVE(PPAR); in sa11x0_pm_enter() 68 SAVE(PSDR); in sa11x0_pm_enter() [all …]
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/kernel/linux/linux-5.10/include/linux/soc/samsung/ |
D | s3c-pm.h | 18 * struct pm_uart_save - save block for core UART 19 * @ulcon: Save value for S3C2410_ULCON 20 * @ucon: Save value for S3C2410_UCON 21 * @ufcon: Save value for S3C2410_UFCON 22 * @umcon: Save value for S3C2410_UMCON 23 * @ubrdiv: Save value for S3C2410_UBRDIV 25 * Save block for UART registers to be held over sleep and restored if they 55 struct pm_uart_save *save); 58 s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save) in s3c_pm_arch_update_uart() argument
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/kernel/linux/linux-5.10/arch/ia64/lib/ |
D | xor.S | 14 .save ar.pfs, r31 16 .save ar.lc, r30 18 .save pr, r29 52 .save ar.pfs, r31 54 .save ar.lc, r30 56 .save pr, r29 93 .save ar.pfs, r31 95 .save ar.lc, r30 97 .save pr, r29 137 .save ar.pfs, r31 [all …]
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/kernel/linux/linux-5.10/arch/x86/kernel/ |
D | ftrace_64.S | 18 /* Save parent and function stack frames (rip and rbp) */ 21 /* No need to save a stack frame */ 25 /* Size of stack used to save mcount regs in save_mcount_regs */ 56 /* Save the original rbp */ 61 * is not set up properly. If fentry is used, we need to save a frame 67 /* Save the parent pointer (skip orig rbp and our return address) */ 71 /* Save the return address (now skip orig rbp, rbp and parent) */ 78 * We add enough stack to save all regs. 90 * Save the original RBP. Even though the mcount ABI does not 115 .macro restore_mcount_regs save=0 argument [all …]
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/kernel/linux/linux-5.10/arch/powerpc/lib/ |
D | test_emulate_step_exec_instr.S | 32 * Save non-volatile GPRs on stack. This includes TOC pointer (GPR2) 44 * Save LR on stack to ensure that the return address is available 51 * Save CR on stack. For simplicity, the entire register is saved 93 * save it to pt_regs. 98 /* Save resulting GPR state to pt_regs */ 106 /* Save resulting LR to pt_regs */ 110 /* Save resulting CR to pt_regs */ 114 /* Save resulting XER to pt_regs */ 118 /* Restore resulting GPR3 from scratch space and save it to pt_regs */
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/kernel/linux/linux-5.10/arch/powerpc/kernel/trace/ |
D | ftrace_64_mprofile.S | 32 * Our job is to save the register state into a struct pt_regs (on the stack) 36 /* Save the original return address in A's stack frame */ 42 /* Save all gprs to pt_regs */ 54 /* Save previous stack pointer (r1) */ 58 /* Load special regs for save below */ 66 /* Save it as pt_regs->nip */ 68 /* Save the read LR in pt_regs->link */ 71 /* Save callee's TOC in the ABI compliant location */ 88 /* Save special regs */ 153 /* Save the original return address in A's stack frame */ [all …]
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/kernel/linux/linux-5.10/arch/sparc/kernel/ |
D | wuf.S | 60 * T == the trap itself has save'd us into this 113 save %g0, %g0, %g0 114 save %g0, %g0, %g0 144 /* Place a pt_regs frame on the kernel stack, save back 157 /* Save current in a global while we change windows. */ 160 save %g0, %g0, %g0 165 mov %fp, %g4 /* Save bogus frame pointer. */ 167 save %g0, %g0, %g0 182 /* Fix users window mask and buffer save count. */ 205 save %g0, %g0, %g0 /* Save to window 'O' */ [all …]
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/kernel/linux/linux-5.10/arch/microblaze/kernel/ |
D | entry.S | 163 /* turn on virtual protected mode save */ 170 /* turn off virtual protected mode save and user mode save*/ 178 swi r2, r1, PT_R2; /* Save SDA */ \ 187 swi r11, r1, PT_R11; /* save clobbered regs after rval */\ 189 swi r13, r1, PT_R13; /* Save SDA2 */ \ 191 swi r15, r1, PT_R15; /* Save LP */ \ 194 swi r18, r1, PT_R18; /* Save asm scratch reg */ \ 207 swi r31, r1, PT_R31; /* Save current task reg */ \ 208 mfs r11, rmsr; /* save MSR */ \ 256 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ [all …]
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/kernel/linux/linux-5.10/arch/arm/vfp/ |
D | vfphw.S | 98 @ On UP, we lazily save the VFP context. As a different 99 @ thread wants ownership of the VFP hardware, save the old 106 DBGSTR1 "save old state %p", r4 109 VFPFSTMIA r4, r5 @ save the working registers 112 tst r1, #FPEXC_EX @ is there additional state to save? 120 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 125 @ need to reload it. No need to save the old state as on SMP, 126 @ we always save the state when we switch away from a thread. 222 @ Save the current VFP state 223 @ r0 - save location [all …]
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/kernel/linux/linux-5.10/arch/sh/kernel/cpu/shmobile/ |
D | sleep.S | 30 /* save mode flags */ 33 /* save original vbr */ 40 /* save return address */ 44 /* save sr */ 48 /* save general purpose registers to stack if needed */ 62 /* make sure bank0 is selected, save low registers */ 71 /* switch to bank 1, save low registers */ 87 /* save sp, also set to internal ram */ 91 /* save stbcr */ 95 /* save mmu and cache context if needed */ [all …]
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/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh3/ |
D | swsusp.S | 90 ! - save registers in swsusp_arch_regs_cpu0 94 sts pr, r0 ! save pr in r0 95 mov r15, r2 ! save sp in r2 96 mov r8, r5 ! save r8 in r5 98 ldc r1, ssr ! save sr in ssr 103 add r3, r15 ! save from top of structure 109 jsr @r1 ! switch to bank1 and save bank1 r7->r0 116 jsr @k1 ! switch to bank0 and save all regs
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/kernel/liteos_m/arch/risc-v/nuclei/gcc/ |
D | los_exc.S | 51 * \brief Macro for context save 53 * This macro save ABI defined caller saved registers in the stack. 55 * - This Macro could use to save context when you enter to interrupt 58 /* Save caller registers */ 128 * \brief Macro for save necessary CSRs to stack 161 * ABI defined caller save register and some CSR registers 169 /* Save the caller saving registers (context) */ 171 /* Save the necessary CSR registers */ 202 * ABI defined caller save register and some CSR registers need 212 /* Save the caller saving registers (context) */ [all …]
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
D | cwsr_trap_handler_gfx8.asm | 68 /* Save */ 93 var s_save_trapsts = ttmp5 //not really used until the end of the SAVE routine 157 …h L_SKIP_RESTORE //NOT restore. might be a regular trap or save 164 …s_getreg_b32 s_save_status, hwreg(HW_REG_STATUS) //save STATUS sinc… 165 … s_save_status, s_save_status, SQ_WAVE_STATUS_SPI_PRIO_MASK //check whether this is for save 167 … s_save_trapsts, s_save_trapsts, SQ_WAVE_TRAPSTS_SAVECTX_MASK //check whether this is for save 168 s_cbranch_scc1 L_SAVE //this is the operation for save 194 /* save routine */ 201 …s_mov_b32 s_save_xnack_mask_lo, xnack_mask_lo //save XNA… 202 …s_mov_b32 s_save_xnack_mask_hi, xnack_mask_hi //save XNACK must before any memory opera… [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
D | pm-common.h | 16 /* sleep save info */ 19 * struct sleep_save - save information for shared peripherals. 20 * @reg: Pointer to the register to save. 24 * other subsystem to save and restore register values over suspend. 34 /* helper functions to save/restore lists of registers. */
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/kernel/linux/linux-5.10/arch/s390/kernel/ |
D | fpu.c | 19 * Limit the save to the FPU/vector registers already in __kernel_fpu_begin() 25 /* Save floating point control */ in __kernel_fpu_begin() 30 /* Save floating-point registers */ in __kernel_fpu_begin() 51 /* Test and save vector registers */ in __kernel_fpu_begin() 57 " la 1,%[vxrs]\n" /* load save area */ in __kernel_fpu_begin() 60 " jo 5f\n" /* -> save V0..V31 */ in __kernel_fpu_begin() 66 " jne 0f\n" /* -> save V8..V23 */ in __kernel_fpu_begin() 69 /* Test and save the first half of 16 vector registers */ in __kernel_fpu_begin() 72 " jo 2f\n" /* 11 -> save V0..V15 */ in __kernel_fpu_begin() 73 " brc 2,1f\n" /* 10 -> save V8..V15 */ in __kernel_fpu_begin() [all …]
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/kernel/linux/linux-5.10/arch/powerpc/kvm/ |
D | tm.S | 20 * Save transactional state and TM-related registers. 54 /* Save CR on the stack - even if r5 == 0 we need to get cr7 back. */ 58 /* Save DSCR so we can restore it to avoid running with user value */ 64 * registers. Save the non-volatile registers on the stack if 98 /* Save away PPR soon so we don't run with user value. */ 115 /* Save all but r0-r2, r9 & r13 */ 123 /* ... now save r13 */ 126 /* ... and save r9 */ 140 /* Save away checkpointed SPRs. */ 153 /* Save FP/VSX. */ [all …]
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/kernel/linux/linux-5.10/arch/ia64/kernel/ |
D | esi_stub.S | 27 * point regs, so at least we don't have to save f2-f127. 71 mov loc2=gp // save global pointer 72 mov loc4=ar.rsc // save RSE configuration 77 mov loc3=psr // save processor status word 89 mov r16=loc3 // save virtual mode psr 90 mov r19=loc5 // save virtual mode bspstore 91 mov r20=loc6 // save virtual mode sp
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