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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/cascadelakex/
D	other.json	11 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 24 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 37 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 50 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 63 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 76 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 89 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 102 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 115 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 128 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… [all …]
D	memory.json	11 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 24 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 37 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 51 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 65 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 79 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 92 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 106 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 120 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 134 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… [all …]
D	cache.json	12 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 26 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 40 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 54 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 78 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 92 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 118 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 132 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 166 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 180 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… [all …]
/kernel/linux/linux-5.10/arch/sparc/include/uapi/asm/
D	ioctls.h	40 #define __TIOCHPCL _IO('t', 2) /* SunOS Specific / 41 #define __TIOCMODG _IOR('t', 3, int) / SunOS Specific / 42 #define __TIOCMODS _IOW('t', 4, int) / SunOS Specific / 43 #define __TIOCGETP _IOR('t', 8, struct sgttyb) / SunOS Specific / 44 #define __TIOCSETP _IOW('t', 9, struct sgttyb) / SunOS Specific / 45 #define __TIOCSETN _IOW('t', 10, struct sgttyb) / SunOS Specific / 48 #define __TIOCFLUSH _IOW('t', 16, int) / SunOS Specific / 49 #define __TIOCSETC _IOW('t', 17, struct tchars) / SunOS Specific / 50 #define __TIOCGETC _IOR('t', 18, struct tchars) / SunOS Specific / 51 #define __TIOCTCNTL _IOW('t', 32, int) / SunOS Specific */ [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/skylakex/
D	memory.json	11 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 24 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 47 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 60 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 73 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 95 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 118 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 141 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 154 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 167 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… [all …]
D	cache.json	11 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 34 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 67 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 112 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 125 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 138 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 194 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 207 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 253 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… 266 …core response can be programmed only with a specific pair of event select and counter MSR, and wit… [all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/
D	x86_init.h	16 * struct x86_init_mpparse - platform specific mpparse ops 17 * @setup_ioapic_ids: platform specific ioapic id override 28 * struct x86_init_resources - platform specific resource related ops 32 * @memory_setup: platform specific memory setup 42 * struct x86_init_irqs - platform specific interrupt setup 59 * struct x86_init_oem - oem platform specific customizing functions 60 * @arch_setup: platform specific architecture setup 61 * @banner: print a platform specific banner 69 * struct x86_init_paging - platform specific paging functions 70 * @pagetable_init: platform specific paging initialization call to setup [all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
D	Kconfig	24 bool "Rockchip specific extensions for Analogix DP driver" 26 This selects support for Rockchip SoC specific extensions 34 This selects support for Rockchip SoC specific extensions 40 bool "Rockchip specific extensions for Synopsys DW HDMI" 42 This selects support for Rockchip SoC specific extensions 48 bool "Rockchip specific extensions for Synopsys DW MIPI DSI" 51 This selects support for Rockchip SoC specific extensions 57 bool "Rockchip specific extensions for Innosilicon HDMI" 59 This selects support for Rockchip SoC specific extensions 84 bool "Rockchip specific extensions for RK3066 HDMI" [all …]
/kernel/linux/linux-5.10/lib/crypto/
D	Kconfig	14 Declares whether the architecture provides an arch-specific 23 fallback, e.g., for SIMD implementations. If no arch specific 33 by either the generic implementation or an arch-specific one, if one 39 Declares whether the architecture provides an arch-specific 49 fallback, e.g., for SIMD implementations. If no arch specific 59 by either the generic implementation or an arch-specific one, if one 65 Declares whether the architecture provides an arch-specific 74 fallback, e.g., for SIMD implementations. If no arch specific 84 fulfilled by either the generic implementation or an arch-specific 100 Declares whether the architecture provides an arch-specific [all …]
/kernel/linux/linux-5.10/Documentation/sh/
D	new-machine.rst	18 of the board-specific code (with the exception of stboards) ended up 19 in arch/sh/kernel/ directly, with board-specific headers ending up in 24 Board-specific code:: 31 \| \| `-- board-specific files 33 \| \| `-- board-specific files 40 \| `-- board-specific headers 42 \| `-- board-specific headers 54 `-- cchip-specific files 57 board-specific headers. Thus, include/asm-sh/hd64461 is home to all of the 58 hd64461-specific headers. [all …]
/kernel/linux/linux-5.10/include/linux/
D	entry-common.h	76 * arch_check_user_regs - Architecture specific sanity check for user mode regs 80 * specific code. 99 * architecture specific code. 116 * Invoked from architecture specific syscall entry code with interrupts 123 * This is invoked when there is extra architecture specific functionality 134 * Invoked from architecture specific syscall entry code with interrupts 136 * architecture specific work. 159 * Invoked from architecture specific syscall entry code with interrupts 176 * Defaults to local_irq_enable(). Can be supplied by architecture specific 191 * Defaults to local_irq_disable(). Can be supplied by architecture specific [all …]
/kernel/linux/linux-5.10/drivers/scsi/ufs/
D	Kconfig	88 This selects the Cadence-specific additions to UFSHCD platform driver. 101 tristate "QCOM specific hooks to UFS controller platform driver" 106 This selects the QCOM specific additions to UFSHCD platform driver. 107 UFS host on QCOM needs some vendor specific configuration before 109 specific registers. 115 tristate "Mediatek specific hooks to UFS controller platform driver" 119 This selects the Mediatek specific additions to UFSHCD platform driver. 120 UFS host on Mediatek needs some vendor specific configuration before 122 specific registers. 129 tristate "Hisilicon specific hooks to UFS controller platform driver" [all …]
/kernel/linux/linux-5.10/include/linux/mtd/
D	platnand.h	41 * @probe: platform specific function to probe/setup hardware 42 * @remove: platform specific function to remove/teardown hardware 43 * @dev_ready: platform specific function to read ready/busy pin 44 * @select_chip: platform specific chip select function 45 * @cmd_ctrl: platform specific function for controlling 47 * @write_buf: platform specific function for write buffer 48 * @read_buf: platform specific function for read buffer 49 * @priv: private data to transport driver specific settings 65 * struct platform_nand_data - container structure for platform-specific data
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwlock/
D	hwlock.txt	`4 Generic bindings that are common to all the hwlock platform specific driver 7 Please also look through the individual platform specific hwlock binding 8 documentations for identifying any additional properties specific to that 16 specific lock. 21 Consumers that require specific hwlock(s) should specify them using the 34 use the hwlock-names to match and get a specific hwlock. 37 1. Example of a node using a single specific hwlock: 49 2. Example of a node using multiple specific hwlocks:`
/kernel/linux/linux-5.10/Documentation/arm/samsung/
D	overview.rst	24 deals with the architecture and drivers specific to these devices. 27 on the implementation details and specific support. 37 - S5PC110 specific default configuration 39 - S5PV210 specific default configuration 46 several platform directories and then the machine specific directories 51 specific information. It contains the base clock, GPIO and device definitions 54 plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs. 56 plat-s5p is for s5p specific builds, and contains common support for the 57 S5P specific systems. Not all S5Ps use all the features in this directory
/kernel/liteos_a/testsuites/unittest/libc/posix/pthread/full/
D	It_posix_pthread_219.cpp	`16 * to endorse or promote products derived from this software without specific prior written 36 VOID *specific; in Testcase() local 39 specific = pthread_getspecific(key); in Testcase() 40 ICUNIT_ASSERT_EQUAL(specific, NULL, specific); in Testcase() 45 specific = pthread_getspecific(key); in Testcase() 46 ICUNIT_ASSERT_EQUAL(specific, NULL, specific); in Testcase()`
/kernel/liteos_a/testsuites/kernel/sample/posix/pthread/full/
D	It_posix_pthread_219.c	`16 * to endorse or promote products derived from this software without specific prior written 43 VOID *specific; in Testcase() local 46 specific = pthread_getspecific(g_key); in Testcase() 47 ICUNIT_ASSERT_EQUAL(specific, NULL, specific); in Testcase() 52 specific = pthread_getspecific(g_key); in Testcase() 53 ICUNIT_ASSERT_EQUAL(specific, NULL, specific); in Testcase()`
/kernel/linux/linux-5.10/drivers/usb/musb/
D	musb_io.h	`19 * @ep_offset: platform specific function to get end point offset 20 * @ep_select: platform specific function to select end point 21 * @fifo_offset: platform specific function to get fifo offset 22 * @read_fifo: platform specific function to read fifo 23 * @write_fifo: platform specific function to write fifo 24 * @busctl_offset: platform specific function to get busctl offset 25 * @get_toggle: platform specific function to get toggle 26 * @set_toggle: platform specific function to set toggle`
/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
D	core_feature_eclic.h	15 * See the License for the specific language governing permissions and 162 * - Interrupt ID(IRQn) start from 19 represent device-specific external interrupts. 163 * - The first device-specific interrupt has the IRQn value 19. 173 /* ========= Nuclei N/NX Core Specific Interrupt Numbers =========== / 195 / ========= Device Specific Interrupt Numbers =================== / 196 / ToDo: add here your device specific external interrupt numbers. 201 FirstDeviceSpecificInterrupt_IRQn = 19, /!< First Device Specific Interrupt / 356 * \brief Enable a specific interrupt 358 * This function enables the specific interrupt \em IRQn. 371 * \brief Get a specific interrupt enable status [all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
D	exynos-dw-mshc.txt	`1 * Samsung Exynos specific extensions to the Synopsys Designware Mobile 7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific 14 specific extensions. 16 specific extensions. 18 specific extensions. 20 specific extensions. 22 specific extensions. 24 specific extensions having an SMU. 69 The MSHC controller node can be split into two portions, SoC specific and 70 board specific portions as listed below.`
/kernel/linux/linux-5.10/drivers/staging/vc04_services/vchiq-mmal/
D	mmal-msg-format.h	`61 u32 encoding_variant; /* FourCC specifying the specific 66 union mmal_es_specific_format es; / Type specific 76 u32 extradata_size; /* Size of the codec specific data / 77 u8 extradata; /* Codec specific data / 87 u32 encoding_variant; / FourCC specifying the specific 92 u32 es; /* Type specific 102 u32 extradata_size; /* Size of the codec specific data / 103 u32 extradata; / Codec specific data */`
/kernel/linux/linux-5.10/Documentation/hwmon/
D	pmbus-core.rst	29 device specific extensions in addition to the core PMBus driver, since it is 30 simply unknown what new device specific functionality PMBus device developers 33 To make device specific extensions as scalable as possible, and to avoid having 35 split into core, generic, and device specific code. The core code (in 37 provides support for generic PMBus devices. Device specific code is responsible 38 for device specific initialization and, if needed, maps device specific 52 For this reason, it often makes sense to provide a device specific driver if not 65 The API between core and device specific PMBus code is defined in 84 than 0xff). Support for virtual PMBus commands is device specific and thus has 85 to be implemented in device specific code. [all …]
/kernel/linux/linux-5.10/drivers/pci/controller/dwc/
D	Kconfig	34 host-specific features PCI_DRA7XX_HOST must be selected and in order 35 to enable device-specific features PCI_DRA7XX_EP must be selected. 49 host-specific features PCI_DRA7XX_HOST must be selected and in order 50 to enable device-specific features PCI_DRA7XX_EP must be selected. 66 host-specific features PCIE_DW_PLAT_HOST must be selected and in 67 order to enable device-specific features PCI_DW_PLAT_EP must be 81 host-specific features PCIE_DW_PLAT_HOST must be selected and in 82 order to enable device-specific features PCI_DW_PLAT_EP must be 174 PCIe controller uses the DesignWare core plus Qualcomm-specific 219 The PCIe controller uses the DesignWare core plus Intel-specific [all …]
/kernel/linux/linux-5.10/include/uapi/linux/
D	chio.h	14 #define CHET_V1 4 /* vendor specific #1 / 15 #define CHET_V2 5 / vendor specific #2 / 16 #define CHET_V3 6 / vendor specific #3 / 17 #define CHET_V4 7 / vendor specific #4 / 25 query vendor-specific element types 40 int cvp_n1; /* number of vendor specific elems (CHET_V1) / 42 int cvp_n2; / number of vendor specific elems (CHET_V2) / 44 int cvp_n3; / number of vendor specific elems (CHET_V3) / 46 int cvp_n4; / number of vendor specific elems (CHET_V4) / 87 move the transport element (robot arm) to a specific element. [all …]
/kernel/linux/linux-5.10/drivers/thunderbolt/
D	nhi.h	`34 * struct tb_nhi_ops - NHI specific optional operations 35 * @init: NHI specific initialization 36 * @suspend_noirq: NHI specific suspend_noirq hook 37 * @resume_noirq: NHI specific resume_noirq hook 38 * @runtime_suspend: NHI specific runtime_suspend hook 39 * @runtime_resume: NHI specific runtime_resume hook 40 * @shutdown: NHI specific shutdown`

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