Searched +full:stm32f4 +full:- +full:adc +full:- +full:core (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"7 title: STMicroelectronics STM32 ADC bindings10 STM32 ADC is a successive approximation analog-to-digital converter.12 in single, continuous, scan or discontinuous mode. Result of the ADC is13 stored in a left-aligned or right-aligned 32-bit data register.17 voltage goes beyond the user-defined, higher or lower thresholds.19 Each STM32 ADC block can have up to 3 ADC instances.[all …]
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>4 * This file is dual-licensed: you can use it either under the terms22 * MA 02110-1301 USA48 #include "armv7-m.dtsi"49 #include <dt-bindings/clock/stm32fx-clock.h>50 #include <dt-bindings/mfd/stm32f4-rcc.h>53 #address-cells = <1>;54 #size-cells = <1>;57 clk_hse: clk-hse {58 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * This file is part of STM32 ADC driver5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved8 * Inspired from: fsl-imx25-tsadc25 #include "stm32-adc-core.h"41 * struct stm32_adc_common_regs - stm32 common registers46 * @ier: interrupt enable register offset for each adc61 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data77 * struct stm32_adc_priv - stm32 ADC core private data78 * @irq: irq(s) for ADC block[all …]
1 // SPDX-License-Identifier: GPL-2.03 * This file is part of STM32 ADC driver5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved11 #include <linux/dma-mapping.h>15 #include <linux/iio/timer/stm32-lptim-trigger.h>16 #include <linux/iio/timer/stm32-timer-trigger.h>29 #include "stm32-adc-core.h"34 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */55 /* extsel - trigger mux selection value */81 * struct stm32_adc_trig_info - ADC trigger info[all …]