1 /* $FreeBSD: releng/12.2/sys/dev/usb/controller/ehci.h 326255 2017-11-27 14:52:40Z pfg $ */
2 /*-
3 * SPDX-License-Identifier: BSD-2-Clause-NetBSD
4 *
5 * Copyright (c) 2001 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net).
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _EHCI_H_
34 #define _EHCI_H_
35
36 #include <sys/endian.h>
37
38 #define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
39
40 /*
41 * Alignment NOTE: structures must be aligned so that the hardware can index
42 * without performing addition.
43 */
44 #define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */
45 #define EHCI_FRAMELIST_COUNT 1024 /* units */
46 #define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */
47
48 #if ((8 * EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER)
49 #error "maximum number of high-speed isochronous frames is higher than supported!"
50 #endif
51
52 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
53 #error "maximum number of full-speed isochronous frames is higher than supported!"
54 #endif
55
56 /* Link types */
57 #define EHCI_LINK_TERMINATE 0x00000001
58 #define EHCI_LINK_TYPE(x) ((x) & 0x00000006)
59 #define EHCI_LINK_ITD 0x0
60 #define EHCI_LINK_QH 0x2
61 #define EHCI_LINK_SITD 0x4
62 #define EHCI_LINK_FSTN 0x6
63 #define EHCI_LINK_ADDR(x) ((x) &~ 0x1f)
64
65 /* Structures alignment (bytes) */
66 #define EHCI_ITD_ALIGN 128
67 #define EHCI_SITD_ALIGN 64
68 #define EHCI_QTD_ALIGN 64
69 #define EHCI_QH_ALIGN 128
70 #define EHCI_FSTN_ALIGN 32
71 /* Data buffers are divided into one or more pages */
72 #define EHCI_PAGE_SIZE 0x1000
73 #if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \
74 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \
75 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \
76 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \
77 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \
78 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0))
79 #error "Invalid USB page size!"
80 #endif
81
82
83 /*
84 * Isochronous Transfer Descriptor. This descriptor is used for high speed
85 * transfers only.
86 */
87 struct ehci_itd {
88 volatile uint32_t itd_next;
89 volatile uint32_t itd_status[8];
90 #define EHCI_ITD_SET_LEN(x) ((x) << 16)
91 #define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF)
92 #define EHCI_ITD_IOC (1 << 15)
93 #define EHCI_ITD_SET_PG(x) ((x) << 12)
94 #define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7)
95 #define EHCI_ITD_SET_OFFS(x) (x)
96 #define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF)
97 #define EHCI_ITD_ACTIVE (1U << 31)
98 #define EHCI_ITD_DATABUFERR (1 << 30)
99 #define EHCI_ITD_BABBLE (1 << 29)
100 #define EHCI_ITD_XACTERR (1 << 28)
101
102 #define EHCI_ITD_BP_MAX 7
103 volatile uint32_t itd_bp[EHCI_ITD_BP_MAX];
104 /* itd_bp[0] */
105 #define EHCI_ITD_SET_ADDR(x) (x)
106 #define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F)
107 #define EHCI_ITD_SET_ENDPT(x) ((x) << 8)
108 #define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF)
109 /* itd_bp[1] */
110 #define EHCI_ITD_SET_DIR_IN (1 << 11)
111 #define EHCI_ITD_SET_DIR_OUT (0 << 11)
112 #define EHCI_ITD_SET_MPL(x) (x)
113 #define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF)
114 volatile uint32_t itd_bp_hi[EHCI_ITD_BP_MAX];
115 /*
116 * Extra information needed:
117 */
118 uint32_t itd_self;
119 struct ehci_itd *next;
120 struct ehci_itd *prev;
121 struct ehci_itd *obj_next;
122 struct usb_page_cache *page_cache;
123 } __aligned(EHCI_ITD_ALIGN);
124
125 typedef struct ehci_itd ehci_itd_t;
126
127 /*
128 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used
129 * for full speed transfers only.
130 */
131 struct ehci_sitd {
132 volatile uint32_t sitd_next;
133 volatile uint32_t sitd_portaddr;
134 #define EHCI_SITD_SET_DIR_OUT (0 << 31)
135 #define EHCI_SITD_SET_DIR_IN (1U << 31)
136 #define EHCI_SITD_SET_ADDR(x) (x)
137 #define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F)
138 #define EHCI_SITD_SET_ENDPT(x) ((x) << 8)
139 #define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF)
140 #define EHCI_SITD_GET_DIR(x) ((x) >> 31)
141 #define EHCI_SITD_SET_PORT(x) ((x) << 24)
142 #define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F)
143 #define EHCI_SITD_SET_HUBA(x) ((x) << 16)
144 #define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F)
145 volatile uint32_t sitd_mask;
146 #define EHCI_SITD_SET_SMASK(x) (x)
147 #define EHCI_SITD_SET_CMASK(x) ((x) << 8)
148 volatile uint32_t sitd_status;
149 #define EHCI_SITD_COMPLETE_SPLIT (1<<1)
150 #define EHCI_SITD_START_SPLIT (0<<1)
151 #define EHCI_SITD_MISSED_MICRO_FRAME (1<<2)
152 #define EHCI_SITD_XACTERR (1<<3)
153 #define EHCI_SITD_BABBLE (1<<4)
154 #define EHCI_SITD_DATABUFERR (1<<5)
155 #define EHCI_SITD_ERROR (1<<6)
156 #define EHCI_SITD_ACTIVE (1<<7)
157 #define EHCI_SITD_IOC (1U<<31)
158 #define EHCI_SITD_SET_LEN(len) ((len)<<16)
159 #define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF)
160 volatile uint32_t sitd_bp[2];
161 volatile uint32_t sitd_back;
162 volatile uint32_t sitd_bp_hi[2];
163 /*
164 * Extra information needed:
165 */
166 uint32_t sitd_self;
167 struct ehci_sitd *next;
168 struct ehci_sitd *prev;
169 struct ehci_sitd *obj_next;
170 struct usb_page_cache *page_cache;
171 } __aligned(EHCI_SITD_ALIGN);
172
173 typedef struct ehci_sitd ehci_sitd_t;
174
175 /* Queue Element Transfer Descriptor */
176 struct ehci_qtd {
177 volatile uint32_t qtd_next;
178 volatile uint32_t qtd_altnext;
179 volatile uint32_t qtd_status;
180 #define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff)
181 #define EHCI_QTD_SET_STATUS(x) ((x) << 0)
182 #define EHCI_QTD_ACTIVE 0x80
183 #define EHCI_QTD_HALTED 0x40
184 #define EHCI_QTD_BUFERR 0x20
185 #define EHCI_QTD_BABBLE 0x10
186 #define EHCI_QTD_XACTERR 0x08
187 #define EHCI_QTD_MISSEDMICRO 0x04
188 #define EHCI_QTD_SPLITXSTATE 0x02
189 #define EHCI_QTD_PINGSTATE 0x01
190 #define EHCI_QTD_STATERRS 0x74
191 #define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3)
192 #define EHCI_QTD_SET_PID(x) ((x) << 8)
193 #define EHCI_QTD_PID_OUT 0x0
194 #define EHCI_QTD_PID_IN 0x1
195 #define EHCI_QTD_PID_SETUP 0x2
196 #define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3)
197 #define EHCI_QTD_SET_CERR(x) ((x) << 10)
198 #define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7)
199 #define EHCI_QTD_SET_C_PAGE(x) ((x) << 12)
200 #define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1)
201 #define EHCI_QTD_IOC 0x00008000
202 #define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff)
203 #define EHCI_QTD_SET_BYTES(x) ((x) << 16)
204 #define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1)
205 #define EHCI_QTD_SET_TOGGLE(x) ((x) << 31)
206 #define EHCI_QTD_TOGGLE_MASK 0x80000000
207 #define EHCI_QTD_NBUFFERS 5
208 #define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE)
209 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
210 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
211 /*
212 * Extra information needed:
213 */
214 struct ehci_qtd *alt_next;
215 struct ehci_qtd *obj_next;
216 struct usb_page_cache *page_cache;
217 uint32_t qtd_self;
218 uint16_t len;
219 } __aligned(EHCI_QTD_ALIGN);
220
221 typedef struct ehci_qtd ehci_qtd_t;
222
223 /* Queue Head Sub Structure */
224 struct ehci_qh_sub {
225 volatile uint32_t qtd_next;
226 volatile uint32_t qtd_altnext;
227 volatile uint32_t qtd_status;
228 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
229 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
230 } __aligned(4);
231
232 /* Queue Head */
233 struct ehci_qh {
234 volatile uint32_t qh_link;
235 volatile uint32_t qh_endp;
236 #define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */
237 #define EHCI_QH_SET_ADDR(x) (x)
238 #define EHCI_QH_ADDRMASK 0x0000007f
239 #define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */
240 #define EHCI_QH_INACT 0x00000080
241 #define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */
242 #define EHCI_QH_SET_ENDPT(x) ((x) << 8)
243 #define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */
244 #define EHCI_QH_SET_EPS(x) ((x) << 12)
245 #define EHCI_QH_SPEED_FULL 0x0
246 #define EHCI_QH_SPEED_LOW 0x1
247 #define EHCI_QH_SPEED_HIGH 0x2
248 #define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */
249 #define EHCI_QH_DTC 0x00004000
250 #define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */
251 #define EHCI_QH_HRECL 0x00008000
252 #define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */
253 #define EHCI_QH_SET_MPL(x) ((x) << 16)
254 #define EHCI_QH_MPLMASK 0x07ff0000
255 #define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */
256 #define EHCI_QH_CTL 0x08000000
257 #define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */
258 #define EHCI_QH_SET_NRL(x) ((x) << 28)
259 volatile uint32_t qh_endphub;
260 #define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */
261 #define EHCI_QH_SET_SMASK(x) ((x) << 0)
262 #define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */
263 #define EHCI_QH_SET_CMASK(x) ((x) << 8)
264 #define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */
265 #define EHCI_QH_SET_HUBA(x) ((x) << 16)
266 #define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */
267 #define EHCI_QH_SET_PORT(x) ((x) << 23)
268 #define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */
269 #define EHCI_QH_SET_MULT(x) ((x) << 30)
270 volatile uint32_t qh_curqtd;
271 struct ehci_qh_sub qh_qtd;
272 /*
273 * Extra information needed:
274 */
275 struct ehci_qh *next;
276 struct ehci_qh *prev;
277 struct ehci_qh *obj_next;
278 struct usb_page_cache *page_cache;
279 uint32_t qh_self;
280 } __aligned(EHCI_QH_ALIGN);
281
282 typedef struct ehci_qh ehci_qh_t;
283
284 /* Periodic Frame Span Traversal Node */
285 struct ehci_fstn {
286 volatile uint32_t fstn_link;
287 volatile uint32_t fstn_back;
288 } __aligned(EHCI_FSTN_ALIGN);
289
290 typedef struct ehci_fstn ehci_fstn_t;
291
292 struct ehci_hw_softc {
293 struct usb_page_cache pframes_pc;
294 struct usb_page_cache terminate_pc;
295 struct usb_page_cache async_start_pc;
296 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
297 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
298 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
299
300 struct usb_page pframes_pg;
301 struct usb_page terminate_pg;
302 struct usb_page async_start_pg;
303 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
304 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
305 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
306 };
307
308 struct ehci_config_desc {
309 struct usb_config_descriptor confd;
310 struct usb_interface_descriptor ifcd;
311 struct usb_endpoint_descriptor endpd;
312 } __packed;
313
314 union ehci_hub_desc {
315 struct usb_status stat;
316 struct usb_port_status ps;
317 struct usb_hub_descriptor hubd;
318 uint8_t temp[128];
319 };
320
321 typedef struct ehci_softc {
322 struct ehci_hw_softc sc_hw;
323 struct usb_bus sc_bus; /* base device */
324 struct callout sc_tmo_pcd;
325 struct callout sc_tmo_poll;
326 union ehci_hub_desc sc_hub_desc;
327
328 struct usb_device *sc_devices[EHCI_MAX_DEVICES];
329 struct resource *sc_io_res;
330 struct resource *sc_irq_res;
331 struct ehci_qh *sc_async_p_last;
332 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
333 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
334 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
335 void *sc_intr_hdl;
336 bus_size_t sc_io_size;
337 bus_space_tag_t sc_io_tag;
338 bus_space_handle_t sc_io_hdl;
339
340 uint32_t sc_terminate_self; /* TD short packet termination pointer */
341 uint32_t sc_eintrs; /* Interrupt mask */
342
343 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT];
344 uint16_t sc_id_vendor; /* vendor ID for root hub */
345 uint16_t sc_flags; /* chip specific flags */
346 #define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */
347 #define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */
348 #define EHCI_SCFLG_TT 0x0020 /* transaction translator present */
349 #define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */
350 #define EHCI_SCFLG_IAADBUG 0x0080 /* workaround for nVidia chipsets */
351 #define EHCI_SCFLG_DONTRESET 0x0100 /* don't reset ctrl. in ehci_init() */
352 #define EHCI_SCFLG_DONEINIT 0x1000 /* ehci_init() has been called. */
353
354 uint8_t sc_offs; /* offset to operational registers */
355 uint8_t sc_doorbell_disable; /* set on doorbell failure */
356 uint8_t sc_noport;
357 uint8_t sc_addr; /* device address */
358 uint8_t sc_conf; /* device configuration */
359 uint8_t sc_isreset;
360 uint8_t sc_hub_idata[8];
361
362 char sc_vendor[16]; /* vendor string for root hub */
363
364 void (*sc_vendor_post_reset)(struct ehci_softc *sc);
365 uint16_t (*sc_vendor_get_port_speed)(struct ehci_softc *sc, uint16_t index);
366 } ehci_softc_t;
367
368 #define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
369 #define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
370 #define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
371 #define EWRITE1(sc, a, x) \
372 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
373 #define EWRITE2(sc, a, x) \
374 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
375 #define EWRITE4(sc, a, x) \
376 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
377 #define EOREAD1(sc, a) \
378 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
379 #define EOREAD2(sc, a) \
380 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
381 #define EOREAD4(sc, a) \
382 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
383 #define EOWRITE1(sc, a, x) \
384 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
385 #define EOWRITE2(sc, a, x) \
386 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
387 #define EOWRITE4(sc, a, x) \
388 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
389
390 #ifdef USB_EHCI_BIG_ENDIAN_DESC
391 /*
392 * Handle byte order conversion between host and ``host controller''.
393 * Typically the latter is little-endian but some controllers require
394 * big-endian in which case we may need to manually swap.
395 */
396 static __inline uint32_t
htohc32(const struct ehci_softc * sc,const uint32_t v)397 htohc32(const struct ehci_softc *sc, const uint32_t v)
398 {
399 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v);
400 }
401
402 static __inline uint16_t
htohc16(const struct ehci_softc * sc,const uint16_t v)403 htohc16(const struct ehci_softc *sc, const uint16_t v)
404 {
405 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v);
406 }
407
408 static __inline uint32_t
hc32toh(const struct ehci_softc * sc,const uint32_t v)409 hc32toh(const struct ehci_softc *sc, const uint32_t v)
410 {
411 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v);
412 }
413
414 static __inline uint16_t
hc16toh(const struct ehci_softc * sc,const uint16_t v)415 hc16toh(const struct ehci_softc *sc, const uint16_t v)
416 {
417 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v);
418 }
419 #else
420 /*
421 * Normal little-endian only conversion routines.
422 */
423 static __inline uint32_t
htohc32(const struct ehci_softc * sc,const uint32_t v)424 htohc32(const struct ehci_softc *sc, const uint32_t v)
425 {
426 return htole32(v);
427 }
428
429 static __inline uint16_t
htohc16(const struct ehci_softc * sc,const uint16_t v)430 htohc16(const struct ehci_softc *sc, const uint16_t v)
431 {
432 return htole16(v);
433 }
434
435 static __inline uint32_t
hc32toh(const struct ehci_softc * sc,const uint32_t v)436 hc32toh(const struct ehci_softc *sc, const uint32_t v)
437 {
438 return le32toh(v);
439 }
440
441 static __inline uint16_t
hc16toh(const struct ehci_softc * sc,const uint16_t v)442 hc16toh(const struct ehci_softc *sc, const uint16_t v)
443 {
444 return le16toh(v);
445 }
446 #endif
447
448 usb_bus_mem_cb_t ehci_iterate_hw_softc;
449
450 usb_error_t ehci_reset(ehci_softc_t *sc);
451 usb_error_t ehci_init(ehci_softc_t *sc);
452 void ehci_detach(struct ehci_softc *sc);
453 void ehci_interrupt(unsigned int irq, ehci_softc_t *sc);
454 uint16_t ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index);
455 uint16_t ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index);
456
457 #endif /* _EHCI_H_ */
458