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1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PARAVIRT_TYPES_H
3 #define _ASM_X86_PARAVIRT_TYPES_H
4 
5 /* Bitmask of what can be clobbered: usually at least eax. */
6 #define CLBR_NONE 0
7 #define CLBR_EAX  (1 << 0)
8 #define CLBR_ECX  (1 << 1)
9 #define CLBR_EDX  (1 << 2)
10 #define CLBR_EDI  (1 << 3)
11 
12 #ifdef CONFIG_X86_32
13 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
14 #define CLBR_ANY  ((1 << 4) - 1)
15 
16 #define CLBR_ARG_REGS	(CLBR_EAX | CLBR_EDX | CLBR_ECX)
17 #define CLBR_RET_REG	(CLBR_EAX | CLBR_EDX)
18 #define CLBR_SCRATCH	(0)
19 #else
20 #define CLBR_RAX  CLBR_EAX
21 #define CLBR_RCX  CLBR_ECX
22 #define CLBR_RDX  CLBR_EDX
23 #define CLBR_RDI  CLBR_EDI
24 #define CLBR_RSI  (1 << 4)
25 #define CLBR_R8   (1 << 5)
26 #define CLBR_R9   (1 << 6)
27 #define CLBR_R10  (1 << 7)
28 #define CLBR_R11  (1 << 8)
29 
30 #define CLBR_ANY  ((1 << 9) - 1)
31 
32 #define CLBR_ARG_REGS	(CLBR_RDI | CLBR_RSI | CLBR_RDX | \
33 			 CLBR_RCX | CLBR_R8 | CLBR_R9)
34 #define CLBR_RET_REG	(CLBR_RAX)
35 #define CLBR_SCRATCH	(CLBR_R10 | CLBR_R11)
36 
37 #endif /* X86_64 */
38 
39 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
40 
41 #ifndef __ASSEMBLY__
42 
43 #include <asm/desc_defs.h>
44 #include <asm/kmap_types.h>
45 #include <asm/pgtable_types.h>
46 #include <asm/nospec-branch.h>
47 
48 struct page;
49 struct thread_struct;
50 struct desc_ptr;
51 struct tss_struct;
52 struct mm_struct;
53 struct desc_struct;
54 struct task_struct;
55 struct cpumask;
56 struct flush_tlb_info;
57 struct mmu_gather;
58 struct vm_area_struct;
59 
60 /*
61  * Wrapper type for pointers to code which uses the non-standard
62  * calling convention.  See PV_CALL_SAVE_REGS_THUNK below.
63  */
64 struct paravirt_callee_save {
65 	void *func;
66 };
67 
68 /* general info */
69 struct pv_info {
70 #ifdef CONFIG_PARAVIRT_XXL
71 	u16 extra_user_64bit_cs;  /* __USER_CS if none */
72 #endif
73 
74 	const char *name;
75 };
76 
77 struct pv_init_ops {
78 	/*
79 	 * Patch may replace one of the defined code sequences with
80 	 * arbitrary code, subject to the same register constraints.
81 	 * This generally means the code is not free to clobber any
82 	 * registers other than EAX.  The patch function should return
83 	 * the number of bytes of code generated, as we nop pad the
84 	 * rest in generic code.
85 	 */
86 	unsigned (*patch)(u8 type, void *insn_buff,
87 			  unsigned long addr, unsigned len);
88 } __no_randomize_layout;
89 
90 #ifdef CONFIG_PARAVIRT_XXL
91 struct pv_lazy_ops {
92 	/* Set deferred update mode, used for batching operations. */
93 	void (*enter)(void);
94 	void (*leave)(void);
95 	void (*flush)(void);
96 } __no_randomize_layout;
97 #endif
98 
99 struct pv_time_ops {
100 	unsigned long long (*sched_clock)(void);
101 	unsigned long long (*steal_clock)(int cpu);
102 } __no_randomize_layout;
103 
104 struct pv_cpu_ops {
105 	/* hooks for various privileged instructions */
106 	void (*io_delay)(void);
107 
108 #ifdef CONFIG_PARAVIRT_XXL
109 	unsigned long (*get_debugreg)(int regno);
110 	void (*set_debugreg)(int regno, unsigned long value);
111 
112 	unsigned long (*read_cr0)(void);
113 	void (*write_cr0)(unsigned long);
114 
115 	void (*write_cr4)(unsigned long);
116 
117 	/* Segment descriptor handling */
118 	void (*load_tr_desc)(void);
119 	void (*load_gdt)(const struct desc_ptr *);
120 	void (*load_idt)(const struct desc_ptr *);
121 	void (*set_ldt)(const void *desc, unsigned entries);
122 	unsigned long (*store_tr)(void);
123 	void (*load_tls)(struct thread_struct *t, unsigned int cpu);
124 	void (*load_gs_index)(unsigned int idx);
125 	void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
126 				const void *desc);
127 	void (*write_gdt_entry)(struct desc_struct *,
128 				int entrynum, const void *desc, int size);
129 	void (*write_idt_entry)(gate_desc *,
130 				int entrynum, const gate_desc *gate);
131 	void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
132 	void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
133 
134 	void (*load_sp0)(unsigned long sp0);
135 
136 #ifdef CONFIG_X86_IOPL_IOPERM
137 	void (*invalidate_io_bitmap)(void);
138 	void (*update_io_bitmap)(void);
139 #endif
140 
141 	void (*wbinvd)(void);
142 
143 	/* cpuid emulation, mostly so that caps bits can be disabled */
144 	void (*cpuid)(unsigned int *eax, unsigned int *ebx,
145 		      unsigned int *ecx, unsigned int *edx);
146 
147 	/* Unsafe MSR operations.  These will warn or panic on failure. */
148 	u64 (*read_msr)(unsigned int msr);
149 	void (*write_msr)(unsigned int msr, unsigned low, unsigned high);
150 
151 	/*
152 	 * Safe MSR operations.
153 	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
154 	 */
155 	u64 (*read_msr_safe)(unsigned int msr, int *err);
156 	int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);
157 
158 	u64 (*read_pmc)(int counter);
159 
160 	/*
161 	 * Switch to usermode gs and return to 64-bit usermode using
162 	 * sysret.  Only used in 64-bit kernels to return to 64-bit
163 	 * processes.  Usermode register state, including %rsp, must
164 	 * already be restored.
165 	 */
166 	void (*usergs_sysret64)(void);
167 
168 	/* Normal iret.  Jump to this with the standard iret stack
169 	   frame set up. */
170 	void (*iret)(void);
171 
172 	void (*start_context_switch)(struct task_struct *prev);
173 	void (*end_context_switch)(struct task_struct *next);
174 #endif
175 } __no_randomize_layout;
176 
177 struct pv_irq_ops {
178 #ifdef CONFIG_PARAVIRT_XXL
179 	/*
180 	 * Get/set interrupt state.  save_fl and restore_fl are only
181 	 * expected to use X86_EFLAGS_IF; all other bits
182 	 * returned from save_fl are undefined, and may be ignored by
183 	 * restore_fl.
184 	 *
185 	 * NOTE: These functions callers expect the callee to preserve
186 	 * more registers than the standard C calling convention.
187 	 */
188 	struct paravirt_callee_save save_fl;
189 	struct paravirt_callee_save restore_fl;
190 	struct paravirt_callee_save irq_disable;
191 	struct paravirt_callee_save irq_enable;
192 
193 	void (*safe_halt)(void);
194 	void (*halt)(void);
195 #endif
196 } __no_randomize_layout;
197 
198 struct pv_mmu_ops {
199 	/* TLB operations */
200 	void (*flush_tlb_user)(void);
201 	void (*flush_tlb_kernel)(void);
202 	void (*flush_tlb_one_user)(unsigned long addr);
203 	void (*flush_tlb_others)(const struct cpumask *cpus,
204 				 const struct flush_tlb_info *info);
205 
206 	void (*tlb_remove_table)(struct mmu_gather *tlb, void *table);
207 
208 	/* Hook for intercepting the destruction of an mm_struct. */
209 	void (*exit_mmap)(struct mm_struct *mm);
210 
211 #ifdef CONFIG_PARAVIRT_XXL
212 	struct paravirt_callee_save read_cr2;
213 	void (*write_cr2)(unsigned long);
214 
215 	unsigned long (*read_cr3)(void);
216 	void (*write_cr3)(unsigned long);
217 
218 	/* Hooks for intercepting the creation/use of an mm_struct. */
219 	void (*activate_mm)(struct mm_struct *prev,
220 			    struct mm_struct *next);
221 	void (*dup_mmap)(struct mm_struct *oldmm,
222 			 struct mm_struct *mm);
223 
224 	/* Hooks for allocating and freeing a pagetable top-level */
225 	int  (*pgd_alloc)(struct mm_struct *mm);
226 	void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
227 
228 	/*
229 	 * Hooks for allocating/releasing pagetable pages when they're
230 	 * attached to a pagetable
231 	 */
232 	void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
233 	void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
234 	void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
235 	void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn);
236 	void (*release_pte)(unsigned long pfn);
237 	void (*release_pmd)(unsigned long pfn);
238 	void (*release_pud)(unsigned long pfn);
239 	void (*release_p4d)(unsigned long pfn);
240 
241 	/* Pagetable manipulation functions */
242 	void (*set_pte)(pte_t *ptep, pte_t pteval);
243 	void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
244 
245 	pte_t (*ptep_modify_prot_start)(struct vm_area_struct *vma, unsigned long addr,
246 					pte_t *ptep);
247 	void (*ptep_modify_prot_commit)(struct vm_area_struct *vma, unsigned long addr,
248 					pte_t *ptep, pte_t pte);
249 
250 	struct paravirt_callee_save pte_val;
251 	struct paravirt_callee_save make_pte;
252 
253 	struct paravirt_callee_save pgd_val;
254 	struct paravirt_callee_save make_pgd;
255 
256 	void (*set_pud)(pud_t *pudp, pud_t pudval);
257 
258 	struct paravirt_callee_save pmd_val;
259 	struct paravirt_callee_save make_pmd;
260 
261 	struct paravirt_callee_save pud_val;
262 	struct paravirt_callee_save make_pud;
263 
264 	void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval);
265 
266 #if CONFIG_PGTABLE_LEVELS >= 5
267 	struct paravirt_callee_save p4d_val;
268 	struct paravirt_callee_save make_p4d;
269 
270 	void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval);
271 #endif	/* CONFIG_PGTABLE_LEVELS >= 5 */
272 
273 	struct pv_lazy_ops lazy_mode;
274 
275 	/* dom0 ops */
276 
277 	/* Sometimes the physical address is a pfn, and sometimes its
278 	   an mfn.  We can tell which is which from the index. */
279 	void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
280 			   phys_addr_t phys, pgprot_t flags);
281 #endif
282 } __no_randomize_layout;
283 
284 struct arch_spinlock;
285 #ifdef CONFIG_SMP
286 #include <asm/spinlock_types.h>
287 #endif
288 
289 struct qspinlock;
290 
291 struct pv_lock_ops {
292 	void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);
293 	struct paravirt_callee_save queued_spin_unlock;
294 
295 	void (*wait)(u8 *ptr, u8 val);
296 	void (*kick)(int cpu);
297 
298 	struct paravirt_callee_save vcpu_is_preempted;
299 } __no_randomize_layout;
300 
301 /* This contains all the paravirt structures: we get a convenient
302  * number for each function using the offset which we use to indicate
303  * what to patch. */
304 struct paravirt_patch_template {
305 	struct pv_init_ops	init;
306 	struct pv_time_ops	time;
307 	struct pv_cpu_ops	cpu;
308 	struct pv_irq_ops	irq;
309 	struct pv_mmu_ops	mmu;
310 	struct pv_lock_ops	lock;
311 } __no_randomize_layout;
312 
313 extern struct pv_info pv_info;
314 extern struct paravirt_patch_template pv_ops;
315 
316 #define PARAVIRT_PATCH(x)					\
317 	(offsetof(struct paravirt_patch_template, x) / sizeof(void *))
318 
319 #define paravirt_type(op)				\
320 	[paravirt_typenum] "i" (PARAVIRT_PATCH(op)),	\
321 	[paravirt_opptr] "i" (&(pv_ops.op))
322 #define paravirt_clobber(clobber)		\
323 	[paravirt_clobber] "i" (clobber)
324 
325 /*
326  * Generate some code, and mark it as patchable by the
327  * apply_paravirt() alternate instruction patcher.
328  */
329 #define _paravirt_alt(insn_string, type, clobber)	\
330 	"771:\n\t" insn_string "\n" "772:\n"		\
331 	".pushsection .parainstructions,\"a\"\n"	\
332 	_ASM_ALIGN "\n"					\
333 	_ASM_PTR " 771b\n"				\
334 	"  .byte " type "\n"				\
335 	"  .byte 772b-771b\n"				\
336 	"  .short " clobber "\n"			\
337 	".popsection\n"
338 
339 /* Generate patchable code, with the default asm parameters. */
340 #define paravirt_alt(insn_string)					\
341 	_paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
342 
343 /* Simple instruction patching code. */
344 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t"
345 
346 unsigned paravirt_patch_ident_64(void *insn_buff, unsigned len);
347 unsigned paravirt_patch_default(u8 type, void *insn_buff, unsigned long addr, unsigned len);
348 unsigned paravirt_patch_insns(void *insn_buff, unsigned len, const char *start, const char *end);
349 
350 unsigned native_patch(u8 type, void *insn_buff, unsigned long addr, unsigned len);
351 
352 int paravirt_disable_iospace(void);
353 
354 /*
355  * This generates an indirect call based on the operation type number.
356  * The type number, computed in PARAVIRT_PATCH, is derived from the
357  * offset into the paravirt_patch_template structure, and can therefore be
358  * freely converted back into a structure offset.
359  */
360 #define PARAVIRT_CALL					\
361 	ANNOTATE_RETPOLINE_SAFE				\
362 	"call *%c[paravirt_opptr];"
363 
364 /*
365  * These macros are intended to wrap calls through one of the paravirt
366  * ops structs, so that they can be later identified and patched at
367  * runtime.
368  *
369  * Normally, a call to a pv_op function is a simple indirect call:
370  * (pv_op_struct.operations)(args...).
371  *
372  * Unfortunately, this is a relatively slow operation for modern CPUs,
373  * because it cannot necessarily determine what the destination
374  * address is.  In this case, the address is a runtime constant, so at
375  * the very least we can patch the call to e a simple direct call, or
376  * ideally, patch an inline implementation into the callsite.  (Direct
377  * calls are essentially free, because the call and return addresses
378  * are completely predictable.)
379  *
380  * For i386, these macros rely on the standard gcc "regparm(3)" calling
381  * convention, in which the first three arguments are placed in %eax,
382  * %edx, %ecx (in that order), and the remaining arguments are placed
383  * on the stack.  All caller-save registers (eax,edx,ecx) are expected
384  * to be modified (either clobbered or used for return values).
385  * X86_64, on the other hand, already specifies a register-based calling
386  * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
387  * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
388  * special handling for dealing with 4 arguments, unlike i386.
389  * However, x86_64 also have to clobber all caller saved registers, which
390  * unfortunately, are quite a bit (r8 - r11)
391  *
392  * The call instruction itself is marked by placing its start address
393  * and size into the .parainstructions section, so that
394  * apply_paravirt() in arch/i386/kernel/alternative.c can do the
395  * appropriate patching under the control of the backend pv_init_ops
396  * implementation.
397  *
398  * Unfortunately there's no way to get gcc to generate the args setup
399  * for the call, and then allow the call itself to be generated by an
400  * inline asm.  Because of this, we must do the complete arg setup and
401  * return value handling from within these macros.  This is fairly
402  * cumbersome.
403  *
404  * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
405  * It could be extended to more arguments, but there would be little
406  * to be gained from that.  For each number of arguments, there are
407  * the two VCALL and CALL variants for void and non-void functions.
408  *
409  * When there is a return value, the invoker of the macro must specify
410  * the return type.  The macro then uses sizeof() on that type to
411  * determine whether its a 32 or 64 bit value, and places the return
412  * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
413  * 64-bit). For x86_64 machines, it just returns at %rax regardless of
414  * the return value size.
415  *
416  * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
417  * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
418  * in low,high order
419  *
420  * Small structures are passed and returned in registers.  The macro
421  * calling convention can't directly deal with this, so the wrapper
422  * functions must do this.
423  *
424  * These PVOP_* macros are only defined within this header.  This
425  * means that all uses must be wrapped in inline functions.  This also
426  * makes sure the incoming and outgoing types are always correct.
427  */
428 #ifdef CONFIG_X86_32
429 #define PVOP_VCALL_ARGS							\
430 	unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx;
431 
432 #define PVOP_CALL_ARGS			PVOP_VCALL_ARGS
433 
434 #define PVOP_CALL_ARG1(x)		"a" ((unsigned long)(x))
435 #define PVOP_CALL_ARG2(x)		"d" ((unsigned long)(x))
436 #define PVOP_CALL_ARG3(x)		"c" ((unsigned long)(x))
437 
438 #define PVOP_VCALL_CLOBBERS		"=a" (__eax), "=d" (__edx),	\
439 					"=c" (__ecx)
440 #define PVOP_CALL_CLOBBERS		PVOP_VCALL_CLOBBERS
441 
442 #define PVOP_VCALLEE_CLOBBERS		"=a" (__eax), "=d" (__edx)
443 #define PVOP_CALLEE_CLOBBERS		PVOP_VCALLEE_CLOBBERS
444 
445 #define EXTRA_CLOBBERS
446 #define VEXTRA_CLOBBERS
447 #else  /* CONFIG_X86_64 */
448 /* [re]ax isn't an arg, but the return val */
449 #define PVOP_VCALL_ARGS						\
450 	unsigned long __edi = __edi, __esi = __esi,		\
451 		__edx = __edx, __ecx = __ecx, __eax = __eax;
452 
453 #define PVOP_CALL_ARGS		PVOP_VCALL_ARGS
454 
455 #define PVOP_CALL_ARG1(x)		"D" ((unsigned long)(x))
456 #define PVOP_CALL_ARG2(x)		"S" ((unsigned long)(x))
457 #define PVOP_CALL_ARG3(x)		"d" ((unsigned long)(x))
458 #define PVOP_CALL_ARG4(x)		"c" ((unsigned long)(x))
459 
460 #define PVOP_VCALL_CLOBBERS	"=D" (__edi),				\
461 				"=S" (__esi), "=d" (__edx),		\
462 				"=c" (__ecx)
463 #define PVOP_CALL_CLOBBERS	PVOP_VCALL_CLOBBERS, "=a" (__eax)
464 
465 /* void functions are still allowed [re]ax for scratch */
466 #define PVOP_VCALLEE_CLOBBERS	"=a" (__eax)
467 #define PVOP_CALLEE_CLOBBERS	PVOP_VCALLEE_CLOBBERS
468 
469 #define EXTRA_CLOBBERS	 , "r8", "r9", "r10", "r11"
470 #define VEXTRA_CLOBBERS	 , "rax", "r8", "r9", "r10", "r11"
471 #endif	/* CONFIG_X86_32 */
472 
473 #ifdef CONFIG_PARAVIRT_DEBUG
474 #define PVOP_TEST_NULL(op)	BUG_ON(pv_ops.op == NULL)
475 #else
476 #define PVOP_TEST_NULL(op)	((void)pv_ops.op)
477 #endif
478 
479 #define PVOP_RETMASK(rettype)						\
480 	({	unsigned long __mask = ~0UL;				\
481 		switch (sizeof(rettype)) {				\
482 		case 1: __mask =       0xffUL; break;			\
483 		case 2: __mask =     0xffffUL; break;			\
484 		case 4: __mask = 0xffffffffUL; break;			\
485 		default: break;						\
486 		}							\
487 		__mask;							\
488 	})
489 
490 
491 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr,		\
492 		      pre, post, ...)					\
493 	({								\
494 		rettype __ret;						\
495 		PVOP_CALL_ARGS;						\
496 		PVOP_TEST_NULL(op);					\
497 		/* This is 32-bit specific, but is okay in 64-bit */	\
498 		/* since this condition will never hold */		\
499 		if (sizeof(rettype) > sizeof(unsigned long)) {		\
500 			asm volatile(pre				\
501 				     paravirt_alt(PARAVIRT_CALL)	\
502 				     post				\
503 				     : call_clbr, ASM_CALL_CONSTRAINT	\
504 				     : paravirt_type(op),		\
505 				       paravirt_clobber(clbr),		\
506 				       ##__VA_ARGS__			\
507 				     : "memory", "cc" extra_clbr);	\
508 			__ret = (rettype)((((u64)__edx) << 32) | __eax); \
509 		} else {						\
510 			asm volatile(pre				\
511 				     paravirt_alt(PARAVIRT_CALL)	\
512 				     post				\
513 				     : call_clbr, ASM_CALL_CONSTRAINT	\
514 				     : paravirt_type(op),		\
515 				       paravirt_clobber(clbr),		\
516 				       ##__VA_ARGS__			\
517 				     : "memory", "cc" extra_clbr);	\
518 			__ret = (rettype)(__eax & PVOP_RETMASK(rettype));	\
519 		}							\
520 		__ret;							\
521 	})
522 
523 #define __PVOP_CALL(rettype, op, pre, post, ...)			\
524 	____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS,	\
525 		      EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
526 
527 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...)			\
528 	____PVOP_CALL(rettype, op.func, CLBR_RET_REG,			\
529 		      PVOP_CALLEE_CLOBBERS, ,				\
530 		      pre, post, ##__VA_ARGS__)
531 
532 
533 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...)	\
534 	({								\
535 		PVOP_VCALL_ARGS;					\
536 		PVOP_TEST_NULL(op);					\
537 		asm volatile(pre					\
538 			     paravirt_alt(PARAVIRT_CALL)		\
539 			     post					\
540 			     : call_clbr, ASM_CALL_CONSTRAINT		\
541 			     : paravirt_type(op),			\
542 			       paravirt_clobber(clbr),			\
543 			       ##__VA_ARGS__				\
544 			     : "memory", "cc" extra_clbr);		\
545 	})
546 
547 #define __PVOP_VCALL(op, pre, post, ...)				\
548 	____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS,		\
549 		       VEXTRA_CLOBBERS,					\
550 		       pre, post, ##__VA_ARGS__)
551 
552 #define __PVOP_VCALLEESAVE(op, pre, post, ...)				\
553 	____PVOP_VCALL(op.func, CLBR_RET_REG,				\
554 		      PVOP_VCALLEE_CLOBBERS, ,				\
555 		      pre, post, ##__VA_ARGS__)
556 
557 
558 
559 #define PVOP_CALL0(rettype, op)						\
560 	__PVOP_CALL(rettype, op, "", "")
561 #define PVOP_VCALL0(op)							\
562 	__PVOP_VCALL(op, "", "")
563 
564 #define PVOP_CALLEE0(rettype, op)					\
565 	__PVOP_CALLEESAVE(rettype, op, "", "")
566 #define PVOP_VCALLEE0(op)						\
567 	__PVOP_VCALLEESAVE(op, "", "")
568 
569 
570 #define PVOP_CALL1(rettype, op, arg1)					\
571 	__PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
572 #define PVOP_VCALL1(op, arg1)						\
573 	__PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
574 
575 #define PVOP_CALLEE1(rettype, op, arg1)					\
576 	__PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
577 #define PVOP_VCALLEE1(op, arg1)						\
578 	__PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
579 
580 
581 #define PVOP_CALL2(rettype, op, arg1, arg2)				\
582 	__PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),		\
583 		    PVOP_CALL_ARG2(arg2))
584 #define PVOP_VCALL2(op, arg1, arg2)					\
585 	__PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),			\
586 		     PVOP_CALL_ARG2(arg2))
587 
588 #define PVOP_CALLEE2(rettype, op, arg1, arg2)				\
589 	__PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1),	\
590 			  PVOP_CALL_ARG2(arg2))
591 #define PVOP_VCALLEE2(op, arg1, arg2)					\
592 	__PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1),		\
593 			   PVOP_CALL_ARG2(arg2))
594 
595 
596 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)			\
597 	__PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),		\
598 		    PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
599 #define PVOP_VCALL3(op, arg1, arg2, arg3)				\
600 	__PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),			\
601 		     PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
602 
603 /* This is the only difference in x86_64. We can make it much simpler */
604 #ifdef CONFIG_X86_32
605 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)			\
606 	__PVOP_CALL(rettype, op,					\
607 		    "push %[_arg4];", "lea 4(%%esp),%%esp;",		\
608 		    PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),		\
609 		    PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
610 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)				\
611 	__PVOP_VCALL(op,						\
612 		    "push %[_arg4];", "lea 4(%%esp),%%esp;",		\
613 		    "0" ((u32)(arg1)), "1" ((u32)(arg2)),		\
614 		    "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
615 #else
616 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)			\
617 	__PVOP_CALL(rettype, op, "", "",				\
618 		    PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),		\
619 		    PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
620 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)				\
621 	__PVOP_VCALL(op, "", "",					\
622 		     PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),	\
623 		     PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
624 #endif
625 
626 /* Lazy mode for batching updates / context switch */
627 enum paravirt_lazy_mode {
628 	PARAVIRT_LAZY_NONE,
629 	PARAVIRT_LAZY_MMU,
630 	PARAVIRT_LAZY_CPU,
631 };
632 
633 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
634 void paravirt_start_context_switch(struct task_struct *prev);
635 void paravirt_end_context_switch(struct task_struct *next);
636 
637 void paravirt_enter_lazy_mmu(void);
638 void paravirt_leave_lazy_mmu(void);
639 void paravirt_flush_lazy_mmu(void);
640 
641 void _paravirt_nop(void);
642 u64 _paravirt_ident_64(u64);
643 
644 #define paravirt_nop	((void *)_paravirt_nop)
645 
646 /* These all sit in the .parainstructions section to tell us what to patch. */
647 struct paravirt_patch_site {
648 	u8 *instr;		/* original instructions */
649 	u8 type;		/* type of this instruction */
650 	u8 len;			/* length of original instruction */
651 };
652 
653 extern struct paravirt_patch_site __parainstructions[],
654 	__parainstructions_end[];
655 
656 #endif	/* __ASSEMBLY__ */
657 
658 #endif	/* _ASM_X86_PARAVIRT_TYPES_H */
659