1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
3
4 /* ethtool support for i40e */
5
6 #include "i40e.h"
7 #include "i40e_diag.h"
8 #include "i40e_txrx_common.h"
9
10 /* ethtool statistics helpers */
11
12 /**
13 * struct i40e_stats - definition for an ethtool statistic
14 * @stat_string: statistic name to display in ethtool -S output
15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64)
16 * @stat_offset: offsetof() the stat from a base pointer
17 *
18 * This structure defines a statistic to be added to the ethtool stats buffer.
19 * It defines a statistic as offset from a common base pointer. Stats should
20 * be defined in constant arrays using the I40E_STAT macro, with every element
21 * of the array using the same _type for calculating the sizeof_stat and
22 * stat_offset.
23 *
24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or
25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from
26 * the i40e_add_ethtool_stat() helper function.
27 *
28 * The @stat_string is interpreted as a format string, allowing formatted
29 * values to be inserted while looping over multiple structures for a given
30 * statistics array. Thus, every statistic string in an array should have the
31 * same type and number of format specifiers, to be formatted by variadic
32 * arguments to the i40e_add_stat_string() helper function.
33 **/
34 struct i40e_stats {
35 char stat_string[ETH_GSTRING_LEN];
36 int sizeof_stat;
37 int stat_offset;
38 };
39
40 /* Helper macro to define an i40e_stat structure with proper size and type.
41 * Use this when defining constant statistics arrays. Note that @_type expects
42 * only a type name and is used multiple times.
43 */
44 #define I40E_STAT(_type, _name, _stat) { \
45 .stat_string = _name, \
46 .sizeof_stat = sizeof_field(_type, _stat), \
47 .stat_offset = offsetof(_type, _stat) \
48 }
49
50 /* Helper macro for defining some statistics directly copied from the netdev
51 * stats structure.
52 */
53 #define I40E_NETDEV_STAT(_net_stat) \
54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
55
56 /* Helper macro for defining some statistics related to queues */
57 #define I40E_QUEUE_STAT(_name, _stat) \
58 I40E_STAT(struct i40e_ring, _name, _stat)
59
60 /* Stats associated with a Tx or Rx ring */
61 static const struct i40e_stats i40e_gstrings_queue_stats[] = {
62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
64 };
65
66 /**
67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
68 * @data: location to store the stat value
69 * @pointer: basis for where to copy from
70 * @stat: the stat definition
71 *
72 * Copies the stat data defined by the pointer and stat structure pair into
73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and
74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd.
75 */
76 static void
i40e_add_one_ethtool_stat(u64 * data,void * pointer,const struct i40e_stats * stat)77 i40e_add_one_ethtool_stat(u64 *data, void *pointer,
78 const struct i40e_stats *stat)
79 {
80 char *p;
81
82 if (!pointer) {
83 /* ensure that the ethtool data buffer is zero'd for any stats
84 * which don't have a valid pointer.
85 */
86 *data = 0;
87 return;
88 }
89
90 p = (char *)pointer + stat->stat_offset;
91 switch (stat->sizeof_stat) {
92 case sizeof(u64):
93 *data = *((u64 *)p);
94 break;
95 case sizeof(u32):
96 *data = *((u32 *)p);
97 break;
98 case sizeof(u16):
99 *data = *((u16 *)p);
100 break;
101 case sizeof(u8):
102 *data = *((u8 *)p);
103 break;
104 default:
105 WARN_ONCE(1, "unexpected stat size for %s",
106 stat->stat_string);
107 *data = 0;
108 }
109 }
110
111 /**
112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
113 * @data: ethtool stats buffer
114 * @pointer: location to copy stats from
115 * @stats: array of stats to copy
116 * @size: the size of the stats definition
117 *
118 * Copy the stats defined by the stats array using the pointer as a base into
119 * the data buffer supplied by ethtool. Updates the data pointer to point to
120 * the next empty location for successive calls to __i40e_add_ethtool_stats.
121 * If pointer is null, set the data values to zero and update the pointer to
122 * skip these stats.
123 **/
124 static void
__i40e_add_ethtool_stats(u64 ** data,void * pointer,const struct i40e_stats stats[],const unsigned int size)125 __i40e_add_ethtool_stats(u64 **data, void *pointer,
126 const struct i40e_stats stats[],
127 const unsigned int size)
128 {
129 unsigned int i;
130
131 for (i = 0; i < size; i++)
132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
133 }
134
135 /**
136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
137 * @data: ethtool stats buffer
138 * @pointer: location where stats are stored
139 * @stats: static const array of stat definitions
140 *
141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
143 * ensuring that we pass the size associated with the given stats array.
144 *
145 * The parameter @stats is evaluated twice, so parameters with side effects
146 * should be avoided.
147 **/
148 #define i40e_add_ethtool_stats(data, pointer, stats) \
149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
150
151 /**
152 * i40e_add_queue_stats - copy queue statistics into supplied buffer
153 * @data: ethtool stats buffer
154 * @ring: the ring to copy
155 *
156 * Queue statistics must be copied while protected by
157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats.
158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the
159 * ring pointer is null, zero out the queue stat values and update the data
160 * pointer. Otherwise safely copy the stats from the ring into the supplied
161 * buffer and update the data pointer when finished.
162 *
163 * This function expects to be called while under rcu_read_lock().
164 **/
165 static void
i40e_add_queue_stats(u64 ** data,struct i40e_ring * ring)166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring)
167 {
168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats);
169 const struct i40e_stats *stats = i40e_gstrings_queue_stats;
170 unsigned int start;
171 unsigned int i;
172
173 /* To avoid invalid statistics values, ensure that we keep retrying
174 * the copy until we get a consistent value according to
175 * u64_stats_fetch_retry_irq. But first, make sure our ring is
176 * non-null before attempting to access its syncp.
177 */
178 do {
179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp);
180 for (i = 0; i < size; i++) {
181 i40e_add_one_ethtool_stat(&(*data)[i], ring,
182 &stats[i]);
183 }
184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start));
185
186 /* Once we successfully copy the stats in, update the data pointer */
187 *data += size;
188 }
189
190 /**
191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer
192 * @p: ethtool supplied buffer
193 * @stats: stat definitions array
194 * @size: size of the stats array
195 *
196 * Format and copy the strings described by stats into the buffer pointed at
197 * by p.
198 **/
__i40e_add_stat_strings(u8 ** p,const struct i40e_stats stats[],const unsigned int size,...)199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
200 const unsigned int size, ...)
201 {
202 unsigned int i;
203
204 for (i = 0; i < size; i++) {
205 va_list args;
206
207 va_start(args, size);
208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
209 *p += ETH_GSTRING_LEN;
210 va_end(args);
211 }
212 }
213
214 /**
215 * 40e_add_stat_strings - copy stat strings into ethtool buffer
216 * @p: ethtool supplied buffer
217 * @stats: stat definitions array
218 *
219 * Format and copy the strings described by the const static stats value into
220 * the buffer pointed at by p.
221 *
222 * The parameter @stats is evaluated twice, so parameters with side effects
223 * should be avoided. Additionally, stats must be an array such that
224 * ARRAY_SIZE can be called on it.
225 **/
226 #define i40e_add_stat_strings(p, stats, ...) \
227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
228
229 #define I40E_PF_STAT(_name, _stat) \
230 I40E_STAT(struct i40e_pf, _name, _stat)
231 #define I40E_VSI_STAT(_name, _stat) \
232 I40E_STAT(struct i40e_vsi, _name, _stat)
233 #define I40E_VEB_STAT(_name, _stat) \
234 I40E_STAT(struct i40e_veb, _name, _stat)
235 #define I40E_VEB_TC_STAT(_name, _stat) \
236 I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat)
237 #define I40E_PFC_STAT(_name, _stat) \
238 I40E_STAT(struct i40e_pfc_stats, _name, _stat)
239 #define I40E_QUEUE_STAT(_name, _stat) \
240 I40E_STAT(struct i40e_ring, _name, _stat)
241
242 static const struct i40e_stats i40e_gstrings_net_stats[] = {
243 I40E_NETDEV_STAT(rx_packets),
244 I40E_NETDEV_STAT(tx_packets),
245 I40E_NETDEV_STAT(rx_bytes),
246 I40E_NETDEV_STAT(tx_bytes),
247 I40E_NETDEV_STAT(rx_errors),
248 I40E_NETDEV_STAT(tx_errors),
249 I40E_NETDEV_STAT(rx_dropped),
250 I40E_NETDEV_STAT(tx_dropped),
251 I40E_NETDEV_STAT(collisions),
252 I40E_NETDEV_STAT(rx_length_errors),
253 I40E_NETDEV_STAT(rx_crc_errors),
254 };
255
256 static const struct i40e_stats i40e_gstrings_veb_stats[] = {
257 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
258 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
259 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
260 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
261 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
262 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
263 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
264 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
265 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
266 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
267 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
268 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
269 };
270
271 struct i40e_cp_veb_tc_stats {
272 u64 tc_rx_packets;
273 u64 tc_rx_bytes;
274 u64 tc_tx_packets;
275 u64 tc_tx_bytes;
276 };
277
278 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
279 I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets),
280 I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes),
281 I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets),
282 I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes),
283 };
284
285 static const struct i40e_stats i40e_gstrings_misc_stats[] = {
286 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
287 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
288 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
289 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
290 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
291 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
292 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
293 I40E_VSI_STAT("tx_linearize", tx_linearize),
294 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
295 I40E_VSI_STAT("tx_busy", tx_busy),
296 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
297 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
298 };
299
300 /* These PF_STATs might look like duplicates of some NETDEV_STATs,
301 * but they are separate. This device supports Virtualization, and
302 * as such might have several netdevs supporting VMDq and FCoE going
303 * through a single port. The NETDEV_STATs are for individual netdevs
304 * seen at the top of the stack, and the PF_STATs are for the physical
305 * function at the bottom of the stack hosting those netdevs.
306 *
307 * The PF_STATs are appended to the netdev stats only when ethtool -S
308 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
309 */
310 static const struct i40e_stats i40e_gstrings_stats[] = {
311 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
312 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
313 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
314 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
315 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
316 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
317 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
318 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
319 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
320 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards),
321 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
322 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
323 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
324 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
325 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
326 I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
327 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
328 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
329 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
330 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
331 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
332 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
333 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
334 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
335 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
336 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
337 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
338 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
339 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
340 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
341 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
342 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
343 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
344 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
345 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
346 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
347 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
348 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
349 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
350 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
351 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
352 I40E_PF_STAT("port.arq_overflows", arq_overflows),
353 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
354 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
355 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
356 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
357 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
358 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
359 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
360 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
361 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
362
363 /* LPI stats */
364 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
365 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
366 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
367 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
368 };
369
370 struct i40e_pfc_stats {
371 u64 priority_xon_rx;
372 u64 priority_xoff_rx;
373 u64 priority_xon_tx;
374 u64 priority_xoff_tx;
375 u64 priority_xon_2_xoff;
376 };
377
378 static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
379 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
380 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
381 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
382 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
383 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
384 };
385
386 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
387
388 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
389
390 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN)
391
392 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
393 I40E_MAX_USER_PRIORITY)
394
395 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \
396 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
397 I40E_MAX_TRAFFIC_CLASS))
398
399 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
400
401 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \
402 I40E_PFC_STATS_LEN + \
403 I40E_VEB_STATS_LEN + \
404 I40E_VSI_STATS_LEN)
405
406 /* Length of stats for a single queue */
407 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats)
408
409 enum i40e_ethtool_test_id {
410 I40E_ETH_TEST_REG = 0,
411 I40E_ETH_TEST_EEPROM,
412 I40E_ETH_TEST_INTR,
413 I40E_ETH_TEST_LINK,
414 };
415
416 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
417 "Register test (offline)",
418 "Eeprom test (offline)",
419 "Interrupt test (offline)",
420 "Link test (on/offline)"
421 };
422
423 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
424
425 struct i40e_priv_flags {
426 char flag_string[ETH_GSTRING_LEN];
427 u64 flag;
428 bool read_only;
429 };
430
431 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
432 .flag_string = _name, \
433 .flag = _flag, \
434 .read_only = _read_only, \
435 }
436
437 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
438 /* NOTE: MFP setting cannot be changed */
439 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
440 I40E_PRIV_FLAG("total-port-shutdown",
441 I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1),
442 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
443 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
444 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
445 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
446 I40E_PRIV_FLAG("link-down-on-close",
447 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
448 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
449 I40E_PRIV_FLAG("disable-source-pruning",
450 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
451 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
452 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
453 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
454 };
455
456 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
457
458 /* Private flags with a global effect, restricted to PF 0 */
459 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
460 I40E_PRIV_FLAG("vf-true-promisc-support",
461 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
462 };
463
464 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
465
466 /**
467 * i40e_partition_setting_complaint - generic complaint for MFP restriction
468 * @pf: the PF struct
469 **/
i40e_partition_setting_complaint(struct i40e_pf * pf)470 static void i40e_partition_setting_complaint(struct i40e_pf *pf)
471 {
472 dev_info(&pf->pdev->dev,
473 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
474 }
475
476 /**
477 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
478 * @pf: PF struct with phy_types
479 * @ks: ethtool link ksettings struct to fill out
480 *
481 **/
i40e_phy_type_to_ethtool(struct i40e_pf * pf,struct ethtool_link_ksettings * ks)482 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
483 struct ethtool_link_ksettings *ks)
484 {
485 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
486 u64 phy_types = pf->hw.phy.phy_types;
487
488 ethtool_link_ksettings_zero_link_mode(ks, supported);
489 ethtool_link_ksettings_zero_link_mode(ks, advertising);
490
491 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
492 ethtool_link_ksettings_add_link_mode(ks, supported,
493 1000baseT_Full);
494 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
495 ethtool_link_ksettings_add_link_mode(ks, advertising,
496 1000baseT_Full);
497 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
498 ethtool_link_ksettings_add_link_mode(ks, supported,
499 100baseT_Full);
500 ethtool_link_ksettings_add_link_mode(ks, advertising,
501 100baseT_Full);
502 }
503 }
504 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
505 phy_types & I40E_CAP_PHY_TYPE_XFI ||
506 phy_types & I40E_CAP_PHY_TYPE_SFI ||
507 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
508 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
509 ethtool_link_ksettings_add_link_mode(ks, supported,
510 10000baseT_Full);
511 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
512 ethtool_link_ksettings_add_link_mode(ks, advertising,
513 10000baseT_Full);
514 }
515 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
516 ethtool_link_ksettings_add_link_mode(ks, supported,
517 10000baseT_Full);
518 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
519 ethtool_link_ksettings_add_link_mode(ks, advertising,
520 10000baseT_Full);
521 }
522 if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) {
523 ethtool_link_ksettings_add_link_mode(ks, supported,
524 2500baseT_Full);
525 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
526 ethtool_link_ksettings_add_link_mode(ks, advertising,
527 2500baseT_Full);
528 }
529 if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) {
530 ethtool_link_ksettings_add_link_mode(ks, supported,
531 5000baseT_Full);
532 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
533 ethtool_link_ksettings_add_link_mode(ks, advertising,
534 5000baseT_Full);
535 }
536 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
537 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
538 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
539 ethtool_link_ksettings_add_link_mode(ks, supported,
540 40000baseCR4_Full);
541 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
542 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
543 ethtool_link_ksettings_add_link_mode(ks, supported,
544 40000baseCR4_Full);
545 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
546 ethtool_link_ksettings_add_link_mode(ks, advertising,
547 40000baseCR4_Full);
548 }
549 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
550 ethtool_link_ksettings_add_link_mode(ks, supported,
551 100baseT_Full);
552 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
553 ethtool_link_ksettings_add_link_mode(ks, advertising,
554 100baseT_Full);
555 }
556 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
557 ethtool_link_ksettings_add_link_mode(ks, supported,
558 1000baseT_Full);
559 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
560 ethtool_link_ksettings_add_link_mode(ks, advertising,
561 1000baseT_Full);
562 }
563 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) {
564 ethtool_link_ksettings_add_link_mode(ks, supported,
565 40000baseSR4_Full);
566 ethtool_link_ksettings_add_link_mode(ks, advertising,
567 40000baseSR4_Full);
568 }
569 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) {
570 ethtool_link_ksettings_add_link_mode(ks, supported,
571 40000baseLR4_Full);
572 ethtool_link_ksettings_add_link_mode(ks, advertising,
573 40000baseLR4_Full);
574 }
575 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
576 ethtool_link_ksettings_add_link_mode(ks, supported,
577 40000baseKR4_Full);
578 ethtool_link_ksettings_add_link_mode(ks, advertising,
579 40000baseKR4_Full);
580 }
581 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
582 ethtool_link_ksettings_add_link_mode(ks, supported,
583 20000baseKR2_Full);
584 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
585 ethtool_link_ksettings_add_link_mode(ks, advertising,
586 20000baseKR2_Full);
587 }
588 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
589 ethtool_link_ksettings_add_link_mode(ks, supported,
590 10000baseKX4_Full);
591 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
592 ethtool_link_ksettings_add_link_mode(ks, advertising,
593 10000baseKX4_Full);
594 }
595 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
596 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
597 ethtool_link_ksettings_add_link_mode(ks, supported,
598 10000baseKR_Full);
599 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
600 ethtool_link_ksettings_add_link_mode(ks, advertising,
601 10000baseKR_Full);
602 }
603 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
604 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
605 ethtool_link_ksettings_add_link_mode(ks, supported,
606 1000baseKX_Full);
607 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
608 ethtool_link_ksettings_add_link_mode(ks, advertising,
609 1000baseKX_Full);
610 }
611 /* need to add 25G PHY types */
612 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
613 ethtool_link_ksettings_add_link_mode(ks, supported,
614 25000baseKR_Full);
615 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
616 ethtool_link_ksettings_add_link_mode(ks, advertising,
617 25000baseKR_Full);
618 }
619 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
620 ethtool_link_ksettings_add_link_mode(ks, supported,
621 25000baseCR_Full);
622 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
623 ethtool_link_ksettings_add_link_mode(ks, advertising,
624 25000baseCR_Full);
625 }
626 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
627 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
628 ethtool_link_ksettings_add_link_mode(ks, supported,
629 25000baseSR_Full);
630 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
631 ethtool_link_ksettings_add_link_mode(ks, advertising,
632 25000baseSR_Full);
633 }
634 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
635 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
636 ethtool_link_ksettings_add_link_mode(ks, supported,
637 25000baseCR_Full);
638 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
639 ethtool_link_ksettings_add_link_mode(ks, advertising,
640 25000baseCR_Full);
641 }
642 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
643 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
644 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
645 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
646 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
647 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
648 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
649 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
650 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
651 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) {
652 ethtool_link_ksettings_add_link_mode(ks, advertising,
653 FEC_NONE);
654 ethtool_link_ksettings_add_link_mode(ks, advertising,
655 FEC_RS);
656 ethtool_link_ksettings_add_link_mode(ks, advertising,
657 FEC_BASER);
658 }
659 }
660 /* need to add new 10G PHY types */
661 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
662 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
663 ethtool_link_ksettings_add_link_mode(ks, supported,
664 10000baseCR_Full);
665 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
666 ethtool_link_ksettings_add_link_mode(ks, advertising,
667 10000baseCR_Full);
668 }
669 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
670 ethtool_link_ksettings_add_link_mode(ks, supported,
671 10000baseSR_Full);
672 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
673 ethtool_link_ksettings_add_link_mode(ks, advertising,
674 10000baseSR_Full);
675 }
676 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
677 ethtool_link_ksettings_add_link_mode(ks, supported,
678 10000baseLR_Full);
679 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
680 ethtool_link_ksettings_add_link_mode(ks, advertising,
681 10000baseLR_Full);
682 }
683 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
684 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
685 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
686 ethtool_link_ksettings_add_link_mode(ks, supported,
687 1000baseX_Full);
688 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
689 ethtool_link_ksettings_add_link_mode(ks, advertising,
690 1000baseX_Full);
691 }
692 /* Autoneg PHY types */
693 if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
694 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
695 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
696 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
697 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
698 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
699 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
700 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
701 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
702 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
703 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
704 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
705 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
706 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
707 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
708 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
709 phy_types & I40E_CAP_PHY_TYPE_5GBASE_T ||
710 phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T ||
711 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
712 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
713 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
714 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
715 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
716 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
717 ethtool_link_ksettings_add_link_mode(ks, supported,
718 Autoneg);
719 ethtool_link_ksettings_add_link_mode(ks, advertising,
720 Autoneg);
721 }
722 }
723
724 /**
725 * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask
726 * @req_fec_info: mask request FEC info
727 * @ks: ethtool ksettings to fill in
728 **/
i40e_get_settings_link_up_fec(u8 req_fec_info,struct ethtool_link_ksettings * ks)729 static void i40e_get_settings_link_up_fec(u8 req_fec_info,
730 struct ethtool_link_ksettings *ks)
731 {
732 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
733 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
734 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
735
736 if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) &&
737 (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) {
738 ethtool_link_ksettings_add_link_mode(ks, advertising,
739 FEC_NONE);
740 ethtool_link_ksettings_add_link_mode(ks, advertising,
741 FEC_BASER);
742 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
743 } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) {
744 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
745 } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) {
746 ethtool_link_ksettings_add_link_mode(ks, advertising,
747 FEC_BASER);
748 } else {
749 ethtool_link_ksettings_add_link_mode(ks, advertising,
750 FEC_NONE);
751 }
752 }
753
754 /**
755 * i40e_get_settings_link_up - Get the Link settings for when link is up
756 * @hw: hw structure
757 * @ks: ethtool ksettings to fill in
758 * @netdev: network interface device structure
759 * @pf: pointer to physical function struct
760 **/
i40e_get_settings_link_up(struct i40e_hw * hw,struct ethtool_link_ksettings * ks,struct net_device * netdev,struct i40e_pf * pf)761 static void i40e_get_settings_link_up(struct i40e_hw *hw,
762 struct ethtool_link_ksettings *ks,
763 struct net_device *netdev,
764 struct i40e_pf *pf)
765 {
766 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
767 struct ethtool_link_ksettings cap_ksettings;
768 u32 link_speed = hw_link_info->link_speed;
769
770 /* Initialize supported and advertised settings based on phy settings */
771 switch (hw_link_info->phy_type) {
772 case I40E_PHY_TYPE_40GBASE_CR4:
773 case I40E_PHY_TYPE_40GBASE_CR4_CU:
774 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
775 ethtool_link_ksettings_add_link_mode(ks, supported,
776 40000baseCR4_Full);
777 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
778 ethtool_link_ksettings_add_link_mode(ks, advertising,
779 40000baseCR4_Full);
780 break;
781 case I40E_PHY_TYPE_XLAUI:
782 case I40E_PHY_TYPE_XLPPI:
783 case I40E_PHY_TYPE_40GBASE_AOC:
784 ethtool_link_ksettings_add_link_mode(ks, supported,
785 40000baseCR4_Full);
786 ethtool_link_ksettings_add_link_mode(ks, advertising,
787 40000baseCR4_Full);
788 break;
789 case I40E_PHY_TYPE_40GBASE_SR4:
790 ethtool_link_ksettings_add_link_mode(ks, supported,
791 40000baseSR4_Full);
792 ethtool_link_ksettings_add_link_mode(ks, advertising,
793 40000baseSR4_Full);
794 break;
795 case I40E_PHY_TYPE_40GBASE_LR4:
796 ethtool_link_ksettings_add_link_mode(ks, supported,
797 40000baseLR4_Full);
798 ethtool_link_ksettings_add_link_mode(ks, advertising,
799 40000baseLR4_Full);
800 break;
801 case I40E_PHY_TYPE_25GBASE_SR:
802 case I40E_PHY_TYPE_25GBASE_LR:
803 case I40E_PHY_TYPE_10GBASE_SR:
804 case I40E_PHY_TYPE_10GBASE_LR:
805 case I40E_PHY_TYPE_1000BASE_SX:
806 case I40E_PHY_TYPE_1000BASE_LX:
807 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
808 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
809 ethtool_link_ksettings_add_link_mode(ks, supported,
810 25000baseSR_Full);
811 ethtool_link_ksettings_add_link_mode(ks, advertising,
812 25000baseSR_Full);
813 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
814 ethtool_link_ksettings_add_link_mode(ks, supported,
815 10000baseSR_Full);
816 ethtool_link_ksettings_add_link_mode(ks, advertising,
817 10000baseSR_Full);
818 ethtool_link_ksettings_add_link_mode(ks, supported,
819 10000baseLR_Full);
820 ethtool_link_ksettings_add_link_mode(ks, advertising,
821 10000baseLR_Full);
822 ethtool_link_ksettings_add_link_mode(ks, supported,
823 1000baseX_Full);
824 ethtool_link_ksettings_add_link_mode(ks, advertising,
825 1000baseX_Full);
826 ethtool_link_ksettings_add_link_mode(ks, supported,
827 10000baseT_Full);
828 if (hw_link_info->module_type[2] &
829 I40E_MODULE_TYPE_1000BASE_SX ||
830 hw_link_info->module_type[2] &
831 I40E_MODULE_TYPE_1000BASE_LX) {
832 ethtool_link_ksettings_add_link_mode(ks, supported,
833 1000baseT_Full);
834 if (hw_link_info->requested_speeds &
835 I40E_LINK_SPEED_1GB)
836 ethtool_link_ksettings_add_link_mode(
837 ks, advertising, 1000baseT_Full);
838 }
839 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
840 ethtool_link_ksettings_add_link_mode(ks, advertising,
841 10000baseT_Full);
842 break;
843 case I40E_PHY_TYPE_10GBASE_T:
844 case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
845 case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
846 case I40E_PHY_TYPE_1000BASE_T:
847 case I40E_PHY_TYPE_100BASE_TX:
848 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
849 ethtool_link_ksettings_add_link_mode(ks, supported,
850 10000baseT_Full);
851 ethtool_link_ksettings_add_link_mode(ks, supported,
852 5000baseT_Full);
853 ethtool_link_ksettings_add_link_mode(ks, supported,
854 2500baseT_Full);
855 ethtool_link_ksettings_add_link_mode(ks, supported,
856 1000baseT_Full);
857 ethtool_link_ksettings_add_link_mode(ks, supported,
858 100baseT_Full);
859 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
860 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
861 ethtool_link_ksettings_add_link_mode(ks, advertising,
862 10000baseT_Full);
863 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
864 ethtool_link_ksettings_add_link_mode(ks, advertising,
865 5000baseT_Full);
866 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
867 ethtool_link_ksettings_add_link_mode(ks, advertising,
868 2500baseT_Full);
869 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
870 ethtool_link_ksettings_add_link_mode(ks, advertising,
871 1000baseT_Full);
872 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
873 ethtool_link_ksettings_add_link_mode(ks, advertising,
874 100baseT_Full);
875 break;
876 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
877 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
878 ethtool_link_ksettings_add_link_mode(ks, supported,
879 1000baseT_Full);
880 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
881 ethtool_link_ksettings_add_link_mode(ks, advertising,
882 1000baseT_Full);
883 break;
884 case I40E_PHY_TYPE_10GBASE_CR1_CU:
885 case I40E_PHY_TYPE_10GBASE_CR1:
886 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
887 ethtool_link_ksettings_add_link_mode(ks, supported,
888 10000baseT_Full);
889 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
890 ethtool_link_ksettings_add_link_mode(ks, advertising,
891 10000baseT_Full);
892 break;
893 case I40E_PHY_TYPE_XAUI:
894 case I40E_PHY_TYPE_XFI:
895 case I40E_PHY_TYPE_SFI:
896 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
897 case I40E_PHY_TYPE_10GBASE_AOC:
898 ethtool_link_ksettings_add_link_mode(ks, supported,
899 10000baseT_Full);
900 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
901 ethtool_link_ksettings_add_link_mode(ks, advertising,
902 10000baseT_Full);
903 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
904 break;
905 case I40E_PHY_TYPE_SGMII:
906 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
907 ethtool_link_ksettings_add_link_mode(ks, supported,
908 1000baseT_Full);
909 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
910 ethtool_link_ksettings_add_link_mode(ks, advertising,
911 1000baseT_Full);
912 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
913 ethtool_link_ksettings_add_link_mode(ks, supported,
914 100baseT_Full);
915 if (hw_link_info->requested_speeds &
916 I40E_LINK_SPEED_100MB)
917 ethtool_link_ksettings_add_link_mode(
918 ks, advertising, 100baseT_Full);
919 }
920 break;
921 case I40E_PHY_TYPE_40GBASE_KR4:
922 case I40E_PHY_TYPE_25GBASE_KR:
923 case I40E_PHY_TYPE_20GBASE_KR2:
924 case I40E_PHY_TYPE_10GBASE_KR:
925 case I40E_PHY_TYPE_10GBASE_KX4:
926 case I40E_PHY_TYPE_1000BASE_KX:
927 ethtool_link_ksettings_add_link_mode(ks, supported,
928 40000baseKR4_Full);
929 ethtool_link_ksettings_add_link_mode(ks, supported,
930 25000baseKR_Full);
931 ethtool_link_ksettings_add_link_mode(ks, supported,
932 20000baseKR2_Full);
933 ethtool_link_ksettings_add_link_mode(ks, supported,
934 10000baseKR_Full);
935 ethtool_link_ksettings_add_link_mode(ks, supported,
936 10000baseKX4_Full);
937 ethtool_link_ksettings_add_link_mode(ks, supported,
938 1000baseKX_Full);
939 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
940 ethtool_link_ksettings_add_link_mode(ks, advertising,
941 40000baseKR4_Full);
942 ethtool_link_ksettings_add_link_mode(ks, advertising,
943 25000baseKR_Full);
944 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
945 ethtool_link_ksettings_add_link_mode(ks, advertising,
946 20000baseKR2_Full);
947 ethtool_link_ksettings_add_link_mode(ks, advertising,
948 10000baseKR_Full);
949 ethtool_link_ksettings_add_link_mode(ks, advertising,
950 10000baseKX4_Full);
951 ethtool_link_ksettings_add_link_mode(ks, advertising,
952 1000baseKX_Full);
953 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
954 break;
955 case I40E_PHY_TYPE_25GBASE_CR:
956 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
957 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
958 ethtool_link_ksettings_add_link_mode(ks, supported,
959 25000baseCR_Full);
960 ethtool_link_ksettings_add_link_mode(ks, advertising,
961 25000baseCR_Full);
962 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
963
964 break;
965 case I40E_PHY_TYPE_25GBASE_AOC:
966 case I40E_PHY_TYPE_25GBASE_ACC:
967 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
968 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
969 ethtool_link_ksettings_add_link_mode(ks, supported,
970 25000baseCR_Full);
971 ethtool_link_ksettings_add_link_mode(ks, advertising,
972 25000baseCR_Full);
973 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
974
975 ethtool_link_ksettings_add_link_mode(ks, supported,
976 10000baseCR_Full);
977 ethtool_link_ksettings_add_link_mode(ks, advertising,
978 10000baseCR_Full);
979 break;
980 default:
981 /* if we got here and link is up something bad is afoot */
982 netdev_info(netdev,
983 "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n",
984 hw_link_info->phy_type);
985 }
986
987 /* Now that we've worked out everything that could be supported by the
988 * current PHY type, get what is supported by the NVM and intersect
989 * them to get what is truly supported
990 */
991 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
992 i40e_phy_type_to_ethtool(pf, &cap_ksettings);
993 ethtool_intersect_link_masks(ks, &cap_ksettings);
994
995 /* Set speed and duplex */
996 switch (link_speed) {
997 case I40E_LINK_SPEED_40GB:
998 ks->base.speed = SPEED_40000;
999 break;
1000 case I40E_LINK_SPEED_25GB:
1001 ks->base.speed = SPEED_25000;
1002 break;
1003 case I40E_LINK_SPEED_20GB:
1004 ks->base.speed = SPEED_20000;
1005 break;
1006 case I40E_LINK_SPEED_10GB:
1007 ks->base.speed = SPEED_10000;
1008 break;
1009 case I40E_LINK_SPEED_5GB:
1010 ks->base.speed = SPEED_5000;
1011 break;
1012 case I40E_LINK_SPEED_2_5GB:
1013 ks->base.speed = SPEED_2500;
1014 break;
1015 case I40E_LINK_SPEED_1GB:
1016 ks->base.speed = SPEED_1000;
1017 break;
1018 case I40E_LINK_SPEED_100MB:
1019 ks->base.speed = SPEED_100;
1020 break;
1021 default:
1022 ks->base.speed = SPEED_UNKNOWN;
1023 break;
1024 }
1025 ks->base.duplex = DUPLEX_FULL;
1026 }
1027
1028 /**
1029 * i40e_get_settings_link_down - Get the Link settings for when link is down
1030 * @hw: hw structure
1031 * @ks: ethtool ksettings to fill in
1032 * @pf: pointer to physical function struct
1033 *
1034 * Reports link settings that can be determined when link is down
1035 **/
i40e_get_settings_link_down(struct i40e_hw * hw,struct ethtool_link_ksettings * ks,struct i40e_pf * pf)1036 static void i40e_get_settings_link_down(struct i40e_hw *hw,
1037 struct ethtool_link_ksettings *ks,
1038 struct i40e_pf *pf)
1039 {
1040 /* link is down and the driver needs to fall back on
1041 * supported phy types to figure out what info to display
1042 */
1043 i40e_phy_type_to_ethtool(pf, ks);
1044
1045 /* With no link speed and duplex are unknown */
1046 ks->base.speed = SPEED_UNKNOWN;
1047 ks->base.duplex = DUPLEX_UNKNOWN;
1048 }
1049
1050 /**
1051 * i40e_get_link_ksettings - Get Link Speed and Duplex settings
1052 * @netdev: network interface device structure
1053 * @ks: ethtool ksettings
1054 *
1055 * Reports speed/duplex settings based on media_type
1056 **/
i40e_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * ks)1057 static int i40e_get_link_ksettings(struct net_device *netdev,
1058 struct ethtool_link_ksettings *ks)
1059 {
1060 struct i40e_netdev_priv *np = netdev_priv(netdev);
1061 struct i40e_pf *pf = np->vsi->back;
1062 struct i40e_hw *hw = &pf->hw;
1063 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1064 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1065
1066 ethtool_link_ksettings_zero_link_mode(ks, supported);
1067 ethtool_link_ksettings_zero_link_mode(ks, advertising);
1068
1069 if (link_up)
1070 i40e_get_settings_link_up(hw, ks, netdev, pf);
1071 else
1072 i40e_get_settings_link_down(hw, ks, pf);
1073
1074 /* Now set the settings that don't rely on link being up/down */
1075 /* Set autoneg settings */
1076 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1077 AUTONEG_ENABLE : AUTONEG_DISABLE);
1078
1079 /* Set media type settings */
1080 switch (hw->phy.media_type) {
1081 case I40E_MEDIA_TYPE_BACKPLANE:
1082 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
1083 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
1084 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
1085 ethtool_link_ksettings_add_link_mode(ks, advertising,
1086 Backplane);
1087 ks->base.port = PORT_NONE;
1088 break;
1089 case I40E_MEDIA_TYPE_BASET:
1090 ethtool_link_ksettings_add_link_mode(ks, supported, TP);
1091 ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
1092 ks->base.port = PORT_TP;
1093 break;
1094 case I40E_MEDIA_TYPE_DA:
1095 case I40E_MEDIA_TYPE_CX4:
1096 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1097 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1098 ks->base.port = PORT_DA;
1099 break;
1100 case I40E_MEDIA_TYPE_FIBER:
1101 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1102 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1103 ks->base.port = PORT_FIBRE;
1104 break;
1105 case I40E_MEDIA_TYPE_UNKNOWN:
1106 default:
1107 ks->base.port = PORT_OTHER;
1108 break;
1109 }
1110
1111 /* Set flow control settings */
1112 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
1113 ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause);
1114
1115 switch (hw->fc.requested_mode) {
1116 case I40E_FC_FULL:
1117 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1118 break;
1119 case I40E_FC_TX_PAUSE:
1120 ethtool_link_ksettings_add_link_mode(ks, advertising,
1121 Asym_Pause);
1122 break;
1123 case I40E_FC_RX_PAUSE:
1124 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1125 ethtool_link_ksettings_add_link_mode(ks, advertising,
1126 Asym_Pause);
1127 break;
1128 default:
1129 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
1130 ethtool_link_ksettings_del_link_mode(ks, advertising,
1131 Asym_Pause);
1132 break;
1133 }
1134
1135 return 0;
1136 }
1137
1138 /**
1139 * i40e_set_link_ksettings - Set Speed and Duplex
1140 * @netdev: network interface device structure
1141 * @ks: ethtool ksettings
1142 *
1143 * Set speed/duplex per media_types advertised/forced
1144 **/
i40e_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * ks)1145 static int i40e_set_link_ksettings(struct net_device *netdev,
1146 const struct ethtool_link_ksettings *ks)
1147 {
1148 struct i40e_netdev_priv *np = netdev_priv(netdev);
1149 struct i40e_aq_get_phy_abilities_resp abilities;
1150 struct ethtool_link_ksettings safe_ks;
1151 struct ethtool_link_ksettings copy_ks;
1152 struct i40e_aq_set_phy_config config;
1153 struct i40e_pf *pf = np->vsi->back;
1154 struct i40e_vsi *vsi = np->vsi;
1155 struct i40e_hw *hw = &pf->hw;
1156 bool autoneg_changed = false;
1157 i40e_status status = 0;
1158 int timeout = 50;
1159 int err = 0;
1160 u8 autoneg;
1161
1162 /* Changing port settings is not supported if this isn't the
1163 * port's controlling PF
1164 */
1165 if (hw->partition_id != 1) {
1166 i40e_partition_setting_complaint(pf);
1167 return -EOPNOTSUPP;
1168 }
1169 if (vsi != pf->vsi[pf->lan_vsi])
1170 return -EOPNOTSUPP;
1171 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
1172 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
1173 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
1174 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
1175 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
1176 return -EOPNOTSUPP;
1177 if (hw->device_id == I40E_DEV_ID_KX_B ||
1178 hw->device_id == I40E_DEV_ID_KX_C ||
1179 hw->device_id == I40E_DEV_ID_20G_KR2 ||
1180 hw->device_id == I40E_DEV_ID_20G_KR2_A ||
1181 hw->device_id == I40E_DEV_ID_25G_B ||
1182 hw->device_id == I40E_DEV_ID_KX_X722) {
1183 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
1184 return -EOPNOTSUPP;
1185 }
1186
1187 /* copy the ksettings to copy_ks to avoid modifying the origin */
1188 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings));
1189
1190 /* save autoneg out of ksettings */
1191 autoneg = copy_ks.base.autoneg;
1192
1193 /* get our own copy of the bits to check against */
1194 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
1195 safe_ks.base.cmd = copy_ks.base.cmd;
1196 safe_ks.base.link_mode_masks_nwords =
1197 copy_ks.base.link_mode_masks_nwords;
1198 i40e_get_link_ksettings(netdev, &safe_ks);
1199
1200 /* Get link modes supported by hardware and check against modes
1201 * requested by the user. Return an error if unsupported mode was set.
1202 */
1203 if (!bitmap_subset(copy_ks.link_modes.advertising,
1204 safe_ks.link_modes.supported,
1205 __ETHTOOL_LINK_MODE_MASK_NBITS))
1206 return -EINVAL;
1207
1208 /* set autoneg back to what it currently is */
1209 copy_ks.base.autoneg = safe_ks.base.autoneg;
1210
1211 /* If copy_ks.base and safe_ks.base are not the same now, then they are
1212 * trying to set something that we do not support.
1213 */
1214 if (memcmp(©_ks.base, &safe_ks.base,
1215 sizeof(struct ethtool_link_settings)))
1216 return -EOPNOTSUPP;
1217
1218 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1219 timeout--;
1220 if (!timeout)
1221 return -EBUSY;
1222 usleep_range(1000, 2000);
1223 }
1224
1225 /* Get the current phy config */
1226 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1227 NULL);
1228 if (status) {
1229 err = -EAGAIN;
1230 goto done;
1231 }
1232
1233 /* Copy abilities to config in case autoneg is not
1234 * set below
1235 */
1236 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
1237 config.abilities = abilities.abilities;
1238
1239 /* Check autoneg */
1240 if (autoneg == AUTONEG_ENABLE) {
1241 /* If autoneg was not already enabled */
1242 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
1243 /* If autoneg is not supported, return error */
1244 if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
1245 supported,
1246 Autoneg)) {
1247 netdev_info(netdev, "Autoneg not supported on this phy\n");
1248 err = -EINVAL;
1249 goto done;
1250 }
1251 /* Autoneg is allowed to change */
1252 config.abilities = abilities.abilities |
1253 I40E_AQ_PHY_ENABLE_AN;
1254 autoneg_changed = true;
1255 }
1256 } else {
1257 /* If autoneg is currently enabled */
1258 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
1259 /* If autoneg is supported 10GBASE_T is the only PHY
1260 * that can disable it, so otherwise return error
1261 */
1262 if (ethtool_link_ksettings_test_link_mode(&safe_ks,
1263 supported,
1264 Autoneg) &&
1265 hw->phy.media_type != I40E_MEDIA_TYPE_BASET) {
1266 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
1267 err = -EINVAL;
1268 goto done;
1269 }
1270 /* Autoneg is allowed to change */
1271 config.abilities = abilities.abilities &
1272 ~I40E_AQ_PHY_ENABLE_AN;
1273 autoneg_changed = true;
1274 }
1275 }
1276
1277 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1278 100baseT_Full))
1279 config.link_speed |= I40E_LINK_SPEED_100MB;
1280 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1281 1000baseT_Full) ||
1282 ethtool_link_ksettings_test_link_mode(ks, advertising,
1283 1000baseX_Full) ||
1284 ethtool_link_ksettings_test_link_mode(ks, advertising,
1285 1000baseKX_Full))
1286 config.link_speed |= I40E_LINK_SPEED_1GB;
1287 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1288 10000baseT_Full) ||
1289 ethtool_link_ksettings_test_link_mode(ks, advertising,
1290 10000baseKX4_Full) ||
1291 ethtool_link_ksettings_test_link_mode(ks, advertising,
1292 10000baseKR_Full) ||
1293 ethtool_link_ksettings_test_link_mode(ks, advertising,
1294 10000baseCR_Full) ||
1295 ethtool_link_ksettings_test_link_mode(ks, advertising,
1296 10000baseSR_Full) ||
1297 ethtool_link_ksettings_test_link_mode(ks, advertising,
1298 10000baseLR_Full))
1299 config.link_speed |= I40E_LINK_SPEED_10GB;
1300 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1301 2500baseT_Full))
1302 config.link_speed |= I40E_LINK_SPEED_2_5GB;
1303 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1304 5000baseT_Full))
1305 config.link_speed |= I40E_LINK_SPEED_5GB;
1306 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1307 20000baseKR2_Full))
1308 config.link_speed |= I40E_LINK_SPEED_20GB;
1309 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1310 25000baseCR_Full) ||
1311 ethtool_link_ksettings_test_link_mode(ks, advertising,
1312 25000baseKR_Full) ||
1313 ethtool_link_ksettings_test_link_mode(ks, advertising,
1314 25000baseSR_Full))
1315 config.link_speed |= I40E_LINK_SPEED_25GB;
1316 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1317 40000baseKR4_Full) ||
1318 ethtool_link_ksettings_test_link_mode(ks, advertising,
1319 40000baseCR4_Full) ||
1320 ethtool_link_ksettings_test_link_mode(ks, advertising,
1321 40000baseSR4_Full) ||
1322 ethtool_link_ksettings_test_link_mode(ks, advertising,
1323 40000baseLR4_Full))
1324 config.link_speed |= I40E_LINK_SPEED_40GB;
1325
1326 /* If speed didn't get set, set it to what it currently is.
1327 * This is needed because if advertise is 0 (as it is when autoneg
1328 * is disabled) then speed won't get set.
1329 */
1330 if (!config.link_speed)
1331 config.link_speed = abilities.link_speed;
1332 if (autoneg_changed || abilities.link_speed != config.link_speed) {
1333 /* copy over the rest of the abilities */
1334 config.phy_type = abilities.phy_type;
1335 config.phy_type_ext = abilities.phy_type_ext;
1336 config.eee_capability = abilities.eee_capability;
1337 config.eeer = abilities.eeer_val;
1338 config.low_power_ctrl = abilities.d3_lpan;
1339 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1340 I40E_AQ_PHY_FEC_CONFIG_MASK;
1341
1342 /* save the requested speeds */
1343 hw->phy.link_info.requested_speeds = config.link_speed;
1344 /* set link and auto negotiation so changes take effect */
1345 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1346 /* If link is up put link down */
1347 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1348 /* Tell the OS link is going down, the link will go
1349 * back up when fw says it is ready asynchronously
1350 */
1351 i40e_print_link_message(vsi, false);
1352 netif_carrier_off(netdev);
1353 netif_tx_stop_all_queues(netdev);
1354 }
1355
1356 /* make the aq call */
1357 status = i40e_aq_set_phy_config(hw, &config, NULL);
1358 if (status) {
1359 netdev_info(netdev,
1360 "Set phy config failed, err %s aq_err %s\n",
1361 i40e_stat_str(hw, status),
1362 i40e_aq_str(hw, hw->aq.asq_last_status));
1363 err = -EAGAIN;
1364 goto done;
1365 }
1366
1367 status = i40e_update_link_info(hw);
1368 if (status)
1369 netdev_dbg(netdev,
1370 "Updating link info failed with err %s aq_err %s\n",
1371 i40e_stat_str(hw, status),
1372 i40e_aq_str(hw, hw->aq.asq_last_status));
1373
1374 } else {
1375 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1376 }
1377
1378 done:
1379 clear_bit(__I40E_CONFIG_BUSY, pf->state);
1380
1381 return err;
1382 }
1383
i40e_set_fec_cfg(struct net_device * netdev,u8 fec_cfg)1384 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
1385 {
1386 struct i40e_netdev_priv *np = netdev_priv(netdev);
1387 struct i40e_aq_get_phy_abilities_resp abilities;
1388 struct i40e_pf *pf = np->vsi->back;
1389 struct i40e_hw *hw = &pf->hw;
1390 i40e_status status = 0;
1391 u32 flags = 0;
1392 int err = 0;
1393
1394 flags = READ_ONCE(pf->flags);
1395 i40e_set_fec_in_flags(fec_cfg, &flags);
1396
1397 /* Get the current phy config */
1398 memset(&abilities, 0, sizeof(abilities));
1399 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1400 NULL);
1401 if (status) {
1402 err = -EAGAIN;
1403 goto done;
1404 }
1405
1406 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) {
1407 struct i40e_aq_set_phy_config config;
1408
1409 memset(&config, 0, sizeof(config));
1410 config.phy_type = abilities.phy_type;
1411 config.abilities = abilities.abilities |
1412 I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1413 config.phy_type_ext = abilities.phy_type_ext;
1414 config.link_speed = abilities.link_speed;
1415 config.eee_capability = abilities.eee_capability;
1416 config.eeer = abilities.eeer_val;
1417 config.low_power_ctrl = abilities.d3_lpan;
1418 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK;
1419 status = i40e_aq_set_phy_config(hw, &config, NULL);
1420 if (status) {
1421 netdev_info(netdev,
1422 "Set phy config failed, err %s aq_err %s\n",
1423 i40e_stat_str(hw, status),
1424 i40e_aq_str(hw, hw->aq.asq_last_status));
1425 err = -EAGAIN;
1426 goto done;
1427 }
1428 pf->flags = flags;
1429 status = i40e_update_link_info(hw);
1430 if (status)
1431 /* debug level message only due to relation to the link
1432 * itself rather than to the FEC settings
1433 * (e.g. no physical connection etc.)
1434 */
1435 netdev_dbg(netdev,
1436 "Updating link info failed with err %s aq_err %s\n",
1437 i40e_stat_str(hw, status),
1438 i40e_aq_str(hw, hw->aq.asq_last_status));
1439 }
1440
1441 done:
1442 return err;
1443 }
1444
i40e_get_fec_param(struct net_device * netdev,struct ethtool_fecparam * fecparam)1445 static int i40e_get_fec_param(struct net_device *netdev,
1446 struct ethtool_fecparam *fecparam)
1447 {
1448 struct i40e_netdev_priv *np = netdev_priv(netdev);
1449 struct i40e_aq_get_phy_abilities_resp abilities;
1450 struct i40e_pf *pf = np->vsi->back;
1451 struct i40e_hw *hw = &pf->hw;
1452 i40e_status status = 0;
1453 int err = 0;
1454 u8 fec_cfg;
1455
1456 /* Get the current phy config */
1457 memset(&abilities, 0, sizeof(abilities));
1458 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1459 NULL);
1460 if (status) {
1461 err = -EAGAIN;
1462 goto done;
1463 }
1464
1465 fecparam->fec = 0;
1466 fec_cfg = abilities.fec_cfg_curr_mod_ext_info;
1467 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
1468 fecparam->fec |= ETHTOOL_FEC_AUTO;
1469 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS |
1470 I40E_AQ_SET_FEC_ABILITY_RS))
1471 fecparam->fec |= ETHTOOL_FEC_RS;
1472 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR |
1473 I40E_AQ_SET_FEC_ABILITY_KR))
1474 fecparam->fec |= ETHTOOL_FEC_BASER;
1475 if (fec_cfg == 0)
1476 fecparam->fec |= ETHTOOL_FEC_OFF;
1477
1478 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)
1479 fecparam->active_fec = ETHTOOL_FEC_BASER;
1480 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)
1481 fecparam->active_fec = ETHTOOL_FEC_RS;
1482 else
1483 fecparam->active_fec = ETHTOOL_FEC_OFF;
1484 done:
1485 return err;
1486 }
1487
i40e_set_fec_param(struct net_device * netdev,struct ethtool_fecparam * fecparam)1488 static int i40e_set_fec_param(struct net_device *netdev,
1489 struct ethtool_fecparam *fecparam)
1490 {
1491 struct i40e_netdev_priv *np = netdev_priv(netdev);
1492 struct i40e_pf *pf = np->vsi->back;
1493 struct i40e_hw *hw = &pf->hw;
1494 u8 fec_cfg = 0;
1495
1496 if (hw->device_id != I40E_DEV_ID_25G_SFP28 &&
1497 hw->device_id != I40E_DEV_ID_25G_B &&
1498 hw->device_id != I40E_DEV_ID_KX_X722)
1499 return -EPERM;
1500
1501 if (hw->mac.type == I40E_MAC_X722 &&
1502 !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) {
1503 netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n");
1504 return -EOPNOTSUPP;
1505 }
1506
1507 switch (fecparam->fec) {
1508 case ETHTOOL_FEC_AUTO:
1509 fec_cfg = I40E_AQ_SET_FEC_AUTO;
1510 break;
1511 case ETHTOOL_FEC_RS:
1512 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
1513 I40E_AQ_SET_FEC_ABILITY_RS);
1514 break;
1515 case ETHTOOL_FEC_BASER:
1516 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
1517 I40E_AQ_SET_FEC_ABILITY_KR);
1518 break;
1519 case ETHTOOL_FEC_OFF:
1520 case ETHTOOL_FEC_NONE:
1521 fec_cfg = 0;
1522 break;
1523 default:
1524 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d",
1525 fecparam->fec);
1526 return -EINVAL;
1527 }
1528
1529 return i40e_set_fec_cfg(netdev, fec_cfg);
1530 }
1531
i40e_nway_reset(struct net_device * netdev)1532 static int i40e_nway_reset(struct net_device *netdev)
1533 {
1534 /* restart autonegotiation */
1535 struct i40e_netdev_priv *np = netdev_priv(netdev);
1536 struct i40e_pf *pf = np->vsi->back;
1537 struct i40e_hw *hw = &pf->hw;
1538 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1539 i40e_status ret = 0;
1540
1541 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1542 if (ret) {
1543 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
1544 i40e_stat_str(hw, ret),
1545 i40e_aq_str(hw, hw->aq.asq_last_status));
1546 return -EIO;
1547 }
1548
1549 return 0;
1550 }
1551
1552 /**
1553 * i40e_get_pauseparam - Get Flow Control status
1554 * @netdev: netdevice structure
1555 * @pause: buffer to return pause parameters
1556 *
1557 * Return tx/rx-pause status
1558 **/
i40e_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)1559 static void i40e_get_pauseparam(struct net_device *netdev,
1560 struct ethtool_pauseparam *pause)
1561 {
1562 struct i40e_netdev_priv *np = netdev_priv(netdev);
1563 struct i40e_pf *pf = np->vsi->back;
1564 struct i40e_hw *hw = &pf->hw;
1565 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1566 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1567
1568 pause->autoneg =
1569 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1570 AUTONEG_ENABLE : AUTONEG_DISABLE);
1571
1572 /* PFC enabled so report LFC as off */
1573 if (dcbx_cfg->pfc.pfcenable) {
1574 pause->rx_pause = 0;
1575 pause->tx_pause = 0;
1576 return;
1577 }
1578
1579 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
1580 pause->rx_pause = 1;
1581 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
1582 pause->tx_pause = 1;
1583 } else if (hw->fc.current_mode == I40E_FC_FULL) {
1584 pause->rx_pause = 1;
1585 pause->tx_pause = 1;
1586 }
1587 }
1588
1589 /**
1590 * i40e_set_pauseparam - Set Flow Control parameter
1591 * @netdev: network interface device structure
1592 * @pause: return tx/rx flow control status
1593 **/
i40e_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)1594 static int i40e_set_pauseparam(struct net_device *netdev,
1595 struct ethtool_pauseparam *pause)
1596 {
1597 struct i40e_netdev_priv *np = netdev_priv(netdev);
1598 struct i40e_pf *pf = np->vsi->back;
1599 struct i40e_vsi *vsi = np->vsi;
1600 struct i40e_hw *hw = &pf->hw;
1601 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1602 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1603 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1604 i40e_status status;
1605 u8 aq_failures;
1606 int err = 0;
1607 u32 is_an;
1608
1609 /* Changing the port's flow control is not supported if this isn't the
1610 * port's controlling PF
1611 */
1612 if (hw->partition_id != 1) {
1613 i40e_partition_setting_complaint(pf);
1614 return -EOPNOTSUPP;
1615 }
1616
1617 if (vsi != pf->vsi[pf->lan_vsi])
1618 return -EOPNOTSUPP;
1619
1620 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
1621 if (pause->autoneg != is_an) {
1622 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1623 return -EOPNOTSUPP;
1624 }
1625
1626 /* If we have link and don't have autoneg */
1627 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
1628 /* Send message that it might not necessarily work*/
1629 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1630 }
1631
1632 if (dcbx_cfg->pfc.pfcenable) {
1633 netdev_info(netdev,
1634 "Priority flow control enabled. Cannot set link flow control.\n");
1635 return -EOPNOTSUPP;
1636 }
1637
1638 if (pause->rx_pause && pause->tx_pause)
1639 hw->fc.requested_mode = I40E_FC_FULL;
1640 else if (pause->rx_pause && !pause->tx_pause)
1641 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1642 else if (!pause->rx_pause && pause->tx_pause)
1643 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1644 else if (!pause->rx_pause && !pause->tx_pause)
1645 hw->fc.requested_mode = I40E_FC_NONE;
1646 else
1647 return -EINVAL;
1648
1649 /* Tell the OS link is going down, the link will go back up when fw
1650 * says it is ready asynchronously
1651 */
1652 i40e_print_link_message(vsi, false);
1653 netif_carrier_off(netdev);
1654 netif_tx_stop_all_queues(netdev);
1655
1656 /* Set the fc mode and only restart an if link is up*/
1657 status = i40e_set_fc(hw, &aq_failures, link_up);
1658
1659 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1660 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1661 i40e_stat_str(hw, status),
1662 i40e_aq_str(hw, hw->aq.asq_last_status));
1663 err = -EAGAIN;
1664 }
1665 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1666 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1667 i40e_stat_str(hw, status),
1668 i40e_aq_str(hw, hw->aq.asq_last_status));
1669 err = -EAGAIN;
1670 }
1671 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1672 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1673 i40e_stat_str(hw, status),
1674 i40e_aq_str(hw, hw->aq.asq_last_status));
1675 err = -EAGAIN;
1676 }
1677
1678 if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
1679 /* Give it a little more time to try to come back */
1680 msleep(75);
1681 if (!test_bit(__I40E_DOWN, pf->state))
1682 return i40e_nway_reset(netdev);
1683 }
1684
1685 return err;
1686 }
1687
i40e_get_msglevel(struct net_device * netdev)1688 static u32 i40e_get_msglevel(struct net_device *netdev)
1689 {
1690 struct i40e_netdev_priv *np = netdev_priv(netdev);
1691 struct i40e_pf *pf = np->vsi->back;
1692 u32 debug_mask = pf->hw.debug_mask;
1693
1694 if (debug_mask)
1695 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1696
1697 return pf->msg_enable;
1698 }
1699
i40e_set_msglevel(struct net_device * netdev,u32 data)1700 static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1701 {
1702 struct i40e_netdev_priv *np = netdev_priv(netdev);
1703 struct i40e_pf *pf = np->vsi->back;
1704
1705 if (I40E_DEBUG_USER & data)
1706 pf->hw.debug_mask = data;
1707 else
1708 pf->msg_enable = data;
1709 }
1710
i40e_get_regs_len(struct net_device * netdev)1711 static int i40e_get_regs_len(struct net_device *netdev)
1712 {
1713 int reg_count = 0;
1714 int i;
1715
1716 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1717 reg_count += i40e_reg_list[i].elements;
1718
1719 return reg_count * sizeof(u32);
1720 }
1721
i40e_get_regs(struct net_device * netdev,struct ethtool_regs * regs,void * p)1722 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1723 void *p)
1724 {
1725 struct i40e_netdev_priv *np = netdev_priv(netdev);
1726 struct i40e_pf *pf = np->vsi->back;
1727 struct i40e_hw *hw = &pf->hw;
1728 u32 *reg_buf = p;
1729 unsigned int i, j, ri;
1730 u32 reg;
1731
1732 /* Tell ethtool which driver-version-specific regs output we have.
1733 *
1734 * At some point, if we have ethtool doing special formatting of
1735 * this data, it will rely on this version number to know how to
1736 * interpret things. Hence, this needs to be updated if/when the
1737 * diags register table is changed.
1738 */
1739 regs->version = 1;
1740
1741 /* loop through the diags reg table for what to print */
1742 ri = 0;
1743 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1744 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1745 reg = i40e_reg_list[i].offset
1746 + (j * i40e_reg_list[i].stride);
1747 reg_buf[ri++] = rd32(hw, reg);
1748 }
1749 }
1750
1751 }
1752
i40e_get_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)1753 static int i40e_get_eeprom(struct net_device *netdev,
1754 struct ethtool_eeprom *eeprom, u8 *bytes)
1755 {
1756 struct i40e_netdev_priv *np = netdev_priv(netdev);
1757 struct i40e_hw *hw = &np->vsi->back->hw;
1758 struct i40e_pf *pf = np->vsi->back;
1759 int ret_val = 0, len, offset;
1760 u8 *eeprom_buff;
1761 u16 i, sectors;
1762 bool last;
1763 u32 magic;
1764
1765 #define I40E_NVM_SECTOR_SIZE 4096
1766 if (eeprom->len == 0)
1767 return -EINVAL;
1768
1769 /* check for NVMUpdate access method */
1770 magic = hw->vendor_id | (hw->device_id << 16);
1771 if (eeprom->magic && eeprom->magic != magic) {
1772 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1773 int errno = 0;
1774
1775 /* make sure it is the right magic for NVMUpdate */
1776 if ((eeprom->magic >> 16) != hw->device_id)
1777 errno = -EINVAL;
1778 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1779 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1780 errno = -EBUSY;
1781 else
1782 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1783
1784 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1785 dev_info(&pf->pdev->dev,
1786 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1787 ret_val, hw->aq.asq_last_status, errno,
1788 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1789 cmd->offset, cmd->data_size);
1790
1791 return errno;
1792 }
1793
1794 /* normal ethtool get_eeprom support */
1795 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1796
1797 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1798 if (!eeprom_buff)
1799 return -ENOMEM;
1800
1801 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1802 if (ret_val) {
1803 dev_info(&pf->pdev->dev,
1804 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1805 ret_val, hw->aq.asq_last_status);
1806 goto free_buff;
1807 }
1808
1809 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1810 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1811 len = I40E_NVM_SECTOR_SIZE;
1812 last = false;
1813 for (i = 0; i < sectors; i++) {
1814 if (i == (sectors - 1)) {
1815 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1816 last = true;
1817 }
1818 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1819 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1820 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1821 last, NULL);
1822 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1823 dev_info(&pf->pdev->dev,
1824 "read NVM failed, invalid offset 0x%x\n",
1825 offset);
1826 break;
1827 } else if (ret_val &&
1828 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1829 dev_info(&pf->pdev->dev,
1830 "read NVM failed, access, offset 0x%x\n",
1831 offset);
1832 break;
1833 } else if (ret_val) {
1834 dev_info(&pf->pdev->dev,
1835 "read NVM failed offset %d err=%d status=0x%x\n",
1836 offset, ret_val, hw->aq.asq_last_status);
1837 break;
1838 }
1839 }
1840
1841 i40e_release_nvm(hw);
1842 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1843 free_buff:
1844 kfree(eeprom_buff);
1845 return ret_val;
1846 }
1847
i40e_get_eeprom_len(struct net_device * netdev)1848 static int i40e_get_eeprom_len(struct net_device *netdev)
1849 {
1850 struct i40e_netdev_priv *np = netdev_priv(netdev);
1851 struct i40e_hw *hw = &np->vsi->back->hw;
1852 u32 val;
1853
1854 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1855 if (hw->mac.type == I40E_MAC_X722) {
1856 val = X722_EEPROM_SCOPE_LIMIT + 1;
1857 return val;
1858 }
1859 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1860 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1861 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1862 /* register returns value in power of 2, 64Kbyte chunks. */
1863 val = (64 * 1024) * BIT(val);
1864 return val;
1865 }
1866
i40e_set_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)1867 static int i40e_set_eeprom(struct net_device *netdev,
1868 struct ethtool_eeprom *eeprom, u8 *bytes)
1869 {
1870 struct i40e_netdev_priv *np = netdev_priv(netdev);
1871 struct i40e_hw *hw = &np->vsi->back->hw;
1872 struct i40e_pf *pf = np->vsi->back;
1873 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1874 int ret_val = 0;
1875 int errno = 0;
1876 u32 magic;
1877
1878 /* normal ethtool set_eeprom is not supported */
1879 magic = hw->vendor_id | (hw->device_id << 16);
1880 if (eeprom->magic == magic)
1881 errno = -EOPNOTSUPP;
1882 /* check for NVMUpdate access method */
1883 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1884 errno = -EINVAL;
1885 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1886 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1887 errno = -EBUSY;
1888 else
1889 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1890
1891 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1892 dev_info(&pf->pdev->dev,
1893 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1894 ret_val, hw->aq.asq_last_status, errno,
1895 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1896 cmd->offset, cmd->data_size);
1897
1898 return errno;
1899 }
1900
i40e_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * drvinfo)1901 static void i40e_get_drvinfo(struct net_device *netdev,
1902 struct ethtool_drvinfo *drvinfo)
1903 {
1904 struct i40e_netdev_priv *np = netdev_priv(netdev);
1905 struct i40e_vsi *vsi = np->vsi;
1906 struct i40e_pf *pf = vsi->back;
1907
1908 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1909 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1910 sizeof(drvinfo->fw_version));
1911 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1912 sizeof(drvinfo->bus_info));
1913 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1914 if (pf->hw.pf_id == 0)
1915 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1916 }
1917
i40e_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)1918 static void i40e_get_ringparam(struct net_device *netdev,
1919 struct ethtool_ringparam *ring)
1920 {
1921 struct i40e_netdev_priv *np = netdev_priv(netdev);
1922 struct i40e_pf *pf = np->vsi->back;
1923 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1924
1925 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1926 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1927 ring->rx_mini_max_pending = 0;
1928 ring->rx_jumbo_max_pending = 0;
1929 ring->rx_pending = vsi->rx_rings[0]->count;
1930 ring->tx_pending = vsi->tx_rings[0]->count;
1931 ring->rx_mini_pending = 0;
1932 ring->rx_jumbo_pending = 0;
1933 }
1934
i40e_active_tx_ring_index(struct i40e_vsi * vsi,u16 index)1935 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1936 {
1937 if (i40e_enabled_xdp_vsi(vsi)) {
1938 return index < vsi->num_queue_pairs ||
1939 (index >= vsi->alloc_queue_pairs &&
1940 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1941 }
1942
1943 return index < vsi->num_queue_pairs;
1944 }
1945
i40e_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)1946 static int i40e_set_ringparam(struct net_device *netdev,
1947 struct ethtool_ringparam *ring)
1948 {
1949 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1950 struct i40e_netdev_priv *np = netdev_priv(netdev);
1951 struct i40e_hw *hw = &np->vsi->back->hw;
1952 struct i40e_vsi *vsi = np->vsi;
1953 struct i40e_pf *pf = vsi->back;
1954 u32 new_rx_count, new_tx_count;
1955 u16 tx_alloc_queue_pairs;
1956 int timeout = 50;
1957 int i, err = 0;
1958
1959 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1960 return -EINVAL;
1961
1962 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1963 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1964 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1965 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1966 netdev_info(netdev,
1967 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1968 ring->tx_pending, ring->rx_pending,
1969 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1970 return -EINVAL;
1971 }
1972
1973 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1974 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1975
1976 /* if nothing to do return success */
1977 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1978 (new_rx_count == vsi->rx_rings[0]->count))
1979 return 0;
1980
1981 /* If there is a AF_XDP page pool attached to any of Rx rings,
1982 * disallow changing the number of descriptors -- regardless
1983 * if the netdev is running or not.
1984 */
1985 if (i40e_xsk_any_rx_ring_enabled(vsi))
1986 return -EBUSY;
1987
1988 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1989 timeout--;
1990 if (!timeout)
1991 return -EBUSY;
1992 usleep_range(1000, 2000);
1993 }
1994
1995 if (!netif_running(vsi->netdev)) {
1996 /* simple case - set for the next time the netdev is started */
1997 for (i = 0; i < vsi->num_queue_pairs; i++) {
1998 vsi->tx_rings[i]->count = new_tx_count;
1999 vsi->rx_rings[i]->count = new_rx_count;
2000 if (i40e_enabled_xdp_vsi(vsi))
2001 vsi->xdp_rings[i]->count = new_tx_count;
2002 }
2003 vsi->num_tx_desc = new_tx_count;
2004 vsi->num_rx_desc = new_rx_count;
2005 goto done;
2006 }
2007
2008 /* We can't just free everything and then setup again,
2009 * because the ISRs in MSI-X mode get passed pointers
2010 * to the Tx and Rx ring structs.
2011 */
2012
2013 /* alloc updated Tx and XDP Tx resources */
2014 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
2015 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
2016 if (new_tx_count != vsi->tx_rings[0]->count) {
2017 netdev_info(netdev,
2018 "Changing Tx descriptor count from %d to %d.\n",
2019 vsi->tx_rings[0]->count, new_tx_count);
2020 tx_rings = kcalloc(tx_alloc_queue_pairs,
2021 sizeof(struct i40e_ring), GFP_KERNEL);
2022 if (!tx_rings) {
2023 err = -ENOMEM;
2024 goto done;
2025 }
2026
2027 for (i = 0; i < tx_alloc_queue_pairs; i++) {
2028 if (!i40e_active_tx_ring_index(vsi, i))
2029 continue;
2030
2031 tx_rings[i] = *vsi->tx_rings[i];
2032 tx_rings[i].count = new_tx_count;
2033 /* the desc and bi pointers will be reallocated in the
2034 * setup call
2035 */
2036 tx_rings[i].desc = NULL;
2037 tx_rings[i].rx_bi = NULL;
2038 err = i40e_setup_tx_descriptors(&tx_rings[i]);
2039 if (err) {
2040 while (i) {
2041 i--;
2042 if (!i40e_active_tx_ring_index(vsi, i))
2043 continue;
2044 i40e_free_tx_resources(&tx_rings[i]);
2045 }
2046 kfree(tx_rings);
2047 tx_rings = NULL;
2048
2049 goto done;
2050 }
2051 }
2052 }
2053
2054 /* alloc updated Rx resources */
2055 if (new_rx_count != vsi->rx_rings[0]->count) {
2056 netdev_info(netdev,
2057 "Changing Rx descriptor count from %d to %d\n",
2058 vsi->rx_rings[0]->count, new_rx_count);
2059 rx_rings = kcalloc(vsi->alloc_queue_pairs,
2060 sizeof(struct i40e_ring), GFP_KERNEL);
2061 if (!rx_rings) {
2062 err = -ENOMEM;
2063 goto free_tx;
2064 }
2065
2066 for (i = 0; i < vsi->num_queue_pairs; i++) {
2067 u16 unused;
2068
2069 /* clone ring and setup updated count */
2070 rx_rings[i] = *vsi->rx_rings[i];
2071 rx_rings[i].count = new_rx_count;
2072 /* the desc and bi pointers will be reallocated in the
2073 * setup call
2074 */
2075 rx_rings[i].desc = NULL;
2076 rx_rings[i].rx_bi = NULL;
2077 /* Clear cloned XDP RX-queue info before setup call */
2078 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
2079 /* this is to allow wr32 to have something to write to
2080 * during early allocation of Rx buffers
2081 */
2082 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
2083 err = i40e_setup_rx_descriptors(&rx_rings[i]);
2084 if (err)
2085 goto rx_unwind;
2086 err = i40e_alloc_rx_bi(&rx_rings[i]);
2087 if (err)
2088 goto rx_unwind;
2089
2090 /* now allocate the Rx buffers to make sure the OS
2091 * has enough memory, any failure here means abort
2092 */
2093 unused = I40E_DESC_UNUSED(&rx_rings[i]);
2094 err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
2095 rx_unwind:
2096 if (err) {
2097 do {
2098 i40e_free_rx_resources(&rx_rings[i]);
2099 } while (i--);
2100 kfree(rx_rings);
2101 rx_rings = NULL;
2102
2103 goto free_tx;
2104 }
2105 }
2106 }
2107
2108 /* Bring interface down, copy in the new ring info,
2109 * then restore the interface
2110 */
2111 i40e_down(vsi);
2112
2113 if (tx_rings) {
2114 for (i = 0; i < tx_alloc_queue_pairs; i++) {
2115 if (i40e_active_tx_ring_index(vsi, i)) {
2116 i40e_free_tx_resources(vsi->tx_rings[i]);
2117 *vsi->tx_rings[i] = tx_rings[i];
2118 }
2119 }
2120 kfree(tx_rings);
2121 tx_rings = NULL;
2122 }
2123
2124 if (rx_rings) {
2125 for (i = 0; i < vsi->num_queue_pairs; i++) {
2126 i40e_free_rx_resources(vsi->rx_rings[i]);
2127 /* get the real tail offset */
2128 rx_rings[i].tail = vsi->rx_rings[i]->tail;
2129 /* this is to fake out the allocation routine
2130 * into thinking it has to realloc everything
2131 * but the recycling logic will let us re-use
2132 * the buffers allocated above
2133 */
2134 rx_rings[i].next_to_use = 0;
2135 rx_rings[i].next_to_clean = 0;
2136 rx_rings[i].next_to_alloc = 0;
2137 /* do a struct copy */
2138 *vsi->rx_rings[i] = rx_rings[i];
2139 }
2140 kfree(rx_rings);
2141 rx_rings = NULL;
2142 }
2143
2144 vsi->num_tx_desc = new_tx_count;
2145 vsi->num_rx_desc = new_rx_count;
2146 i40e_up(vsi);
2147
2148 free_tx:
2149 /* error cleanup if the Rx allocations failed after getting Tx */
2150 if (tx_rings) {
2151 for (i = 0; i < tx_alloc_queue_pairs; i++) {
2152 if (i40e_active_tx_ring_index(vsi, i))
2153 i40e_free_tx_resources(vsi->tx_rings[i]);
2154 }
2155 kfree(tx_rings);
2156 tx_rings = NULL;
2157 }
2158
2159 done:
2160 clear_bit(__I40E_CONFIG_BUSY, pf->state);
2161
2162 return err;
2163 }
2164
2165 /**
2166 * i40e_get_stats_count - return the stats count for a device
2167 * @netdev: the netdev to return the count for
2168 *
2169 * Returns the total number of statistics for this netdev. Note that even
2170 * though this is a function, it is required that the count for a specific
2171 * netdev must never change. Basing the count on static values such as the
2172 * maximum number of queues or the device type is ok. However, the API for
2173 * obtaining stats is *not* safe against changes based on non-static
2174 * values such as the *current* number of queues, or runtime flags.
2175 *
2176 * If a statistic is not always enabled, return it as part of the count
2177 * anyways, always return its string, and report its value as zero.
2178 **/
i40e_get_stats_count(struct net_device * netdev)2179 static int i40e_get_stats_count(struct net_device *netdev)
2180 {
2181 struct i40e_netdev_priv *np = netdev_priv(netdev);
2182 struct i40e_vsi *vsi = np->vsi;
2183 struct i40e_pf *pf = vsi->back;
2184 int stats_len;
2185
2186 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1)
2187 stats_len = I40E_PF_STATS_LEN;
2188 else
2189 stats_len = I40E_VSI_STATS_LEN;
2190
2191 /* The number of stats reported for a given net_device must remain
2192 * constant throughout the life of that device.
2193 *
2194 * This is because the API for obtaining the size, strings, and stats
2195 * is spread out over three separate ethtool ioctls. There is no safe
2196 * way to lock the number of stats across these calls, so we must
2197 * assume that they will never change.
2198 *
2199 * Due to this, we report the maximum number of queues, even if not
2200 * every queue is currently configured. Since we always allocate
2201 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This
2202 * works because the num_tx_queues is set at device creation and never
2203 * changes.
2204 */
2205 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues;
2206
2207 return stats_len;
2208 }
2209
i40e_get_sset_count(struct net_device * netdev,int sset)2210 static int i40e_get_sset_count(struct net_device *netdev, int sset)
2211 {
2212 struct i40e_netdev_priv *np = netdev_priv(netdev);
2213 struct i40e_vsi *vsi = np->vsi;
2214 struct i40e_pf *pf = vsi->back;
2215
2216 switch (sset) {
2217 case ETH_SS_TEST:
2218 return I40E_TEST_LEN;
2219 case ETH_SS_STATS:
2220 return i40e_get_stats_count(netdev);
2221 case ETH_SS_PRIV_FLAGS:
2222 return I40E_PRIV_FLAGS_STR_LEN +
2223 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
2224 default:
2225 return -EOPNOTSUPP;
2226 }
2227 }
2228
2229 /**
2230 * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure
2231 * @tc: the TC statistics in VEB structure (veb->tc_stats)
2232 * @i: the index of traffic class in (veb->tc_stats) structure to copy
2233 *
2234 * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to
2235 * one dimensional structure i40e_cp_veb_tc_stats.
2236 * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC
2237 * statistics for the given TC.
2238 **/
2239 static struct i40e_cp_veb_tc_stats
i40e_get_veb_tc_stats(struct i40e_veb_tc_stats * tc,unsigned int i)2240 i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i)
2241 {
2242 struct i40e_cp_veb_tc_stats veb_tc = {
2243 .tc_rx_packets = tc->tc_rx_packets[i],
2244 .tc_rx_bytes = tc->tc_rx_bytes[i],
2245 .tc_tx_packets = tc->tc_tx_packets[i],
2246 .tc_tx_bytes = tc->tc_tx_bytes[i],
2247 };
2248
2249 return veb_tc;
2250 }
2251
2252 /**
2253 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
2254 * @pf: the PF device structure
2255 * @i: the priority value to copy
2256 *
2257 * The PFC stats are found as arrays in pf->stats, which is not easy to pass
2258 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
2259 * of the PFC stats for the given priority.
2260 **/
2261 static inline struct i40e_pfc_stats
i40e_get_pfc_stats(struct i40e_pf * pf,unsigned int i)2262 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
2263 {
2264 #define I40E_GET_PFC_STAT(stat, priority) \
2265 .stat = pf->stats.stat[priority]
2266
2267 struct i40e_pfc_stats pfc = {
2268 I40E_GET_PFC_STAT(priority_xon_rx, i),
2269 I40E_GET_PFC_STAT(priority_xoff_rx, i),
2270 I40E_GET_PFC_STAT(priority_xon_tx, i),
2271 I40E_GET_PFC_STAT(priority_xoff_tx, i),
2272 I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
2273 };
2274 return pfc;
2275 }
2276
2277 /**
2278 * i40e_get_ethtool_stats - copy stat values into supplied buffer
2279 * @netdev: the netdev to collect stats for
2280 * @stats: ethtool stats command structure
2281 * @data: ethtool supplied buffer
2282 *
2283 * Copy the stats values for this netdev into the buffer. Expects data to be
2284 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
2285 * statistics must be copied in a static order, and the count must not change
2286 * for a given netdev. See i40e_get_stats_count for more details.
2287 *
2288 * If a statistic is not currently valid (such as a disabled queue), this
2289 * function reports its value as zero.
2290 **/
i40e_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)2291 static void i40e_get_ethtool_stats(struct net_device *netdev,
2292 struct ethtool_stats *stats, u64 *data)
2293 {
2294 struct i40e_netdev_priv *np = netdev_priv(netdev);
2295 struct i40e_vsi *vsi = np->vsi;
2296 struct i40e_pf *pf = vsi->back;
2297 struct i40e_veb *veb = NULL;
2298 unsigned int i;
2299 bool veb_stats;
2300 u64 *p = data;
2301
2302 i40e_update_stats(vsi);
2303
2304 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
2305 i40e_gstrings_net_stats);
2306
2307 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
2308
2309 rcu_read_lock();
2310 for (i = 0; i < netdev->num_tx_queues; i++) {
2311 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i]));
2312 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i]));
2313 }
2314 rcu_read_unlock();
2315
2316 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2317 goto check_data_pointer;
2318
2319 veb_stats = ((pf->lan_veb != I40E_NO_VEB) &&
2320 (pf->lan_veb < I40E_MAX_VEB) &&
2321 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED));
2322
2323 if (veb_stats) {
2324 veb = pf->veb[pf->lan_veb];
2325 i40e_update_veb_stats(veb);
2326 }
2327
2328 /* If veb stats aren't enabled, pass NULL instead of the veb so that
2329 * we initialize stats to zero and update the data pointer
2330 * intelligently
2331 */
2332 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
2333 i40e_gstrings_veb_stats);
2334
2335 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2336 if (veb_stats) {
2337 struct i40e_cp_veb_tc_stats veb_tc =
2338 i40e_get_veb_tc_stats(&veb->tc_stats, i);
2339
2340 i40e_add_ethtool_stats(&data, &veb_tc,
2341 i40e_gstrings_veb_tc_stats);
2342 } else {
2343 i40e_add_ethtool_stats(&data, NULL,
2344 i40e_gstrings_veb_tc_stats);
2345 }
2346
2347 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
2348
2349 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
2350 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
2351
2352 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
2353 }
2354
2355 check_data_pointer:
2356 WARN_ONCE(data - p != i40e_get_stats_count(netdev),
2357 "ethtool stats count mismatch!");
2358 }
2359
2360 /**
2361 * i40e_get_stat_strings - copy stat strings into supplied buffer
2362 * @netdev: the netdev to collect strings for
2363 * @data: supplied buffer to copy strings into
2364 *
2365 * Copy the strings related to stats for this netdev. Expects data to be
2366 * pre-allocated with the size reported by i40e_get_stats_count. Note that the
2367 * strings must be copied in a static order and the total count must not
2368 * change for a given netdev. See i40e_get_stats_count for more details.
2369 **/
i40e_get_stat_strings(struct net_device * netdev,u8 * data)2370 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
2371 {
2372 struct i40e_netdev_priv *np = netdev_priv(netdev);
2373 struct i40e_vsi *vsi = np->vsi;
2374 struct i40e_pf *pf = vsi->back;
2375 unsigned int i;
2376 u8 *p = data;
2377
2378 i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
2379
2380 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
2381
2382 for (i = 0; i < netdev->num_tx_queues; i++) {
2383 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2384 "tx", i);
2385 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2386 "rx", i);
2387 }
2388
2389 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2390 goto check_data_pointer;
2391
2392 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
2393
2394 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2395 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
2396
2397 i40e_add_stat_strings(&data, i40e_gstrings_stats);
2398
2399 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
2400 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
2401
2402 check_data_pointer:
2403 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
2404 "stat strings count mismatch!");
2405 }
2406
i40e_get_priv_flag_strings(struct net_device * netdev,u8 * data)2407 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
2408 {
2409 struct i40e_netdev_priv *np = netdev_priv(netdev);
2410 struct i40e_vsi *vsi = np->vsi;
2411 struct i40e_pf *pf = vsi->back;
2412 char *p = (char *)data;
2413 unsigned int i;
2414
2415 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
2416 snprintf(p, ETH_GSTRING_LEN, "%s",
2417 i40e_gstrings_priv_flags[i].flag_string);
2418 p += ETH_GSTRING_LEN;
2419 }
2420 if (pf->hw.pf_id != 0)
2421 return;
2422 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
2423 snprintf(p, ETH_GSTRING_LEN, "%s",
2424 i40e_gl_gstrings_priv_flags[i].flag_string);
2425 p += ETH_GSTRING_LEN;
2426 }
2427 }
2428
i40e_get_strings(struct net_device * netdev,u32 stringset,u8 * data)2429 static void i40e_get_strings(struct net_device *netdev, u32 stringset,
2430 u8 *data)
2431 {
2432 switch (stringset) {
2433 case ETH_SS_TEST:
2434 memcpy(data, i40e_gstrings_test,
2435 I40E_TEST_LEN * ETH_GSTRING_LEN);
2436 break;
2437 case ETH_SS_STATS:
2438 i40e_get_stat_strings(netdev, data);
2439 break;
2440 case ETH_SS_PRIV_FLAGS:
2441 i40e_get_priv_flag_strings(netdev, data);
2442 break;
2443 default:
2444 break;
2445 }
2446 }
2447
i40e_get_ts_info(struct net_device * dev,struct ethtool_ts_info * info)2448 static int i40e_get_ts_info(struct net_device *dev,
2449 struct ethtool_ts_info *info)
2450 {
2451 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
2452
2453 /* only report HW timestamping if PTP is enabled */
2454 if (!(pf->flags & I40E_FLAG_PTP))
2455 return ethtool_op_get_ts_info(dev, info);
2456
2457 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2458 SOF_TIMESTAMPING_RX_SOFTWARE |
2459 SOF_TIMESTAMPING_SOFTWARE |
2460 SOF_TIMESTAMPING_TX_HARDWARE |
2461 SOF_TIMESTAMPING_RX_HARDWARE |
2462 SOF_TIMESTAMPING_RAW_HARDWARE;
2463
2464 if (pf->ptp_clock)
2465 info->phc_index = ptp_clock_index(pf->ptp_clock);
2466 else
2467 info->phc_index = -1;
2468
2469 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2470
2471 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
2472 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2473 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2474 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
2475
2476 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
2477 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2478 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2479 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2480 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2481 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2482 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2483 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2484 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
2485
2486 return 0;
2487 }
2488
i40e_link_test(struct net_device * netdev,u64 * data)2489 static u64 i40e_link_test(struct net_device *netdev, u64 *data)
2490 {
2491 struct i40e_netdev_priv *np = netdev_priv(netdev);
2492 struct i40e_pf *pf = np->vsi->back;
2493 i40e_status status;
2494 bool link_up = false;
2495
2496 netif_info(pf, hw, netdev, "link test\n");
2497 status = i40e_get_link_status(&pf->hw, &link_up);
2498 if (status) {
2499 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
2500 *data = 1;
2501 return *data;
2502 }
2503
2504 if (link_up)
2505 *data = 0;
2506 else
2507 *data = 1;
2508
2509 return *data;
2510 }
2511
i40e_reg_test(struct net_device * netdev,u64 * data)2512 static u64 i40e_reg_test(struct net_device *netdev, u64 *data)
2513 {
2514 struct i40e_netdev_priv *np = netdev_priv(netdev);
2515 struct i40e_pf *pf = np->vsi->back;
2516
2517 netif_info(pf, hw, netdev, "register test\n");
2518 *data = i40e_diag_reg_test(&pf->hw);
2519
2520 return *data;
2521 }
2522
i40e_eeprom_test(struct net_device * netdev,u64 * data)2523 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data)
2524 {
2525 struct i40e_netdev_priv *np = netdev_priv(netdev);
2526 struct i40e_pf *pf = np->vsi->back;
2527
2528 netif_info(pf, hw, netdev, "eeprom test\n");
2529 *data = i40e_diag_eeprom_test(&pf->hw);
2530
2531 /* forcebly clear the NVM Update state machine */
2532 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
2533
2534 return *data;
2535 }
2536
i40e_intr_test(struct net_device * netdev,u64 * data)2537 static u64 i40e_intr_test(struct net_device *netdev, u64 *data)
2538 {
2539 struct i40e_netdev_priv *np = netdev_priv(netdev);
2540 struct i40e_pf *pf = np->vsi->back;
2541 u16 swc_old = pf->sw_int_count;
2542
2543 netif_info(pf, hw, netdev, "interrupt test\n");
2544 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
2545 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
2546 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2547 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2548 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2549 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
2550 usleep_range(1000, 2000);
2551 *data = (swc_old == pf->sw_int_count);
2552
2553 return *data;
2554 }
2555
i40e_active_vfs(struct i40e_pf * pf)2556 static inline bool i40e_active_vfs(struct i40e_pf *pf)
2557 {
2558 struct i40e_vf *vfs = pf->vf;
2559 int i;
2560
2561 for (i = 0; i < pf->num_alloc_vfs; i++)
2562 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
2563 return true;
2564 return false;
2565 }
2566
i40e_active_vmdqs(struct i40e_pf * pf)2567 static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2568 {
2569 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
2570 }
2571
i40e_diag_test(struct net_device * netdev,struct ethtool_test * eth_test,u64 * data)2572 static void i40e_diag_test(struct net_device *netdev,
2573 struct ethtool_test *eth_test, u64 *data)
2574 {
2575 struct i40e_netdev_priv *np = netdev_priv(netdev);
2576 bool if_running = netif_running(netdev);
2577 struct i40e_pf *pf = np->vsi->back;
2578
2579 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2580 /* Offline tests */
2581 netif_info(pf, drv, netdev, "offline testing starting\n");
2582
2583 set_bit(__I40E_TESTING, pf->state);
2584
2585 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
2586 dev_warn(&pf->pdev->dev,
2587 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
2588 data[I40E_ETH_TEST_REG] = 1;
2589 data[I40E_ETH_TEST_EEPROM] = 1;
2590 data[I40E_ETH_TEST_INTR] = 1;
2591 data[I40E_ETH_TEST_LINK] = 1;
2592 eth_test->flags |= ETH_TEST_FL_FAILED;
2593 clear_bit(__I40E_TESTING, pf->state);
2594 goto skip_ol_tests;
2595 }
2596
2597 /* If the device is online then take it offline */
2598 if (if_running)
2599 /* indicate we're in test mode */
2600 i40e_close(netdev);
2601 else
2602 /* This reset does not affect link - if it is
2603 * changed to a type of reset that does affect
2604 * link then the following link test would have
2605 * to be moved to before the reset
2606 */
2607 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2608
2609 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2610 eth_test->flags |= ETH_TEST_FL_FAILED;
2611
2612 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
2613 eth_test->flags |= ETH_TEST_FL_FAILED;
2614
2615 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
2616 eth_test->flags |= ETH_TEST_FL_FAILED;
2617
2618 /* run reg test last, a reset is required after it */
2619 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2620 eth_test->flags |= ETH_TEST_FL_FAILED;
2621
2622 clear_bit(__I40E_TESTING, pf->state);
2623 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2624
2625 if (if_running)
2626 i40e_open(netdev);
2627 } else {
2628 /* Online tests */
2629 netif_info(pf, drv, netdev, "online testing starting\n");
2630
2631 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2632 eth_test->flags |= ETH_TEST_FL_FAILED;
2633
2634 /* Offline only tests, not run in online; pass by default */
2635 data[I40E_ETH_TEST_REG] = 0;
2636 data[I40E_ETH_TEST_EEPROM] = 0;
2637 data[I40E_ETH_TEST_INTR] = 0;
2638 }
2639
2640 skip_ol_tests:
2641
2642 netif_info(pf, drv, netdev, "testing finished\n");
2643 }
2644
i40e_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)2645 static void i40e_get_wol(struct net_device *netdev,
2646 struct ethtool_wolinfo *wol)
2647 {
2648 struct i40e_netdev_priv *np = netdev_priv(netdev);
2649 struct i40e_pf *pf = np->vsi->back;
2650 struct i40e_hw *hw = &pf->hw;
2651 u16 wol_nvm_bits;
2652
2653 /* NVM bit on means WoL disabled for the port */
2654 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2655 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
2656 wol->supported = 0;
2657 wol->wolopts = 0;
2658 } else {
2659 wol->supported = WAKE_MAGIC;
2660 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2661 }
2662 }
2663
2664 /**
2665 * i40e_set_wol - set the WakeOnLAN configuration
2666 * @netdev: the netdev in question
2667 * @wol: the ethtool WoL setting data
2668 **/
i40e_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)2669 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2670 {
2671 struct i40e_netdev_priv *np = netdev_priv(netdev);
2672 struct i40e_pf *pf = np->vsi->back;
2673 struct i40e_vsi *vsi = np->vsi;
2674 struct i40e_hw *hw = &pf->hw;
2675 u16 wol_nvm_bits;
2676
2677 /* WoL not supported if this isn't the controlling PF on the port */
2678 if (hw->partition_id != 1) {
2679 i40e_partition_setting_complaint(pf);
2680 return -EOPNOTSUPP;
2681 }
2682
2683 if (vsi != pf->vsi[pf->lan_vsi])
2684 return -EOPNOTSUPP;
2685
2686 /* NVM bit on means WoL disabled for the port */
2687 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2688 if (BIT(hw->port) & wol_nvm_bits)
2689 return -EOPNOTSUPP;
2690
2691 /* only magic packet is supported */
2692 if (wol->wolopts & ~WAKE_MAGIC)
2693 return -EOPNOTSUPP;
2694
2695 /* is this a new value? */
2696 if (pf->wol_en != !!wol->wolopts) {
2697 pf->wol_en = !!wol->wolopts;
2698 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2699 }
2700
2701 return 0;
2702 }
2703
i40e_set_phys_id(struct net_device * netdev,enum ethtool_phys_id_state state)2704 static int i40e_set_phys_id(struct net_device *netdev,
2705 enum ethtool_phys_id_state state)
2706 {
2707 struct i40e_netdev_priv *np = netdev_priv(netdev);
2708 i40e_status ret = 0;
2709 struct i40e_pf *pf = np->vsi->back;
2710 struct i40e_hw *hw = &pf->hw;
2711 int blink_freq = 2;
2712 u16 temp_status;
2713
2714 switch (state) {
2715 case ETHTOOL_ID_ACTIVE:
2716 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2717 pf->led_status = i40e_led_get(hw);
2718 } else {
2719 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2720 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2721 NULL);
2722 ret = i40e_led_get_phy(hw, &temp_status,
2723 &pf->phy_led_val);
2724 pf->led_status = temp_status;
2725 }
2726 return blink_freq;
2727 case ETHTOOL_ID_ON:
2728 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2729 i40e_led_set(hw, 0xf, false);
2730 else
2731 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2732 break;
2733 case ETHTOOL_ID_OFF:
2734 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2735 i40e_led_set(hw, 0x0, false);
2736 else
2737 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2738 break;
2739 case ETHTOOL_ID_INACTIVE:
2740 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2741 i40e_led_set(hw, pf->led_status, false);
2742 } else {
2743 ret = i40e_led_set_phy(hw, false, pf->led_status,
2744 (pf->phy_led_val |
2745 I40E_PHY_LED_MODE_ORIG));
2746 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2747 i40e_aq_set_phy_debug(hw, 0, NULL);
2748 }
2749 break;
2750 default:
2751 break;
2752 }
2753 if (ret)
2754 return -ENOENT;
2755 else
2756 return 0;
2757 }
2758
2759 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2760 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2761 * 125us (8000 interrupts per second) == ITR(62)
2762 */
2763
2764 /**
2765 * __i40e_get_coalesce - get per-queue coalesce settings
2766 * @netdev: the netdev to check
2767 * @ec: ethtool coalesce data structure
2768 * @queue: which queue to pick
2769 *
2770 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2771 * are per queue. If queue is <0 then we default to queue 0 as the
2772 * representative value.
2773 **/
__i40e_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,int queue)2774 static int __i40e_get_coalesce(struct net_device *netdev,
2775 struct ethtool_coalesce *ec,
2776 int queue)
2777 {
2778 struct i40e_netdev_priv *np = netdev_priv(netdev);
2779 struct i40e_ring *rx_ring, *tx_ring;
2780 struct i40e_vsi *vsi = np->vsi;
2781
2782 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2783 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2784
2785 /* rx and tx usecs has per queue value. If user doesn't specify the
2786 * queue, return queue 0's value to represent.
2787 */
2788 if (queue < 0)
2789 queue = 0;
2790 else if (queue >= vsi->num_queue_pairs)
2791 return -EINVAL;
2792
2793 rx_ring = vsi->rx_rings[queue];
2794 tx_ring = vsi->tx_rings[queue];
2795
2796 if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
2797 ec->use_adaptive_rx_coalesce = 1;
2798
2799 if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
2800 ec->use_adaptive_tx_coalesce = 1;
2801
2802 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2803 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2804
2805 /* we use the _usecs_high to store/set the interrupt rate limit
2806 * that the hardware supports, that almost but not quite
2807 * fits the original intent of the ethtool variable,
2808 * the rx_coalesce_usecs_high limits total interrupts
2809 * per second from both tx/rx sources.
2810 */
2811 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2812 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2813
2814 return 0;
2815 }
2816
2817 /**
2818 * i40e_get_coalesce - get a netdev's coalesce settings
2819 * @netdev: the netdev to check
2820 * @ec: ethtool coalesce data structure
2821 *
2822 * Gets the coalesce settings for a particular netdev. Note that if user has
2823 * modified per-queue settings, this only guarantees to represent queue 0. See
2824 * __i40e_get_coalesce for more details.
2825 **/
i40e_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)2826 static int i40e_get_coalesce(struct net_device *netdev,
2827 struct ethtool_coalesce *ec)
2828 {
2829 return __i40e_get_coalesce(netdev, ec, -1);
2830 }
2831
2832 /**
2833 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2834 * @netdev: netdev structure
2835 * @ec: ethtool's coalesce settings
2836 * @queue: the particular queue to read
2837 *
2838 * Will read a specific queue's coalesce settings
2839 **/
i40e_get_per_queue_coalesce(struct net_device * netdev,u32 queue,struct ethtool_coalesce * ec)2840 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2841 struct ethtool_coalesce *ec)
2842 {
2843 return __i40e_get_coalesce(netdev, ec, queue);
2844 }
2845
2846 /**
2847 * i40e_set_itr_per_queue - set ITR values for specific queue
2848 * @vsi: the VSI to set values for
2849 * @ec: coalesce settings from ethtool
2850 * @queue: the queue to modify
2851 *
2852 * Change the ITR settings for a specific queue.
2853 **/
i40e_set_itr_per_queue(struct i40e_vsi * vsi,struct ethtool_coalesce * ec,int queue)2854 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2855 struct ethtool_coalesce *ec,
2856 int queue)
2857 {
2858 struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2859 struct i40e_ring *tx_ring = vsi->tx_rings[queue];
2860 struct i40e_pf *pf = vsi->back;
2861 struct i40e_hw *hw = &pf->hw;
2862 struct i40e_q_vector *q_vector;
2863 u16 intrl;
2864
2865 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2866
2867 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2868 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
2869
2870 if (ec->use_adaptive_rx_coalesce)
2871 rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2872 else
2873 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2874
2875 if (ec->use_adaptive_tx_coalesce)
2876 tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2877 else
2878 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2879
2880 q_vector = rx_ring->q_vector;
2881 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
2882
2883 q_vector = tx_ring->q_vector;
2884 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2885
2886 /* The interrupt handler itself will take care of programming
2887 * the Tx and Rx ITR values based on the values we have entered
2888 * into the q_vector, no need to write the values now.
2889 */
2890
2891 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
2892 i40e_flush(hw);
2893 }
2894
2895 /**
2896 * __i40e_set_coalesce - set coalesce settings for particular queue
2897 * @netdev: the netdev to change
2898 * @ec: ethtool coalesce settings
2899 * @queue: the queue to change
2900 *
2901 * Sets the coalesce settings for a particular queue.
2902 **/
__i40e_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,int queue)2903 static int __i40e_set_coalesce(struct net_device *netdev,
2904 struct ethtool_coalesce *ec,
2905 int queue)
2906 {
2907 struct i40e_netdev_priv *np = netdev_priv(netdev);
2908 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
2909 struct i40e_vsi *vsi = np->vsi;
2910 struct i40e_pf *pf = vsi->back;
2911 int i;
2912
2913 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2914 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2915
2916 if (queue < 0) {
2917 cur_rx_itr = vsi->rx_rings[0]->itr_setting;
2918 cur_tx_itr = vsi->tx_rings[0]->itr_setting;
2919 } else if (queue < vsi->num_queue_pairs) {
2920 cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
2921 cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
2922 } else {
2923 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2924 vsi->num_queue_pairs - 1);
2925 return -EINVAL;
2926 }
2927
2928 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2929 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2930
2931 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2932 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2933 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2934 return -EINVAL;
2935 }
2936
2937 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2938 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2939 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
2940 return -EINVAL;
2941 }
2942
2943 if (ec->rx_coalesce_usecs != cur_rx_itr &&
2944 ec->use_adaptive_rx_coalesce) {
2945 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2946 return -EINVAL;
2947 }
2948
2949 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
2950 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2951 return -EINVAL;
2952 }
2953
2954 if (ec->tx_coalesce_usecs != cur_tx_itr &&
2955 ec->use_adaptive_tx_coalesce) {
2956 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2957 return -EINVAL;
2958 }
2959
2960 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
2961 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2962 return -EINVAL;
2963 }
2964
2965 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2966 ec->rx_coalesce_usecs = I40E_MIN_ITR;
2967
2968 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2969 ec->tx_coalesce_usecs = I40E_MIN_ITR;
2970
2971 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2972 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2973 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2974 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2975 vsi->int_rate_limit);
2976 }
2977
2978 /* rx and tx usecs has per queue value. If user doesn't specify the
2979 * queue, apply to all queues.
2980 */
2981 if (queue < 0) {
2982 for (i = 0; i < vsi->num_queue_pairs; i++)
2983 i40e_set_itr_per_queue(vsi, ec, i);
2984 } else {
2985 i40e_set_itr_per_queue(vsi, ec, queue);
2986 }
2987
2988 return 0;
2989 }
2990
2991 /**
2992 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2993 * @netdev: the netdev to change
2994 * @ec: ethtool coalesce settings
2995 *
2996 * This will set each queue to the same coalesce settings.
2997 **/
i40e_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)2998 static int i40e_set_coalesce(struct net_device *netdev,
2999 struct ethtool_coalesce *ec)
3000 {
3001 return __i40e_set_coalesce(netdev, ec, -1);
3002 }
3003
3004 /**
3005 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
3006 * @netdev: the netdev to change
3007 * @ec: ethtool's coalesce settings
3008 * @queue: the queue to change
3009 *
3010 * Sets the specified queue's coalesce settings.
3011 **/
i40e_set_per_queue_coalesce(struct net_device * netdev,u32 queue,struct ethtool_coalesce * ec)3012 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
3013 struct ethtool_coalesce *ec)
3014 {
3015 return __i40e_set_coalesce(netdev, ec, queue);
3016 }
3017
3018 /**
3019 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
3020 * @pf: pointer to the physical function struct
3021 * @cmd: ethtool rxnfc command
3022 *
3023 * Returns Success if the flow is supported, else Invalid Input.
3024 **/
i40e_get_rss_hash_opts(struct i40e_pf * pf,struct ethtool_rxnfc * cmd)3025 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
3026 {
3027 struct i40e_hw *hw = &pf->hw;
3028 u8 flow_pctype = 0;
3029 u64 i_set = 0;
3030
3031 cmd->data = 0;
3032
3033 switch (cmd->flow_type) {
3034 case TCP_V4_FLOW:
3035 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3036 break;
3037 case UDP_V4_FLOW:
3038 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3039 break;
3040 case TCP_V6_FLOW:
3041 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3042 break;
3043 case UDP_V6_FLOW:
3044 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3045 break;
3046 case SCTP_V4_FLOW:
3047 case AH_ESP_V4_FLOW:
3048 case AH_V4_FLOW:
3049 case ESP_V4_FLOW:
3050 case IPV4_FLOW:
3051 case SCTP_V6_FLOW:
3052 case AH_ESP_V6_FLOW:
3053 case AH_V6_FLOW:
3054 case ESP_V6_FLOW:
3055 case IPV6_FLOW:
3056 /* Default is src/dest for IP, no matter the L4 hashing */
3057 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
3058 break;
3059 default:
3060 return -EINVAL;
3061 }
3062
3063 /* Read flow based hash input set register */
3064 if (flow_pctype) {
3065 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3066 flow_pctype)) |
3067 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3068 flow_pctype)) << 32);
3069 }
3070
3071 /* Process bits of hash input set */
3072 if (i_set) {
3073 if (i_set & I40E_L4_SRC_MASK)
3074 cmd->data |= RXH_L4_B_0_1;
3075 if (i_set & I40E_L4_DST_MASK)
3076 cmd->data |= RXH_L4_B_2_3;
3077
3078 if (cmd->flow_type == TCP_V4_FLOW ||
3079 cmd->flow_type == UDP_V4_FLOW) {
3080 if (i_set & I40E_L3_SRC_MASK)
3081 cmd->data |= RXH_IP_SRC;
3082 if (i_set & I40E_L3_DST_MASK)
3083 cmd->data |= RXH_IP_DST;
3084 } else if (cmd->flow_type == TCP_V6_FLOW ||
3085 cmd->flow_type == UDP_V6_FLOW) {
3086 if (i_set & I40E_L3_V6_SRC_MASK)
3087 cmd->data |= RXH_IP_SRC;
3088 if (i_set & I40E_L3_V6_DST_MASK)
3089 cmd->data |= RXH_IP_DST;
3090 }
3091 }
3092
3093 return 0;
3094 }
3095
3096 /**
3097 * i40e_check_mask - Check whether a mask field is set
3098 * @mask: the full mask value
3099 * @field: mask of the field to check
3100 *
3101 * If the given mask is fully set, return positive value. If the mask for the
3102 * field is fully unset, return zero. Otherwise return a negative error code.
3103 **/
i40e_check_mask(u64 mask,u64 field)3104 static int i40e_check_mask(u64 mask, u64 field)
3105 {
3106 u64 value = mask & field;
3107
3108 if (value == field)
3109 return 1;
3110 else if (!value)
3111 return 0;
3112 else
3113 return -1;
3114 }
3115
3116 /**
3117 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
3118 * @fsp: pointer to rx flow specification
3119 * @data: pointer to userdef data structure for storage
3120 *
3121 * Read the user-defined data and deconstruct the value into a structure. No
3122 * other code should read the user-defined data, so as to ensure that every
3123 * place consistently reads the value correctly.
3124 *
3125 * The user-defined field is a 64bit Big Endian format value, which we
3126 * deconstruct by reading bits or bit fields from it. Single bit flags shall
3127 * be defined starting from the highest bits, while small bit field values
3128 * shall be defined starting from the lowest bits.
3129 *
3130 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
3131 * and the filter should be rejected. The data structure will always be
3132 * modified even if FLOW_EXT is not set.
3133 *
3134 **/
i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec * fsp,struct i40e_rx_flow_userdef * data)3135 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3136 struct i40e_rx_flow_userdef *data)
3137 {
3138 u64 value, mask;
3139 int valid;
3140
3141 /* Zero memory first so it's always consistent. */
3142 memset(data, 0, sizeof(*data));
3143
3144 if (!(fsp->flow_type & FLOW_EXT))
3145 return 0;
3146
3147 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
3148 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
3149
3150 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
3151 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
3152 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
3153
3154 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
3155 if (valid < 0) {
3156 return -EINVAL;
3157 } else if (valid) {
3158 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
3159 data->flex_offset =
3160 (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
3161 data->flex_filter = true;
3162 }
3163
3164 return 0;
3165 }
3166
3167 /**
3168 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
3169 * @fsp: pointer to rx_flow specification
3170 * @data: pointer to return userdef data
3171 *
3172 * Reads the userdef data structure and properly fills in the user defined
3173 * fields of the rx_flow_spec.
3174 **/
i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec * fsp,struct i40e_rx_flow_userdef * data)3175 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3176 struct i40e_rx_flow_userdef *data)
3177 {
3178 u64 value = 0, mask = 0;
3179
3180 if (data->flex_filter) {
3181 value |= data->flex_word;
3182 value |= (u64)data->flex_offset << 16;
3183 mask |= I40E_USERDEF_FLEX_FILTER;
3184 }
3185
3186 if (value || mask)
3187 fsp->flow_type |= FLOW_EXT;
3188
3189 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
3190 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
3191 }
3192
3193 /**
3194 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
3195 * @pf: Pointer to the physical function struct
3196 * @cmd: The command to get or set Rx flow classification rules
3197 * @rule_locs: Array of used rule locations
3198 *
3199 * This function populates both the total and actual rule count of
3200 * the ethtool flow classification command
3201 *
3202 * Returns 0 on success or -EMSGSIZE if entry not found
3203 **/
i40e_get_ethtool_fdir_all(struct i40e_pf * pf,struct ethtool_rxnfc * cmd,u32 * rule_locs)3204 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
3205 struct ethtool_rxnfc *cmd,
3206 u32 *rule_locs)
3207 {
3208 struct i40e_fdir_filter *rule;
3209 struct hlist_node *node2;
3210 int cnt = 0;
3211
3212 /* report total rule count */
3213 cmd->data = i40e_get_fd_cnt_all(pf);
3214
3215 hlist_for_each_entry_safe(rule, node2,
3216 &pf->fdir_filter_list, fdir_node) {
3217 if (cnt == cmd->rule_cnt)
3218 return -EMSGSIZE;
3219
3220 rule_locs[cnt] = rule->fd_id;
3221 cnt++;
3222 }
3223
3224 cmd->rule_cnt = cnt;
3225
3226 return 0;
3227 }
3228
3229 /**
3230 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
3231 * @pf: Pointer to the physical function struct
3232 * @cmd: The command to get or set Rx flow classification rules
3233 *
3234 * This function looks up a filter based on the Rx flow classification
3235 * command and fills the flow spec info for it if found
3236 *
3237 * Returns 0 on success or -EINVAL if filter not found
3238 **/
i40e_get_ethtool_fdir_entry(struct i40e_pf * pf,struct ethtool_rxnfc * cmd)3239 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
3240 struct ethtool_rxnfc *cmd)
3241 {
3242 struct ethtool_rx_flow_spec *fsp =
3243 (struct ethtool_rx_flow_spec *)&cmd->fs;
3244 struct i40e_rx_flow_userdef userdef = {0};
3245 struct i40e_fdir_filter *rule = NULL;
3246 struct hlist_node *node2;
3247 u64 input_set;
3248 u16 index;
3249
3250 hlist_for_each_entry_safe(rule, node2,
3251 &pf->fdir_filter_list, fdir_node) {
3252 if (fsp->location <= rule->fd_id)
3253 break;
3254 }
3255
3256 if (!rule || fsp->location != rule->fd_id)
3257 return -EINVAL;
3258
3259 fsp->flow_type = rule->flow_type;
3260 if (fsp->flow_type == IP_USER_FLOW) {
3261 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
3262 fsp->h_u.usr_ip4_spec.proto = 0;
3263 fsp->m_u.usr_ip4_spec.proto = 0;
3264 }
3265
3266 /* Reverse the src and dest notion, since the HW views them from
3267 * Tx perspective where as the user expects it from Rx filter view.
3268 */
3269 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
3270 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
3271 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
3272 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
3273
3274 switch (rule->flow_type) {
3275 case SCTP_V4_FLOW:
3276 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3277 break;
3278 case TCP_V4_FLOW:
3279 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3280 break;
3281 case UDP_V4_FLOW:
3282 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3283 break;
3284 case IP_USER_FLOW:
3285 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3286 break;
3287 default:
3288 /* If we have stored a filter with a flow type not listed here
3289 * it is almost certainly a driver bug. WARN(), and then
3290 * assign the input_set as if all fields are enabled to avoid
3291 * reading unassigned memory.
3292 */
3293 WARN(1, "Missing input set index for flow_type %d\n",
3294 rule->flow_type);
3295 input_set = 0xFFFFFFFFFFFFFFFFULL;
3296 goto no_input_set;
3297 }
3298
3299 input_set = i40e_read_fd_input_set(pf, index);
3300
3301 no_input_set:
3302 if (input_set & I40E_L3_SRC_MASK)
3303 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
3304
3305 if (input_set & I40E_L3_DST_MASK)
3306 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
3307
3308 if (input_set & I40E_L4_SRC_MASK)
3309 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
3310
3311 if (input_set & I40E_L4_DST_MASK)
3312 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
3313
3314 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
3315 fsp->ring_cookie = RX_CLS_FLOW_DISC;
3316 else
3317 fsp->ring_cookie = rule->q_index;
3318
3319 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
3320 struct i40e_vsi *vsi;
3321
3322 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
3323 if (vsi && vsi->type == I40E_VSI_SRIOV) {
3324 /* VFs are zero-indexed by the driver, but ethtool
3325 * expects them to be one-indexed, so add one here
3326 */
3327 u64 ring_vf = vsi->vf_id + 1;
3328
3329 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
3330 fsp->ring_cookie |= ring_vf;
3331 }
3332 }
3333
3334 if (rule->flex_filter) {
3335 userdef.flex_filter = true;
3336 userdef.flex_word = be16_to_cpu(rule->flex_word);
3337 userdef.flex_offset = rule->flex_offset;
3338 }
3339
3340 i40e_fill_rx_flow_user_data(fsp, &userdef);
3341
3342 return 0;
3343 }
3344
3345 /**
3346 * i40e_get_rxnfc - command to get RX flow classification rules
3347 * @netdev: network interface device structure
3348 * @cmd: ethtool rxnfc command
3349 * @rule_locs: pointer to store rule data
3350 *
3351 * Returns Success if the command is supported.
3352 **/
i40e_get_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * cmd,u32 * rule_locs)3353 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
3354 u32 *rule_locs)
3355 {
3356 struct i40e_netdev_priv *np = netdev_priv(netdev);
3357 struct i40e_vsi *vsi = np->vsi;
3358 struct i40e_pf *pf = vsi->back;
3359 int ret = -EOPNOTSUPP;
3360
3361 switch (cmd->cmd) {
3362 case ETHTOOL_GRXRINGS:
3363 cmd->data = vsi->rss_size;
3364 ret = 0;
3365 break;
3366 case ETHTOOL_GRXFH:
3367 ret = i40e_get_rss_hash_opts(pf, cmd);
3368 break;
3369 case ETHTOOL_GRXCLSRLCNT:
3370 cmd->rule_cnt = pf->fdir_pf_active_filters;
3371 /* report total rule count */
3372 cmd->data = i40e_get_fd_cnt_all(pf);
3373 ret = 0;
3374 break;
3375 case ETHTOOL_GRXCLSRULE:
3376 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
3377 break;
3378 case ETHTOOL_GRXCLSRLALL:
3379 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
3380 break;
3381 default:
3382 break;
3383 }
3384
3385 return ret;
3386 }
3387
3388 /**
3389 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
3390 * @nfc: pointer to user request
3391 * @i_setc: bits currently set
3392 *
3393 * Returns value of bits to be set per user request
3394 **/
i40e_get_rss_hash_bits(struct ethtool_rxnfc * nfc,u64 i_setc)3395 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
3396 {
3397 u64 i_set = i_setc;
3398 u64 src_l3 = 0, dst_l3 = 0;
3399
3400 if (nfc->data & RXH_L4_B_0_1)
3401 i_set |= I40E_L4_SRC_MASK;
3402 else
3403 i_set &= ~I40E_L4_SRC_MASK;
3404 if (nfc->data & RXH_L4_B_2_3)
3405 i_set |= I40E_L4_DST_MASK;
3406 else
3407 i_set &= ~I40E_L4_DST_MASK;
3408
3409 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
3410 src_l3 = I40E_L3_V6_SRC_MASK;
3411 dst_l3 = I40E_L3_V6_DST_MASK;
3412 } else if (nfc->flow_type == TCP_V4_FLOW ||
3413 nfc->flow_type == UDP_V4_FLOW) {
3414 src_l3 = I40E_L3_SRC_MASK;
3415 dst_l3 = I40E_L3_DST_MASK;
3416 } else {
3417 /* Any other flow type are not supported here */
3418 return i_set;
3419 }
3420
3421 if (nfc->data & RXH_IP_SRC)
3422 i_set |= src_l3;
3423 else
3424 i_set &= ~src_l3;
3425 if (nfc->data & RXH_IP_DST)
3426 i_set |= dst_l3;
3427 else
3428 i_set &= ~dst_l3;
3429
3430 return i_set;
3431 }
3432
3433 /**
3434 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
3435 * @pf: pointer to the physical function struct
3436 * @nfc: ethtool rxnfc command
3437 *
3438 * Returns Success if the flow input set is supported.
3439 **/
i40e_set_rss_hash_opt(struct i40e_pf * pf,struct ethtool_rxnfc * nfc)3440 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
3441 {
3442 struct i40e_hw *hw = &pf->hw;
3443 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
3444 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
3445 u8 flow_pctype = 0;
3446 u64 i_set, i_setc;
3447
3448 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3449 dev_err(&pf->pdev->dev,
3450 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
3451 return -EOPNOTSUPP;
3452 }
3453
3454 /* RSS does not support anything other than hashing
3455 * to queues on src and dst IPs and ports
3456 */
3457 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3458 RXH_L4_B_0_1 | RXH_L4_B_2_3))
3459 return -EINVAL;
3460
3461 switch (nfc->flow_type) {
3462 case TCP_V4_FLOW:
3463 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3464 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3465 hena |=
3466 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
3467 break;
3468 case TCP_V6_FLOW:
3469 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3470 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3471 hena |=
3472 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
3473 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3474 hena |=
3475 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
3476 break;
3477 case UDP_V4_FLOW:
3478 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3479 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3480 hena |=
3481 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
3482 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
3483
3484 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3485 break;
3486 case UDP_V6_FLOW:
3487 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3488 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3489 hena |=
3490 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
3491 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
3492
3493 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3494 break;
3495 case AH_ESP_V4_FLOW:
3496 case AH_V4_FLOW:
3497 case ESP_V4_FLOW:
3498 case SCTP_V4_FLOW:
3499 if ((nfc->data & RXH_L4_B_0_1) ||
3500 (nfc->data & RXH_L4_B_2_3))
3501 return -EINVAL;
3502 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
3503 break;
3504 case AH_ESP_V6_FLOW:
3505 case AH_V6_FLOW:
3506 case ESP_V6_FLOW:
3507 case SCTP_V6_FLOW:
3508 if ((nfc->data & RXH_L4_B_0_1) ||
3509 (nfc->data & RXH_L4_B_2_3))
3510 return -EINVAL;
3511 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
3512 break;
3513 case IPV4_FLOW:
3514 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
3515 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3516 break;
3517 case IPV6_FLOW:
3518 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
3519 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3520 break;
3521 default:
3522 return -EINVAL;
3523 }
3524
3525 if (flow_pctype) {
3526 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3527 flow_pctype)) |
3528 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3529 flow_pctype)) << 32);
3530 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
3531 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
3532 (u32)i_set);
3533 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
3534 (u32)(i_set >> 32));
3535 hena |= BIT_ULL(flow_pctype);
3536 }
3537
3538 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
3539 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
3540 i40e_flush(hw);
3541
3542 return 0;
3543 }
3544
3545 /**
3546 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
3547 * @vsi: Pointer to the targeted VSI
3548 * @input: The filter to update or NULL to indicate deletion
3549 * @sw_idx: Software index to the filter
3550 * @cmd: The command to get or set Rx flow classification rules
3551 *
3552 * This function updates (or deletes) a Flow Director entry from
3553 * the hlist of the corresponding PF
3554 *
3555 * Returns 0 on success
3556 **/
i40e_update_ethtool_fdir_entry(struct i40e_vsi * vsi,struct i40e_fdir_filter * input,u16 sw_idx,struct ethtool_rxnfc * cmd)3557 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3558 struct i40e_fdir_filter *input,
3559 u16 sw_idx,
3560 struct ethtool_rxnfc *cmd)
3561 {
3562 struct i40e_fdir_filter *rule, *parent;
3563 struct i40e_pf *pf = vsi->back;
3564 struct hlist_node *node2;
3565 int err = -EINVAL;
3566
3567 parent = NULL;
3568 rule = NULL;
3569
3570 hlist_for_each_entry_safe(rule, node2,
3571 &pf->fdir_filter_list, fdir_node) {
3572 /* hash found, or no matching entry */
3573 if (rule->fd_id >= sw_idx)
3574 break;
3575 parent = rule;
3576 }
3577
3578 /* if there is an old rule occupying our place remove it */
3579 if (rule && (rule->fd_id == sw_idx)) {
3580 /* Remove this rule, since we're either deleting it, or
3581 * replacing it.
3582 */
3583 err = i40e_add_del_fdir(vsi, rule, false);
3584 hlist_del(&rule->fdir_node);
3585 kfree(rule);
3586 pf->fdir_pf_active_filters--;
3587 }
3588
3589 /* If we weren't given an input, this is a delete, so just return the
3590 * error code indicating if there was an entry at the requested slot
3591 */
3592 if (!input)
3593 return err;
3594
3595 /* Otherwise, install the new rule as requested */
3596 INIT_HLIST_NODE(&input->fdir_node);
3597
3598 /* add filter to the list */
3599 if (parent)
3600 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
3601 else
3602 hlist_add_head(&input->fdir_node,
3603 &pf->fdir_filter_list);
3604
3605 /* update counts */
3606 pf->fdir_pf_active_filters++;
3607
3608 return 0;
3609 }
3610
3611 /**
3612 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3613 * @pf: pointer to PF structure
3614 *
3615 * This function searches the list of filters and determines which FLX_PIT
3616 * entries are still required. It will prune any entries which are no longer
3617 * in use after the deletion.
3618 **/
i40e_prune_flex_pit_list(struct i40e_pf * pf)3619 static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3620 {
3621 struct i40e_flex_pit *entry, *tmp;
3622 struct i40e_fdir_filter *rule;
3623
3624 /* First, we'll check the l3 table */
3625 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3626 bool found = false;
3627
3628 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3629 if (rule->flow_type != IP_USER_FLOW)
3630 continue;
3631 if (rule->flex_filter &&
3632 rule->flex_offset == entry->src_offset) {
3633 found = true;
3634 break;
3635 }
3636 }
3637
3638 /* If we didn't find the filter, then we can prune this entry
3639 * from the list.
3640 */
3641 if (!found) {
3642 list_del(&entry->list);
3643 kfree(entry);
3644 }
3645 }
3646
3647 /* Followed by the L4 table */
3648 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3649 bool found = false;
3650
3651 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3652 /* Skip this filter if it's L3, since we already
3653 * checked those in the above loop
3654 */
3655 if (rule->flow_type == IP_USER_FLOW)
3656 continue;
3657 if (rule->flex_filter &&
3658 rule->flex_offset == entry->src_offset) {
3659 found = true;
3660 break;
3661 }
3662 }
3663
3664 /* If we didn't find the filter, then we can prune this entry
3665 * from the list.
3666 */
3667 if (!found) {
3668 list_del(&entry->list);
3669 kfree(entry);
3670 }
3671 }
3672 }
3673
3674 /**
3675 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3676 * @vsi: Pointer to the targeted VSI
3677 * @cmd: The command to get or set Rx flow classification rules
3678 *
3679 * The function removes a Flow Director filter entry from the
3680 * hlist of the corresponding PF
3681 *
3682 * Returns 0 on success
3683 */
i40e_del_fdir_entry(struct i40e_vsi * vsi,struct ethtool_rxnfc * cmd)3684 static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3685 struct ethtool_rxnfc *cmd)
3686 {
3687 struct ethtool_rx_flow_spec *fsp =
3688 (struct ethtool_rx_flow_spec *)&cmd->fs;
3689 struct i40e_pf *pf = vsi->back;
3690 int ret = 0;
3691
3692 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3693 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3694 return -EBUSY;
3695
3696 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3697 return -EBUSY;
3698
3699 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3700
3701 i40e_prune_flex_pit_list(pf);
3702
3703 i40e_fdir_check_and_reenable(pf);
3704 return ret;
3705 }
3706
3707 /**
3708 * i40e_unused_pit_index - Find an unused PIT index for given list
3709 * @pf: the PF data structure
3710 *
3711 * Find the first unused flexible PIT index entry. We search both the L3 and
3712 * L4 flexible PIT lists so that the returned index is unique and unused by
3713 * either currently programmed L3 or L4 filters. We use a bit field as storage
3714 * to track which indexes are already used.
3715 **/
i40e_unused_pit_index(struct i40e_pf * pf)3716 static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3717 {
3718 unsigned long available_index = 0xFF;
3719 struct i40e_flex_pit *entry;
3720
3721 /* We need to make sure that the new index isn't in use by either L3
3722 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3723 * L4 to use the same index.
3724 */
3725
3726 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3727 clear_bit(entry->pit_index, &available_index);
3728
3729 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3730 clear_bit(entry->pit_index, &available_index);
3731
3732 return find_first_bit(&available_index, 8);
3733 }
3734
3735 /**
3736 * i40e_find_flex_offset - Find an existing flex src_offset
3737 * @flex_pit_list: L3 or L4 flex PIT list
3738 * @src_offset: new src_offset to find
3739 *
3740 * Searches the flex_pit_list for an existing offset. If no offset is
3741 * currently programmed, then this will return an ERR_PTR if there is no space
3742 * to add a new offset, otherwise it returns NULL.
3743 **/
3744 static
i40e_find_flex_offset(struct list_head * flex_pit_list,u16 src_offset)3745 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3746 u16 src_offset)
3747 {
3748 struct i40e_flex_pit *entry;
3749 int size = 0;
3750
3751 /* Search for the src_offset first. If we find a matching entry
3752 * already programmed, we can simply re-use it.
3753 */
3754 list_for_each_entry(entry, flex_pit_list, list) {
3755 size++;
3756 if (entry->src_offset == src_offset)
3757 return entry;
3758 }
3759
3760 /* If we haven't found an entry yet, then the provided src offset has
3761 * not yet been programmed. We will program the src offset later on,
3762 * but we need to indicate whether there is enough space to do so
3763 * here. We'll make use of ERR_PTR for this purpose.
3764 */
3765 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3766 return ERR_PTR(-ENOSPC);
3767
3768 return NULL;
3769 }
3770
3771 /**
3772 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3773 * @flex_pit_list: L3 or L4 flex PIT list
3774 * @src_offset: new src_offset to add
3775 * @pit_index: the PIT index to program
3776 *
3777 * This function programs the new src_offset to the list. It is expected that
3778 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3779 * that this offset is not programmed, and that the list has enough space to
3780 * store another offset.
3781 *
3782 * Returns 0 on success, and negative value on error.
3783 **/
i40e_add_flex_offset(struct list_head * flex_pit_list,u16 src_offset,u8 pit_index)3784 static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3785 u16 src_offset,
3786 u8 pit_index)
3787 {
3788 struct i40e_flex_pit *new_pit, *entry;
3789
3790 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3791 if (!new_pit)
3792 return -ENOMEM;
3793
3794 new_pit->src_offset = src_offset;
3795 new_pit->pit_index = pit_index;
3796
3797 /* We need to insert this item such that the list is sorted by
3798 * src_offset in ascending order.
3799 */
3800 list_for_each_entry(entry, flex_pit_list, list) {
3801 if (new_pit->src_offset < entry->src_offset) {
3802 list_add_tail(&new_pit->list, &entry->list);
3803 return 0;
3804 }
3805
3806 /* If we found an entry with our offset already programmed we
3807 * can simply return here, after freeing the memory. However,
3808 * if the pit_index does not match we need to report an error.
3809 */
3810 if (new_pit->src_offset == entry->src_offset) {
3811 int err = 0;
3812
3813 /* If the PIT index is not the same we can't re-use
3814 * the entry, so we must report an error.
3815 */
3816 if (new_pit->pit_index != entry->pit_index)
3817 err = -EINVAL;
3818
3819 kfree(new_pit);
3820 return err;
3821 }
3822 }
3823
3824 /* If we reached here, then we haven't yet added the item. This means
3825 * that we should add the item at the end of the list.
3826 */
3827 list_add_tail(&new_pit->list, flex_pit_list);
3828 return 0;
3829 }
3830
3831 /**
3832 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3833 * @pf: Pointer to the PF structure
3834 * @flex_pit_list: list of flexible src offsets in use
3835 * @flex_pit_start: index to first entry for this section of the table
3836 *
3837 * In order to handle flexible data, the hardware uses a table of values
3838 * called the FLX_PIT table. This table is used to indicate which sections of
3839 * the input correspond to what PIT index values. Unfortunately, hardware is
3840 * very restrictive about programming this table. Entries must be ordered by
3841 * src_offset in ascending order, without duplicates. Additionally, unused
3842 * entries must be set to the unused index value, and must have valid size and
3843 * length according to the src_offset ordering.
3844 *
3845 * This function will reprogram the FLX_PIT register from a book-keeping
3846 * structure that we guarantee is already ordered correctly, and has no more
3847 * than 3 entries.
3848 *
3849 * To make things easier, we only support flexible values of one word length,
3850 * rather than allowing variable length flexible values.
3851 **/
__i40e_reprogram_flex_pit(struct i40e_pf * pf,struct list_head * flex_pit_list,int flex_pit_start)3852 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3853 struct list_head *flex_pit_list,
3854 int flex_pit_start)
3855 {
3856 struct i40e_flex_pit *entry = NULL;
3857 u16 last_offset = 0;
3858 int i = 0, j = 0;
3859
3860 /* First, loop over the list of flex PIT entries, and reprogram the
3861 * registers.
3862 */
3863 list_for_each_entry(entry, flex_pit_list, list) {
3864 /* We have to be careful when programming values for the
3865 * largest SRC_OFFSET value. It is possible that adding
3866 * additional empty values at the end would overflow the space
3867 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3868 * we check here and add the empty values prior to adding the
3869 * largest value.
3870 *
3871 * To determine this, we will use a loop from i+1 to 3, which
3872 * will determine whether the unused entries would have valid
3873 * SRC_OFFSET. Note that there cannot be extra entries past
3874 * this value, because the only valid values would have been
3875 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3876 * have been added to the list in the first place.
3877 */
3878 for (j = i + 1; j < 3; j++) {
3879 u16 offset = entry->src_offset + j;
3880 int index = flex_pit_start + i;
3881 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3882 1,
3883 offset - 3);
3884
3885 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3886 i40e_write_rx_ctl(&pf->hw,
3887 I40E_PRTQF_FLX_PIT(index),
3888 value);
3889 i++;
3890 }
3891 }
3892
3893 /* Now, we can program the actual value into the table */
3894 i40e_write_rx_ctl(&pf->hw,
3895 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3896 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3897 1,
3898 entry->src_offset));
3899 i++;
3900 }
3901
3902 /* In order to program the last entries in the table, we need to
3903 * determine the valid offset. If the list is empty, we'll just start
3904 * with 0. Otherwise, we'll start with the last item offset and add 1.
3905 * This ensures that all entries have valid sizes. If we don't do this
3906 * correctly, the hardware will disable flexible field parsing.
3907 */
3908 if (!list_empty(flex_pit_list))
3909 last_offset = list_prev_entry(entry, list)->src_offset + 1;
3910
3911 for (; i < 3; i++, last_offset++) {
3912 i40e_write_rx_ctl(&pf->hw,
3913 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3914 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3915 1,
3916 last_offset));
3917 }
3918 }
3919
3920 /**
3921 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3922 * @pf: pointer to the PF structure
3923 *
3924 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3925 * internal helper function for implementation details.
3926 **/
i40e_reprogram_flex_pit(struct i40e_pf * pf)3927 static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3928 {
3929 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3930 I40E_FLEX_PIT_IDX_START_L3);
3931
3932 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3933 I40E_FLEX_PIT_IDX_START_L4);
3934
3935 /* We also need to program the L3 and L4 GLQF ORT register */
3936 i40e_write_rx_ctl(&pf->hw,
3937 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3938 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3939 3, 1));
3940
3941 i40e_write_rx_ctl(&pf->hw,
3942 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3943 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3944 3, 1));
3945 }
3946
3947 /**
3948 * i40e_flow_str - Converts a flow_type into a human readable string
3949 * @fsp: the flow specification
3950 *
3951 * Currently only flow types we support are included here, and the string
3952 * value attempts to match what ethtool would use to configure this flow type.
3953 **/
i40e_flow_str(struct ethtool_rx_flow_spec * fsp)3954 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3955 {
3956 switch (fsp->flow_type & ~FLOW_EXT) {
3957 case TCP_V4_FLOW:
3958 return "tcp4";
3959 case UDP_V4_FLOW:
3960 return "udp4";
3961 case SCTP_V4_FLOW:
3962 return "sctp4";
3963 case IP_USER_FLOW:
3964 return "ip4";
3965 default:
3966 return "unknown";
3967 }
3968 }
3969
3970 /**
3971 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3972 * @pit_index: PIT index to convert
3973 *
3974 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
3975 * of range.
3976 **/
i40e_pit_index_to_mask(int pit_index)3977 static u64 i40e_pit_index_to_mask(int pit_index)
3978 {
3979 switch (pit_index) {
3980 case 0:
3981 return I40E_FLEX_50_MASK;
3982 case 1:
3983 return I40E_FLEX_51_MASK;
3984 case 2:
3985 return I40E_FLEX_52_MASK;
3986 case 3:
3987 return I40E_FLEX_53_MASK;
3988 case 4:
3989 return I40E_FLEX_54_MASK;
3990 case 5:
3991 return I40E_FLEX_55_MASK;
3992 case 6:
3993 return I40E_FLEX_56_MASK;
3994 case 7:
3995 return I40E_FLEX_57_MASK;
3996 default:
3997 return 0;
3998 }
3999 }
4000
4001 /**
4002 * i40e_print_input_set - Show changes between two input sets
4003 * @vsi: the vsi being configured
4004 * @old: the old input set
4005 * @new: the new input set
4006 *
4007 * Print the difference between old and new input sets by showing which series
4008 * of words are toggled on or off. Only displays the bits we actually support
4009 * changing.
4010 **/
i40e_print_input_set(struct i40e_vsi * vsi,u64 old,u64 new)4011 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
4012 {
4013 struct i40e_pf *pf = vsi->back;
4014 bool old_value, new_value;
4015 int i;
4016
4017 old_value = !!(old & I40E_L3_SRC_MASK);
4018 new_value = !!(new & I40E_L3_SRC_MASK);
4019 if (old_value != new_value)
4020 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
4021 old_value ? "ON" : "OFF",
4022 new_value ? "ON" : "OFF");
4023
4024 old_value = !!(old & I40E_L3_DST_MASK);
4025 new_value = !!(new & I40E_L3_DST_MASK);
4026 if (old_value != new_value)
4027 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
4028 old_value ? "ON" : "OFF",
4029 new_value ? "ON" : "OFF");
4030
4031 old_value = !!(old & I40E_L4_SRC_MASK);
4032 new_value = !!(new & I40E_L4_SRC_MASK);
4033 if (old_value != new_value)
4034 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
4035 old_value ? "ON" : "OFF",
4036 new_value ? "ON" : "OFF");
4037
4038 old_value = !!(old & I40E_L4_DST_MASK);
4039 new_value = !!(new & I40E_L4_DST_MASK);
4040 if (old_value != new_value)
4041 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
4042 old_value ? "ON" : "OFF",
4043 new_value ? "ON" : "OFF");
4044
4045 old_value = !!(old & I40E_VERIFY_TAG_MASK);
4046 new_value = !!(new & I40E_VERIFY_TAG_MASK);
4047 if (old_value != new_value)
4048 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
4049 old_value ? "ON" : "OFF",
4050 new_value ? "ON" : "OFF");
4051
4052 /* Show change of flexible filter entries */
4053 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
4054 u64 flex_mask = i40e_pit_index_to_mask(i);
4055
4056 old_value = !!(old & flex_mask);
4057 new_value = !!(new & flex_mask);
4058 if (old_value != new_value)
4059 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
4060 i,
4061 old_value ? "ON" : "OFF",
4062 new_value ? "ON" : "OFF");
4063 }
4064
4065 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
4066 old);
4067 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
4068 new);
4069 }
4070
4071 /**
4072 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
4073 * @vsi: pointer to the targeted VSI
4074 * @fsp: pointer to Rx flow specification
4075 * @userdef: userdefined data from flow specification
4076 *
4077 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
4078 * for partial matches exists with a few limitations. First, hardware only
4079 * supports masking by word boundary (2 bytes) and not per individual bit.
4080 * Second, hardware is limited to using one mask for a flow type and cannot
4081 * use a separate mask for each filter.
4082 *
4083 * To support these limitations, if we already have a configured filter for
4084 * the specified type, this function enforces that new filters of the type
4085 * match the configured input set. Otherwise, if we do not have a filter of
4086 * the specified type, we allow the input set to be updated to match the
4087 * desired filter.
4088 *
4089 * To help ensure that administrators understand why filters weren't displayed
4090 * as supported, we print a diagnostic message displaying how the input set
4091 * would change and warning to delete the preexisting filters if required.
4092 *
4093 * Returns 0 on successful input set match, and a negative return code on
4094 * failure.
4095 **/
i40e_check_fdir_input_set(struct i40e_vsi * vsi,struct ethtool_rx_flow_spec * fsp,struct i40e_rx_flow_userdef * userdef)4096 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
4097 struct ethtool_rx_flow_spec *fsp,
4098 struct i40e_rx_flow_userdef *userdef)
4099 {
4100 struct i40e_pf *pf = vsi->back;
4101 struct ethtool_tcpip4_spec *tcp_ip4_spec;
4102 struct ethtool_usrip4_spec *usr_ip4_spec;
4103 u64 current_mask, new_mask;
4104 bool new_flex_offset = false;
4105 bool flex_l3 = false;
4106 u16 *fdir_filter_count;
4107 u16 index, src_offset = 0;
4108 u8 pit_index = 0;
4109 int err;
4110
4111 switch (fsp->flow_type & ~FLOW_EXT) {
4112 case SCTP_V4_FLOW:
4113 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
4114 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
4115 break;
4116 case TCP_V4_FLOW:
4117 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
4118 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
4119 break;
4120 case UDP_V4_FLOW:
4121 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
4122 fdir_filter_count = &pf->fd_udp4_filter_cnt;
4123 break;
4124 case IP_USER_FLOW:
4125 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
4126 fdir_filter_count = &pf->fd_ip4_filter_cnt;
4127 flex_l3 = true;
4128 break;
4129 default:
4130 return -EOPNOTSUPP;
4131 }
4132
4133 /* Read the current input set from register memory. */
4134 current_mask = i40e_read_fd_input_set(pf, index);
4135 new_mask = current_mask;
4136
4137 /* Determine, if any, the required changes to the input set in order
4138 * to support the provided mask.
4139 *
4140 * Hardware only supports masking at word (2 byte) granularity and does
4141 * not support full bitwise masking. This implementation simplifies
4142 * even further and only supports fully enabled or fully disabled
4143 * masks for each field, even though we could split the ip4src and
4144 * ip4dst fields.
4145 */
4146 switch (fsp->flow_type & ~FLOW_EXT) {
4147 case SCTP_V4_FLOW:
4148 new_mask &= ~I40E_VERIFY_TAG_MASK;
4149 fallthrough;
4150 case TCP_V4_FLOW:
4151 case UDP_V4_FLOW:
4152 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
4153
4154 /* IPv4 source address */
4155 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4156 new_mask |= I40E_L3_SRC_MASK;
4157 else if (!tcp_ip4_spec->ip4src)
4158 new_mask &= ~I40E_L3_SRC_MASK;
4159 else
4160 return -EOPNOTSUPP;
4161
4162 /* IPv4 destination address */
4163 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4164 new_mask |= I40E_L3_DST_MASK;
4165 else if (!tcp_ip4_spec->ip4dst)
4166 new_mask &= ~I40E_L3_DST_MASK;
4167 else
4168 return -EOPNOTSUPP;
4169
4170 /* L4 source port */
4171 if (tcp_ip4_spec->psrc == htons(0xFFFF))
4172 new_mask |= I40E_L4_SRC_MASK;
4173 else if (!tcp_ip4_spec->psrc)
4174 new_mask &= ~I40E_L4_SRC_MASK;
4175 else
4176 return -EOPNOTSUPP;
4177
4178 /* L4 destination port */
4179 if (tcp_ip4_spec->pdst == htons(0xFFFF))
4180 new_mask |= I40E_L4_DST_MASK;
4181 else if (!tcp_ip4_spec->pdst)
4182 new_mask &= ~I40E_L4_DST_MASK;
4183 else
4184 return -EOPNOTSUPP;
4185
4186 /* Filtering on Type of Service is not supported. */
4187 if (tcp_ip4_spec->tos)
4188 return -EOPNOTSUPP;
4189
4190 break;
4191 case IP_USER_FLOW:
4192 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
4193
4194 /* IPv4 source address */
4195 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4196 new_mask |= I40E_L3_SRC_MASK;
4197 else if (!usr_ip4_spec->ip4src)
4198 new_mask &= ~I40E_L3_SRC_MASK;
4199 else
4200 return -EOPNOTSUPP;
4201
4202 /* IPv4 destination address */
4203 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4204 new_mask |= I40E_L3_DST_MASK;
4205 else if (!usr_ip4_spec->ip4dst)
4206 new_mask &= ~I40E_L3_DST_MASK;
4207 else
4208 return -EOPNOTSUPP;
4209
4210 /* First 4 bytes of L4 header */
4211 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF))
4212 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK;
4213 else if (!usr_ip4_spec->l4_4_bytes)
4214 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
4215 else
4216 return -EOPNOTSUPP;
4217
4218 /* Filtering on Type of Service is not supported. */
4219 if (usr_ip4_spec->tos)
4220 return -EOPNOTSUPP;
4221
4222 /* Filtering on IP version is not supported */
4223 if (usr_ip4_spec->ip_ver)
4224 return -EINVAL;
4225
4226 /* Filtering on L4 protocol is not supported */
4227 if (usr_ip4_spec->proto)
4228 return -EINVAL;
4229
4230 break;
4231 default:
4232 return -EOPNOTSUPP;
4233 }
4234
4235 /* First, clear all flexible filter entries */
4236 new_mask &= ~I40E_FLEX_INPUT_MASK;
4237
4238 /* If we have a flexible filter, try to add this offset to the correct
4239 * flexible filter PIT list. Once finished, we can update the mask.
4240 * If the src_offset changed, we will get a new mask value which will
4241 * trigger an input set change.
4242 */
4243 if (userdef->flex_filter) {
4244 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
4245
4246 /* Flexible offset must be even, since the flexible payload
4247 * must be aligned on 2-byte boundary.
4248 */
4249 if (userdef->flex_offset & 0x1) {
4250 dev_warn(&pf->pdev->dev,
4251 "Flexible data offset must be 2-byte aligned\n");
4252 return -EINVAL;
4253 }
4254
4255 src_offset = userdef->flex_offset >> 1;
4256
4257 /* FLX_PIT source offset value is only so large */
4258 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
4259 dev_warn(&pf->pdev->dev,
4260 "Flexible data must reside within first 64 bytes of the packet payload\n");
4261 return -EINVAL;
4262 }
4263
4264 /* See if this offset has already been programmed. If we get
4265 * an ERR_PTR, then the filter is not safe to add. Otherwise,
4266 * if we get a NULL pointer, this means we will need to add
4267 * the offset.
4268 */
4269 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
4270 src_offset);
4271 if (IS_ERR(flex_pit))
4272 return PTR_ERR(flex_pit);
4273
4274 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
4275 * packet types, and thus we need to program both L3 and L4
4276 * flexible values. These must have identical flexible index,
4277 * as otherwise we can't correctly program the input set. So
4278 * we'll find both an L3 and L4 index and make sure they are
4279 * the same.
4280 */
4281 if (flex_l3) {
4282 l3_flex_pit =
4283 i40e_find_flex_offset(&pf->l3_flex_pit_list,
4284 src_offset);
4285 if (IS_ERR(l3_flex_pit))
4286 return PTR_ERR(l3_flex_pit);
4287
4288 if (flex_pit) {
4289 /* If we already had a matching L4 entry, we
4290 * need to make sure that the L3 entry we
4291 * obtained uses the same index.
4292 */
4293 if (l3_flex_pit) {
4294 if (l3_flex_pit->pit_index !=
4295 flex_pit->pit_index) {
4296 return -EINVAL;
4297 }
4298 } else {
4299 new_flex_offset = true;
4300 }
4301 } else {
4302 flex_pit = l3_flex_pit;
4303 }
4304 }
4305
4306 /* If we didn't find an existing flex offset, we need to
4307 * program a new one. However, we don't immediately program it
4308 * here because we will wait to program until after we check
4309 * that it is safe to change the input set.
4310 */
4311 if (!flex_pit) {
4312 new_flex_offset = true;
4313 pit_index = i40e_unused_pit_index(pf);
4314 } else {
4315 pit_index = flex_pit->pit_index;
4316 }
4317
4318 /* Update the mask with the new offset */
4319 new_mask |= i40e_pit_index_to_mask(pit_index);
4320 }
4321
4322 /* If the mask and flexible filter offsets for this filter match the
4323 * currently programmed values we don't need any input set change, so
4324 * this filter is safe to install.
4325 */
4326 if (new_mask == current_mask && !new_flex_offset)
4327 return 0;
4328
4329 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
4330 i40e_flow_str(fsp));
4331 i40e_print_input_set(vsi, current_mask, new_mask);
4332 if (new_flex_offset) {
4333 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
4334 pit_index, src_offset);
4335 }
4336
4337 /* Hardware input sets are global across multiple ports, so even the
4338 * main port cannot change them when in MFP mode as this would impact
4339 * any filters on the other ports.
4340 */
4341 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4342 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
4343 return -EOPNOTSUPP;
4344 }
4345
4346 /* This filter requires us to update the input set. However, hardware
4347 * only supports one input set per flow type, and does not support
4348 * separate masks for each filter. This means that we can only support
4349 * a single mask for all filters of a specific type.
4350 *
4351 * If we have preexisting filters, they obviously depend on the
4352 * current programmed input set. Display a diagnostic message in this
4353 * case explaining why the filter could not be accepted.
4354 */
4355 if (*fdir_filter_count) {
4356 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
4357 i40e_flow_str(fsp),
4358 *fdir_filter_count);
4359 return -EOPNOTSUPP;
4360 }
4361
4362 i40e_write_fd_input_set(pf, index, new_mask);
4363
4364 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
4365 * frames. If we're programming the input set for IPv4/Other, we also
4366 * need to program the IPv4/Fragmented input set. Since we don't have
4367 * separate support, we'll always assume and enforce that the two flow
4368 * types must have matching input sets.
4369 */
4370 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
4371 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
4372 new_mask);
4373
4374 /* Add the new offset and update table, if necessary */
4375 if (new_flex_offset) {
4376 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
4377 pit_index);
4378 if (err)
4379 return err;
4380
4381 if (flex_l3) {
4382 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
4383 src_offset,
4384 pit_index);
4385 if (err)
4386 return err;
4387 }
4388
4389 i40e_reprogram_flex_pit(pf);
4390 }
4391
4392 return 0;
4393 }
4394
4395 /**
4396 * i40e_match_fdir_filter - Return true of two filters match
4397 * @a: pointer to filter struct
4398 * @b: pointer to filter struct
4399 *
4400 * Returns true if the two filters match exactly the same criteria. I.e. they
4401 * match the same flow type and have the same parameters. We don't need to
4402 * check any input-set since all filters of the same flow type must use the
4403 * same input set.
4404 **/
i40e_match_fdir_filter(struct i40e_fdir_filter * a,struct i40e_fdir_filter * b)4405 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
4406 struct i40e_fdir_filter *b)
4407 {
4408 /* The filters do not much if any of these criteria differ. */
4409 if (a->dst_ip != b->dst_ip ||
4410 a->src_ip != b->src_ip ||
4411 a->dst_port != b->dst_port ||
4412 a->src_port != b->src_port ||
4413 a->flow_type != b->flow_type ||
4414 a->ip4_proto != b->ip4_proto)
4415 return false;
4416
4417 return true;
4418 }
4419
4420 /**
4421 * i40e_disallow_matching_filters - Check that new filters differ
4422 * @vsi: pointer to the targeted VSI
4423 * @input: new filter to check
4424 *
4425 * Due to hardware limitations, it is not possible for two filters that match
4426 * similar criteria to be programmed at the same time. This is true for a few
4427 * reasons:
4428 *
4429 * (a) all filters matching a particular flow type must use the same input
4430 * set, that is they must match the same criteria.
4431 * (b) different flow types will never match the same packet, as the flow type
4432 * is decided by hardware before checking which rules apply.
4433 * (c) hardware has no way to distinguish which order filters apply in.
4434 *
4435 * Due to this, we can't really support using the location data to order
4436 * filters in the hardware parsing. It is technically possible for the user to
4437 * request two filters matching the same criteria but which select different
4438 * queues. In this case, rather than keep both filters in the list, we reject
4439 * the 2nd filter when the user requests adding it.
4440 *
4441 * This avoids needing to track location for programming the filter to
4442 * hardware, and ensures that we avoid some strange scenarios involving
4443 * deleting filters which match the same criteria.
4444 **/
i40e_disallow_matching_filters(struct i40e_vsi * vsi,struct i40e_fdir_filter * input)4445 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
4446 struct i40e_fdir_filter *input)
4447 {
4448 struct i40e_pf *pf = vsi->back;
4449 struct i40e_fdir_filter *rule;
4450 struct hlist_node *node2;
4451
4452 /* Loop through every filter, and check that it doesn't match */
4453 hlist_for_each_entry_safe(rule, node2,
4454 &pf->fdir_filter_list, fdir_node) {
4455 /* Don't check the filters match if they share the same fd_id,
4456 * since the new filter is actually just updating the target
4457 * of the old filter.
4458 */
4459 if (rule->fd_id == input->fd_id)
4460 continue;
4461
4462 /* If any filters match, then print a warning message to the
4463 * kernel message buffer and bail out.
4464 */
4465 if (i40e_match_fdir_filter(rule, input)) {
4466 dev_warn(&pf->pdev->dev,
4467 "Existing user defined filter %d already matches this flow.\n",
4468 rule->fd_id);
4469 return -EINVAL;
4470 }
4471 }
4472
4473 return 0;
4474 }
4475
4476 /**
4477 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
4478 * @vsi: pointer to the targeted VSI
4479 * @cmd: command to get or set RX flow classification rules
4480 *
4481 * Add Flow Director filters for a specific flow spec based on their
4482 * protocol. Returns 0 if the filters were successfully added.
4483 **/
i40e_add_fdir_ethtool(struct i40e_vsi * vsi,struct ethtool_rxnfc * cmd)4484 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
4485 struct ethtool_rxnfc *cmd)
4486 {
4487 struct i40e_rx_flow_userdef userdef;
4488 struct ethtool_rx_flow_spec *fsp;
4489 struct i40e_fdir_filter *input;
4490 u16 dest_vsi = 0, q_index = 0;
4491 struct i40e_pf *pf;
4492 int ret = -EINVAL;
4493 u8 dest_ctl;
4494
4495 if (!vsi)
4496 return -EINVAL;
4497 pf = vsi->back;
4498
4499 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
4500 return -EOPNOTSUPP;
4501
4502 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
4503 return -ENOSPC;
4504
4505 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
4506 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
4507 return -EBUSY;
4508
4509 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
4510 return -EBUSY;
4511
4512 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
4513
4514 /* Parse the user-defined field */
4515 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
4516 return -EINVAL;
4517
4518 /* Extended MAC field is not supported */
4519 if (fsp->flow_type & FLOW_MAC_EXT)
4520 return -EINVAL;
4521
4522 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
4523 if (ret)
4524 return ret;
4525
4526 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
4527 pf->hw.func_caps.fd_filters_guaranteed)) {
4528 return -EINVAL;
4529 }
4530
4531 /* ring_cookie is either the drop index, or is a mask of the queue
4532 * index and VF id we wish to target.
4533 */
4534 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
4535 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4536 } else {
4537 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
4538 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
4539
4540 if (!vf) {
4541 if (ring >= vsi->num_queue_pairs)
4542 return -EINVAL;
4543 dest_vsi = vsi->id;
4544 } else {
4545 /* VFs are zero-indexed, so we subtract one here */
4546 vf--;
4547
4548 if (vf >= pf->num_alloc_vfs)
4549 return -EINVAL;
4550 if (ring >= pf->vf[vf].num_queue_pairs)
4551 return -EINVAL;
4552 dest_vsi = pf->vf[vf].lan_vsi_id;
4553 }
4554 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4555 q_index = ring;
4556 }
4557
4558 input = kzalloc(sizeof(*input), GFP_KERNEL);
4559
4560 if (!input)
4561 return -ENOMEM;
4562
4563 input->fd_id = fsp->location;
4564 input->q_index = q_index;
4565 input->dest_vsi = dest_vsi;
4566 input->dest_ctl = dest_ctl;
4567 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
4568 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
4569 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4570 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4571 input->flow_type = fsp->flow_type & ~FLOW_EXT;
4572 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
4573
4574 /* Reverse the src and dest notion, since the HW expects them to be from
4575 * Tx perspective where as the input from user is from Rx filter view.
4576 */
4577 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4578 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
4579 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4580 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4581
4582 if (userdef.flex_filter) {
4583 input->flex_filter = true;
4584 input->flex_word = cpu_to_be16(userdef.flex_word);
4585 input->flex_offset = userdef.flex_offset;
4586 }
4587
4588 /* Avoid programming two filters with identical match criteria. */
4589 ret = i40e_disallow_matching_filters(vsi, input);
4590 if (ret)
4591 goto free_filter_memory;
4592
4593 /* Add the input filter to the fdir_input_list, possibly replacing
4594 * a previous filter. Do not free the input structure after adding it
4595 * to the list as this would cause a use-after-free bug.
4596 */
4597 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
4598 ret = i40e_add_del_fdir(vsi, input, true);
4599 if (ret)
4600 goto remove_sw_rule;
4601 return 0;
4602
4603 remove_sw_rule:
4604 hlist_del(&input->fdir_node);
4605 pf->fdir_pf_active_filters--;
4606 free_filter_memory:
4607 kfree(input);
4608 return ret;
4609 }
4610
4611 /**
4612 * i40e_set_rxnfc - command to set RX flow classification rules
4613 * @netdev: network interface device structure
4614 * @cmd: ethtool rxnfc command
4615 *
4616 * Returns Success if the command is supported.
4617 **/
i40e_set_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * cmd)4618 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4619 {
4620 struct i40e_netdev_priv *np = netdev_priv(netdev);
4621 struct i40e_vsi *vsi = np->vsi;
4622 struct i40e_pf *pf = vsi->back;
4623 int ret = -EOPNOTSUPP;
4624
4625 switch (cmd->cmd) {
4626 case ETHTOOL_SRXFH:
4627 ret = i40e_set_rss_hash_opt(pf, cmd);
4628 break;
4629 case ETHTOOL_SRXCLSRLINS:
4630 ret = i40e_add_fdir_ethtool(vsi, cmd);
4631 break;
4632 case ETHTOOL_SRXCLSRLDEL:
4633 ret = i40e_del_fdir_entry(vsi, cmd);
4634 break;
4635 default:
4636 break;
4637 }
4638
4639 return ret;
4640 }
4641
4642 /**
4643 * i40e_max_channels - get Max number of combined channels supported
4644 * @vsi: vsi pointer
4645 **/
i40e_max_channels(struct i40e_vsi * vsi)4646 static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4647 {
4648 /* TODO: This code assumes DCB and FD is disabled for now. */
4649 return vsi->alloc_queue_pairs;
4650 }
4651
4652 /**
4653 * i40e_get_channels - Get the current channels enabled and max supported etc.
4654 * @dev: network interface device structure
4655 * @ch: ethtool channels structure
4656 *
4657 * We don't support separate tx and rx queues as channels. The other count
4658 * represents how many queues are being used for control. max_combined counts
4659 * how many queue pairs we can support. They may not be mapped 1 to 1 with
4660 * q_vectors since we support a lot more queue pairs than q_vectors.
4661 **/
i40e_get_channels(struct net_device * dev,struct ethtool_channels * ch)4662 static void i40e_get_channels(struct net_device *dev,
4663 struct ethtool_channels *ch)
4664 {
4665 struct i40e_netdev_priv *np = netdev_priv(dev);
4666 struct i40e_vsi *vsi = np->vsi;
4667 struct i40e_pf *pf = vsi->back;
4668
4669 /* report maximum channels */
4670 ch->max_combined = i40e_max_channels(vsi);
4671
4672 /* report info for other vector */
4673 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
4674 ch->max_other = ch->other_count;
4675
4676 /* Note: This code assumes DCB is disabled for now. */
4677 ch->combined_count = vsi->num_queue_pairs;
4678 }
4679
4680 /**
4681 * i40e_set_channels - Set the new channels count.
4682 * @dev: network interface device structure
4683 * @ch: ethtool channels structure
4684 *
4685 * The new channels count may not be the same as requested by the user
4686 * since it gets rounded down to a power of 2 value.
4687 **/
i40e_set_channels(struct net_device * dev,struct ethtool_channels * ch)4688 static int i40e_set_channels(struct net_device *dev,
4689 struct ethtool_channels *ch)
4690 {
4691 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4692 struct i40e_netdev_priv *np = netdev_priv(dev);
4693 unsigned int count = ch->combined_count;
4694 struct i40e_vsi *vsi = np->vsi;
4695 struct i40e_pf *pf = vsi->back;
4696 struct i40e_fdir_filter *rule;
4697 struct hlist_node *node2;
4698 int new_count;
4699 int err = 0;
4700
4701 /* We do not support setting channels for any other VSI at present */
4702 if (vsi->type != I40E_VSI_MAIN)
4703 return -EINVAL;
4704
4705 /* We do not support setting channels via ethtool when TCs are
4706 * configured through mqprio
4707 */
4708 if (pf->flags & I40E_FLAG_TC_MQPRIO)
4709 return -EINVAL;
4710
4711 /* verify they are not requesting separate vectors */
4712 if (!count || ch->rx_count || ch->tx_count)
4713 return -EINVAL;
4714
4715 /* verify other_count has not changed */
4716 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
4717 return -EINVAL;
4718
4719 /* verify the number of channels does not exceed hardware limits */
4720 if (count > i40e_max_channels(vsi))
4721 return -EINVAL;
4722
4723 /* verify that the number of channels does not invalidate any current
4724 * flow director rules
4725 */
4726 hlist_for_each_entry_safe(rule, node2,
4727 &pf->fdir_filter_list, fdir_node) {
4728 if (rule->dest_ctl != drop && count <= rule->q_index) {
4729 dev_warn(&pf->pdev->dev,
4730 "Existing user defined filter %d assigns flow to queue %d\n",
4731 rule->fd_id, rule->q_index);
4732 err = -EINVAL;
4733 }
4734 }
4735
4736 if (err) {
4737 dev_err(&pf->pdev->dev,
4738 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
4739 count);
4740 return err;
4741 }
4742
4743 /* update feature limits from largest to smallest supported values */
4744 /* TODO: Flow director limit, DCB etc */
4745
4746 /* use rss_reconfig to rebuild with new queue count and update traffic
4747 * class queue mapping
4748 */
4749 new_count = i40e_reconfig_rss_queues(pf, count);
4750 if (new_count > 0)
4751 return 0;
4752 else
4753 return -EINVAL;
4754 }
4755
4756 /**
4757 * i40e_get_rxfh_key_size - get the RSS hash key size
4758 * @netdev: network interface device structure
4759 *
4760 * Returns the table size.
4761 **/
i40e_get_rxfh_key_size(struct net_device * netdev)4762 static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
4763 {
4764 return I40E_HKEY_ARRAY_SIZE;
4765 }
4766
4767 /**
4768 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
4769 * @netdev: network interface device structure
4770 *
4771 * Returns the table size.
4772 **/
i40e_get_rxfh_indir_size(struct net_device * netdev)4773 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
4774 {
4775 return I40E_HLUT_ARRAY_SIZE;
4776 }
4777
4778 /**
4779 * i40e_get_rxfh - get the rx flow hash indirection table
4780 * @netdev: network interface device structure
4781 * @indir: indirection table
4782 * @key: hash key
4783 * @hfunc: hash function
4784 *
4785 * Reads the indirection table directly from the hardware. Returns 0 on
4786 * success.
4787 **/
i40e_get_rxfh(struct net_device * netdev,u32 * indir,u8 * key,u8 * hfunc)4788 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
4789 u8 *hfunc)
4790 {
4791 struct i40e_netdev_priv *np = netdev_priv(netdev);
4792 struct i40e_vsi *vsi = np->vsi;
4793 u8 *lut, *seed = NULL;
4794 int ret;
4795 u16 i;
4796
4797 if (hfunc)
4798 *hfunc = ETH_RSS_HASH_TOP;
4799
4800 if (!indir)
4801 return 0;
4802
4803 seed = key;
4804 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4805 if (!lut)
4806 return -ENOMEM;
4807 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
4808 if (ret)
4809 goto out;
4810 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4811 indir[i] = (u32)(lut[i]);
4812
4813 out:
4814 kfree(lut);
4815
4816 return ret;
4817 }
4818
4819 /**
4820 * i40e_set_rxfh - set the rx flow hash indirection table
4821 * @netdev: network interface device structure
4822 * @indir: indirection table
4823 * @key: hash key
4824 * @hfunc: hash function to use
4825 *
4826 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
4827 * returns 0 after programming the table.
4828 **/
i40e_set_rxfh(struct net_device * netdev,const u32 * indir,const u8 * key,const u8 hfunc)4829 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4830 const u8 *key, const u8 hfunc)
4831 {
4832 struct i40e_netdev_priv *np = netdev_priv(netdev);
4833 struct i40e_vsi *vsi = np->vsi;
4834 struct i40e_pf *pf = vsi->back;
4835 u8 *seed = NULL;
4836 u16 i;
4837
4838 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4839 return -EOPNOTSUPP;
4840
4841 if (key) {
4842 if (!vsi->rss_hkey_user) {
4843 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4844 GFP_KERNEL);
4845 if (!vsi->rss_hkey_user)
4846 return -ENOMEM;
4847 }
4848 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4849 seed = vsi->rss_hkey_user;
4850 }
4851 if (!vsi->rss_lut_user) {
4852 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4853 if (!vsi->rss_lut_user)
4854 return -ENOMEM;
4855 }
4856
4857 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
4858 if (indir)
4859 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4860 vsi->rss_lut_user[i] = (u8)(indir[i]);
4861 else
4862 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4863 vsi->rss_size);
4864
4865 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4866 I40E_HLUT_ARRAY_SIZE);
4867 }
4868
4869 /**
4870 * i40e_get_priv_flags - report device private flags
4871 * @dev: network interface device structure
4872 *
4873 * The get string set count and the string set should be matched for each
4874 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
4875 * array.
4876 *
4877 * Returns a u32 bitmap of flags.
4878 **/
i40e_get_priv_flags(struct net_device * dev)4879 static u32 i40e_get_priv_flags(struct net_device *dev)
4880 {
4881 struct i40e_netdev_priv *np = netdev_priv(dev);
4882 struct i40e_vsi *vsi = np->vsi;
4883 struct i40e_pf *pf = vsi->back;
4884 u32 i, j, ret_flags = 0;
4885
4886 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4887 const struct i40e_priv_flags *priv_flags;
4888
4889 priv_flags = &i40e_gstrings_priv_flags[i];
4890
4891 if (priv_flags->flag & pf->flags)
4892 ret_flags |= BIT(i);
4893 }
4894
4895 if (pf->hw.pf_id != 0)
4896 return ret_flags;
4897
4898 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4899 const struct i40e_priv_flags *priv_flags;
4900
4901 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4902
4903 if (priv_flags->flag & pf->flags)
4904 ret_flags |= BIT(i + j);
4905 }
4906
4907 return ret_flags;
4908 }
4909
4910 /**
4911 * i40e_set_priv_flags - set private flags
4912 * @dev: network interface device structure
4913 * @flags: bit flags to be set
4914 **/
i40e_set_priv_flags(struct net_device * dev,u32 flags)4915 static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4916 {
4917 struct i40e_netdev_priv *np = netdev_priv(dev);
4918 u64 orig_flags, new_flags, changed_flags;
4919 enum i40e_admin_queue_err adq_err;
4920 struct i40e_vsi *vsi = np->vsi;
4921 struct i40e_pf *pf = vsi->back;
4922 u32 reset_needed = 0;
4923 i40e_status status;
4924 u32 i, j;
4925
4926 orig_flags = READ_ONCE(pf->flags);
4927 new_flags = orig_flags;
4928
4929 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4930 const struct i40e_priv_flags *priv_flags;
4931
4932 priv_flags = &i40e_gstrings_priv_flags[i];
4933
4934 if (flags & BIT(i))
4935 new_flags |= priv_flags->flag;
4936 else
4937 new_flags &= ~(priv_flags->flag);
4938
4939 /* If this is a read-only flag, it can't be changed */
4940 if (priv_flags->read_only &&
4941 ((orig_flags ^ new_flags) & ~BIT(i)))
4942 return -EOPNOTSUPP;
4943 }
4944
4945 if (pf->hw.pf_id != 0)
4946 goto flags_complete;
4947
4948 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4949 const struct i40e_priv_flags *priv_flags;
4950
4951 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4952
4953 if (flags & BIT(i + j))
4954 new_flags |= priv_flags->flag;
4955 else
4956 new_flags &= ~(priv_flags->flag);
4957
4958 /* If this is a read-only flag, it can't be changed */
4959 if (priv_flags->read_only &&
4960 ((orig_flags ^ new_flags) & ~BIT(i)))
4961 return -EOPNOTSUPP;
4962 }
4963
4964 flags_complete:
4965 changed_flags = orig_flags ^ new_flags;
4966
4967 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP)
4968 reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
4969 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
4970 I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED))
4971 reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
4972
4973 /* Before we finalize any flag changes, we need to perform some
4974 * checks to ensure that the changes are supported and safe.
4975 */
4976
4977 /* ATR eviction is not supported on all devices */
4978 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
4979 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
4980 return -EOPNOTSUPP;
4981
4982 /* If the driver detected FW LLDP was disabled on init, this flag could
4983 * be set, however we do not support _changing_ the flag:
4984 * - on XL710 if NPAR is enabled or FW API version < 1.7
4985 * - on X722 with FW API version < 1.6
4986 * There are situations where older FW versions/NPAR enabled PFs could
4987 * disable LLDP, however we _must_ not allow the user to enable/disable
4988 * LLDP with this flag on unsupported FW versions.
4989 */
4990 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
4991 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) {
4992 dev_warn(&pf->pdev->dev,
4993 "Device does not support changing FW LLDP\n");
4994 return -EOPNOTSUPP;
4995 }
4996 }
4997
4998 if (changed_flags & I40E_FLAG_RS_FEC &&
4999 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5000 pf->hw.device_id != I40E_DEV_ID_25G_B) {
5001 dev_warn(&pf->pdev->dev,
5002 "Device does not support changing FEC configuration\n");
5003 return -EOPNOTSUPP;
5004 }
5005
5006 if (changed_flags & I40E_FLAG_BASE_R_FEC &&
5007 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5008 pf->hw.device_id != I40E_DEV_ID_25G_B &&
5009 pf->hw.device_id != I40E_DEV_ID_KX_X722) {
5010 dev_warn(&pf->pdev->dev,
5011 "Device does not support changing FEC configuration\n");
5012 return -EOPNOTSUPP;
5013 }
5014
5015 /* Process any additional changes needed as a result of flag changes.
5016 * The changed_flags value reflects the list of bits that were
5017 * changed in the code above.
5018 */
5019
5020 /* Flush current ATR settings if ATR was disabled */
5021 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5022 !(new_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5023 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
5024 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
5025 }
5026
5027 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
5028 u16 sw_flags = 0, valid_flags = 0;
5029 int ret;
5030
5031 if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
5032 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5033 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5034 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
5035 0, NULL);
5036 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
5037 dev_info(&pf->pdev->dev,
5038 "couldn't set switch config bits, err %s aq_err %s\n",
5039 i40e_stat_str(&pf->hw, ret),
5040 i40e_aq_str(&pf->hw,
5041 pf->hw.aq.asq_last_status));
5042 /* not a fatal problem, just keep going */
5043 }
5044 }
5045
5046 if ((changed_flags & I40E_FLAG_RS_FEC) ||
5047 (changed_flags & I40E_FLAG_BASE_R_FEC)) {
5048 u8 fec_cfg = 0;
5049
5050 if (new_flags & I40E_FLAG_RS_FEC &&
5051 new_flags & I40E_FLAG_BASE_R_FEC) {
5052 fec_cfg = I40E_AQ_SET_FEC_AUTO;
5053 } else if (new_flags & I40E_FLAG_RS_FEC) {
5054 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
5055 I40E_AQ_SET_FEC_ABILITY_RS);
5056 } else if (new_flags & I40E_FLAG_BASE_R_FEC) {
5057 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
5058 I40E_AQ_SET_FEC_ABILITY_KR);
5059 }
5060 if (i40e_set_fec_cfg(dev, fec_cfg))
5061 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
5062 }
5063
5064 if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5065 (orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) {
5066 dev_err(&pf->pdev->dev,
5067 "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
5068 return -EOPNOTSUPP;
5069 }
5070
5071 if ((changed_flags & new_flags &
5072 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5073 (new_flags & I40E_FLAG_MFP_ENABLED))
5074 dev_warn(&pf->pdev->dev,
5075 "Turning on link-down-on-close flag may affect other partitions\n");
5076
5077 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5078 if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5079 struct i40e_dcbx_config *dcbcfg;
5080
5081 i40e_aq_stop_lldp(&pf->hw, true, false, NULL);
5082 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL);
5083 /* reset local_dcbx_config to default */
5084 dcbcfg = &pf->hw.local_dcbx_config;
5085 dcbcfg->etscfg.willing = 1;
5086 dcbcfg->etscfg.maxtcs = 0;
5087 dcbcfg->etscfg.tcbwtable[0] = 100;
5088 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++)
5089 dcbcfg->etscfg.tcbwtable[i] = 0;
5090 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5091 dcbcfg->etscfg.prioritytable[i] = 0;
5092 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
5093 dcbcfg->pfc.willing = 1;
5094 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
5095 } else {
5096 status = i40e_aq_start_lldp(&pf->hw, false, NULL);
5097 if (status) {
5098 adq_err = pf->hw.aq.asq_last_status;
5099 switch (adq_err) {
5100 case I40E_AQ_RC_EEXIST:
5101 dev_warn(&pf->pdev->dev,
5102 "FW LLDP agent is already running\n");
5103 reset_needed = 0;
5104 break;
5105 case I40E_AQ_RC_EPERM:
5106 dev_warn(&pf->pdev->dev,
5107 "Device configuration forbids SW from starting the LLDP agent.\n");
5108 return -EINVAL;
5109 case I40E_AQ_RC_EAGAIN:
5110 dev_warn(&pf->pdev->dev,
5111 "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
5112 return -EBUSY;
5113 default:
5114 dev_warn(&pf->pdev->dev,
5115 "Starting FW LLDP agent failed: error: %s, %s\n",
5116 i40e_stat_str(&pf->hw,
5117 status),
5118 i40e_aq_str(&pf->hw,
5119 adq_err));
5120 return -EINVAL;
5121 }
5122 }
5123 }
5124 }
5125
5126 /* Now that we've checked to ensure that the new flags are valid, load
5127 * them into place. Since we only modify flags either (a) during
5128 * initialization or (b) while holding the RTNL lock, we don't need
5129 * anything fancy here.
5130 */
5131 pf->flags = new_flags;
5132
5133 /* Issue reset to cause things to take effect, as additional bits
5134 * are added we will need to create a mask of bits requiring reset
5135 */
5136 if (reset_needed)
5137 i40e_do_reset(pf, reset_needed, true);
5138
5139 return 0;
5140 }
5141
5142 /**
5143 * i40e_get_module_info - get (Q)SFP+ module type info
5144 * @netdev: network interface device structure
5145 * @modinfo: module EEPROM size and layout information structure
5146 **/
i40e_get_module_info(struct net_device * netdev,struct ethtool_modinfo * modinfo)5147 static int i40e_get_module_info(struct net_device *netdev,
5148 struct ethtool_modinfo *modinfo)
5149 {
5150 struct i40e_netdev_priv *np = netdev_priv(netdev);
5151 struct i40e_vsi *vsi = np->vsi;
5152 struct i40e_pf *pf = vsi->back;
5153 struct i40e_hw *hw = &pf->hw;
5154 u32 sff8472_comp = 0;
5155 u32 sff8472_swap = 0;
5156 u32 sff8636_rev = 0;
5157 i40e_status status;
5158 u32 type = 0;
5159
5160 /* Check if firmware supports reading module EEPROM. */
5161 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
5162 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
5163 return -EINVAL;
5164 }
5165
5166 status = i40e_update_link_info(hw);
5167 if (status)
5168 return -EIO;
5169
5170 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
5171 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
5172 return -EINVAL;
5173 }
5174
5175 type = hw->phy.link_info.module_type[0];
5176
5177 switch (type) {
5178 case I40E_MODULE_TYPE_SFP:
5179 status = i40e_aq_get_phy_register(hw,
5180 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5181 I40E_I2C_EEPROM_DEV_ADDR, true,
5182 I40E_MODULE_SFF_8472_COMP,
5183 &sff8472_comp, NULL);
5184 if (status)
5185 return -EIO;
5186
5187 status = i40e_aq_get_phy_register(hw,
5188 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5189 I40E_I2C_EEPROM_DEV_ADDR, true,
5190 I40E_MODULE_SFF_8472_SWAP,
5191 &sff8472_swap, NULL);
5192 if (status)
5193 return -EIO;
5194
5195 /* Check if the module requires address swap to access
5196 * the other EEPROM memory page.
5197 */
5198 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
5199 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
5200 modinfo->type = ETH_MODULE_SFF_8079;
5201 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5202 } else if (sff8472_comp == 0x00) {
5203 /* Module is not SFF-8472 compliant */
5204 modinfo->type = ETH_MODULE_SFF_8079;
5205 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5206 } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) {
5207 /* Module is SFF-8472 compliant but doesn't implement
5208 * Digital Diagnostic Monitoring (DDM).
5209 */
5210 modinfo->type = ETH_MODULE_SFF_8079;
5211 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5212 } else {
5213 modinfo->type = ETH_MODULE_SFF_8472;
5214 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
5215 }
5216 break;
5217 case I40E_MODULE_TYPE_QSFP_PLUS:
5218 /* Read from memory page 0. */
5219 status = i40e_aq_get_phy_register(hw,
5220 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5221 0, true,
5222 I40E_MODULE_REVISION_ADDR,
5223 &sff8636_rev, NULL);
5224 if (status)
5225 return -EIO;
5226 /* Determine revision compliance byte */
5227 if (sff8636_rev > 0x02) {
5228 /* Module is SFF-8636 compliant */
5229 modinfo->type = ETH_MODULE_SFF_8636;
5230 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5231 } else {
5232 modinfo->type = ETH_MODULE_SFF_8436;
5233 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5234 }
5235 break;
5236 case I40E_MODULE_TYPE_QSFP28:
5237 modinfo->type = ETH_MODULE_SFF_8636;
5238 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5239 break;
5240 default:
5241 netdev_err(vsi->netdev, "Module type unrecognized\n");
5242 return -EINVAL;
5243 }
5244 return 0;
5245 }
5246
5247 /**
5248 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
5249 * @netdev: network interface device structure
5250 * @ee: EEPROM dump request structure
5251 * @data: buffer to be filled with EEPROM contents
5252 **/
i40e_get_module_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)5253 static int i40e_get_module_eeprom(struct net_device *netdev,
5254 struct ethtool_eeprom *ee,
5255 u8 *data)
5256 {
5257 struct i40e_netdev_priv *np = netdev_priv(netdev);
5258 struct i40e_vsi *vsi = np->vsi;
5259 struct i40e_pf *pf = vsi->back;
5260 struct i40e_hw *hw = &pf->hw;
5261 bool is_sfp = false;
5262 i40e_status status;
5263 u32 value = 0;
5264 int i;
5265
5266 if (!ee || !ee->len || !data)
5267 return -EINVAL;
5268
5269 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
5270 is_sfp = true;
5271
5272 for (i = 0; i < ee->len; i++) {
5273 u32 offset = i + ee->offset;
5274 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
5275
5276 /* Check if we need to access the other memory page */
5277 if (is_sfp) {
5278 if (offset >= ETH_MODULE_SFF_8079_LEN) {
5279 offset -= ETH_MODULE_SFF_8079_LEN;
5280 addr = I40E_I2C_EEPROM_DEV_ADDR2;
5281 }
5282 } else {
5283 while (offset >= ETH_MODULE_SFF_8436_LEN) {
5284 /* Compute memory page number and offset. */
5285 offset -= ETH_MODULE_SFF_8436_LEN / 2;
5286 addr++;
5287 }
5288 }
5289
5290 status = i40e_aq_get_phy_register(hw,
5291 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5292 addr, true, offset, &value, NULL);
5293 if (status)
5294 return -EIO;
5295 data[i] = value;
5296 }
5297 return 0;
5298 }
5299
i40e_get_eee(struct net_device * netdev,struct ethtool_eee * edata)5300 static int i40e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
5301 {
5302 return -EOPNOTSUPP;
5303 }
5304
i40e_set_eee(struct net_device * netdev,struct ethtool_eee * edata)5305 static int i40e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
5306 {
5307 return -EOPNOTSUPP;
5308 }
5309
5310 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = {
5311 .get_drvinfo = i40e_get_drvinfo,
5312 .set_eeprom = i40e_set_eeprom,
5313 .get_eeprom_len = i40e_get_eeprom_len,
5314 .get_eeprom = i40e_get_eeprom,
5315 };
5316
5317 static const struct ethtool_ops i40e_ethtool_ops = {
5318 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
5319 ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
5320 ETHTOOL_COALESCE_USE_ADAPTIVE |
5321 ETHTOOL_COALESCE_RX_USECS_HIGH |
5322 ETHTOOL_COALESCE_TX_USECS_HIGH,
5323 .get_drvinfo = i40e_get_drvinfo,
5324 .get_regs_len = i40e_get_regs_len,
5325 .get_regs = i40e_get_regs,
5326 .nway_reset = i40e_nway_reset,
5327 .get_link = ethtool_op_get_link,
5328 .get_wol = i40e_get_wol,
5329 .set_wol = i40e_set_wol,
5330 .set_eeprom = i40e_set_eeprom,
5331 .get_eeprom_len = i40e_get_eeprom_len,
5332 .get_eeprom = i40e_get_eeprom,
5333 .get_ringparam = i40e_get_ringparam,
5334 .set_ringparam = i40e_set_ringparam,
5335 .get_pauseparam = i40e_get_pauseparam,
5336 .set_pauseparam = i40e_set_pauseparam,
5337 .get_msglevel = i40e_get_msglevel,
5338 .set_msglevel = i40e_set_msglevel,
5339 .get_rxnfc = i40e_get_rxnfc,
5340 .set_rxnfc = i40e_set_rxnfc,
5341 .self_test = i40e_diag_test,
5342 .get_strings = i40e_get_strings,
5343 .get_eee = i40e_get_eee,
5344 .set_eee = i40e_set_eee,
5345 .set_phys_id = i40e_set_phys_id,
5346 .get_sset_count = i40e_get_sset_count,
5347 .get_ethtool_stats = i40e_get_ethtool_stats,
5348 .get_coalesce = i40e_get_coalesce,
5349 .set_coalesce = i40e_set_coalesce,
5350 .get_rxfh_key_size = i40e_get_rxfh_key_size,
5351 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
5352 .get_rxfh = i40e_get_rxfh,
5353 .set_rxfh = i40e_set_rxfh,
5354 .get_channels = i40e_get_channels,
5355 .set_channels = i40e_set_channels,
5356 .get_module_info = i40e_get_module_info,
5357 .get_module_eeprom = i40e_get_module_eeprom,
5358 .get_ts_info = i40e_get_ts_info,
5359 .get_priv_flags = i40e_get_priv_flags,
5360 .set_priv_flags = i40e_set_priv_flags,
5361 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
5362 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
5363 .get_link_ksettings = i40e_get_link_ksettings,
5364 .set_link_ksettings = i40e_set_link_ksettings,
5365 .get_fecparam = i40e_get_fec_param,
5366 .set_fecparam = i40e_set_fec_param,
5367 .flash_device = i40e_ddp_flash,
5368 };
5369
i40e_set_ethtool_ops(struct net_device * netdev)5370 void i40e_set_ethtool_ops(struct net_device *netdev)
5371 {
5372 struct i40e_netdev_priv *np = netdev_priv(netdev);
5373 struct i40e_pf *pf = np->vsi->back;
5374
5375 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
5376 netdev->ethtool_ops = &i40e_ethtool_ops;
5377 else
5378 netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops;
5379 }
5380