1/* libunwind - a platform-independent unwind library 2 Copyright (C) 2021 Zhaofeng Li 3 4This file is part of libunwind. 5 6Permission is hereby granted, free of charge, to any person obtaining 7a copy of this software and associated documentation files (the 8"Software"), to deal in the Software without restriction, including 9without limitation the rights to use, copy, modify, merge, publish, 10distribute, sublicense, and/or sell copies of the Software, and to 11permit persons to whom the Software is furnished to do so, subject to 12the following conditions: 13 14The above copyright notice and this permission notice shall be 15included in all copies or substantial portions of the Software. 16 17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 20NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE 21LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ 24 25#include "offsets.h" 26#include "asm.h" 27 28#define REG(X) (UC_MCONTEXT_REGS_OFF + SZREG * X)(a0) 29#define FREG(X) (UC_MCONTEXT_REGS_OFF + SZREG * 32 + SZFREG * X)(a0) 30 31 .text 32 .global _Uriscv_setcontext 33 .type _Uriscv_setcontext, @function 34_Uriscv_setcontext: 35 .cfi_startproc 36 37#ifdef LOAD_FP 38 /* The FCSR is always 32-bits and comes after all registers */ 39 lw a1, FREG(32) 40 fscsr a1 41 42 LOAD_FP fs0, FREG(8) 43 LOAD_FP fs1, FREG(9) 44 LOAD_FP fs2, FREG(18) 45 LOAD_FP fs3, FREG(19) 46 LOAD_FP fs4, FREG(20) 47 LOAD_FP fs5, FREG(21) 48 LOAD_FP fs6, FREG(22) 49 LOAD_FP fs7, FREG(23) 50 LOAD_FP fs8, FREG(24) 51 LOAD_FP fs9, FREG(25) 52 LOAD_FP fs10, FREG(26) 53 LOAD_FP fs11, FREG(27) 54#endif 55 56 LOAD t1, REG(0) 57 LOAD ra, REG(1) 58 LOAD sp, REG(2) 59 LOAD s0, REG(8) 60 LOAD s1, REG(9) 61 LOAD a1, REG(11) 62 LOAD a2, REG(12) 63 LOAD a3, REG(13) 64 LOAD a4, REG(14) 65 LOAD a5, REG(15) 66 LOAD a6, REG(16) 67 LOAD a7, REG(17) 68 LOAD s2, REG(18) 69 LOAD s3, REG(19) 70 LOAD s4, REG(20) 71 LOAD s5, REG(21) 72 LOAD s6, REG(22) 73 LOAD s7, REG(23) 74 LOAD s8, REG(24) 75 LOAD s9, REG(25) 76 LOAD s10, REG(26) 77 LOAD s11, REG(27) 78 79 LOAD a0, REG(10) 80 81 jr t1 82 83 .cfi_endproc 84 .size _Uriscv_setcontext, . - _Uriscv_setcontext 85 86 /* We do not need executable stack. */ 87 .section .note.GNU-stack,"",@progbits 88