1 /****************************************************************************** 2 * 3 * Copyright (C) 2009-2018 Realtek Corporation. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 #ifndef HCIDEFS_H 19 #define HCIDEFS_H 20 21 #define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 22 #define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 23 #define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 24 #define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 25 #define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 26 #define HCI_PROTO_VERSION_4_0 0x06 /* Version for BT spec 4.0 */ 27 #define HCI_PROTO_VERSION_4_1 0x07 /* Version for BT spec 4.1 */ 28 #define HCI_PROTO_VERSION_4_2 0x08 /* Version for BT spec 4.2 */ 29 #define HCI_PROTO_VERSION_5_0 0x09 /* Version for BT spec 5.0 */ 30 31 /* 32 ** Definitions for HCI groups 33 */ 34 #define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 35 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 36 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 37 #define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 38 #define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 39 #define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 40 41 #define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 42 43 /* Group occupies high 6 bits of the HCI command rest is opcode itself */ 44 #define HCI_OGF(p) (uint8_t)((0xFC00 & (p)) >> 10) 45 #define HCI_OCF(p) (0x3FF & (p)) 46 47 /* 48 ** Definitions for Link Control Commands 49 */ 50 /* Following opcode is used only in command complete event for flow control */ 51 #define HCI_COMMAND_NONE 0x0000 52 53 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 54 #define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) 55 #define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) 56 #define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) 57 #define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) 58 #define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) 59 #define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) 60 #define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) 61 #define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) 62 #define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) 63 #define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) 64 #define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) 65 #define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) 66 #define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) 67 #define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) 68 #define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) 69 #define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) 70 #define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) 71 #define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) 72 #define HCI_MASTER_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) 73 #define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) 74 #define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) 75 #define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) 76 #define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) 77 #define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) 78 #define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) 79 #define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) 80 #define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) 81 #define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) 82 #define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) 83 #define HCI_IO_CAPABILITY_REQUEST_REPLY (0x002B | HCI_GRP_LINK_CONTROL_CMDS) 84 #define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) 85 #define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) 86 #define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) 87 #define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) 88 #define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) 89 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) 90 #define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) 91 92 /* AMP HCI */ 93 #define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) 94 #define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) 95 #define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) 96 #define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) 97 #define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) 98 #define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) 99 #define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) 100 #define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) 101 102 #define HCI_ENH_SETUP_ESCO_CONNECTION (0x003D | HCI_GRP_LINK_CONTROL_CMDS) 103 #define HCI_ENH_ACCEPT_ESCO_CONNECTION (0x003E | HCI_GRP_LINK_CONTROL_CMDS) 104 105 /* ConnectionLess Broadcast */ 106 #define HCI_TRUNCATED_PAGE (0x003F | HCI_GRP_LINK_CONTROL_CMDS) 107 #define HCI_TRUNCATED_PAGE_CANCEL (0x0040 | HCI_GRP_LINK_CONTROL_CMDS) 108 #define HCI_SET_CLB (0x0041 | HCI_GRP_LINK_CONTROL_CMDS) 109 #define HCI_RECEIVE_CLB (0x0042 | HCI_GRP_LINK_CONTROL_CMDS) 110 #define HCI_START_SYNC_TRAIN (0x0043 | HCI_GRP_LINK_CONTROL_CMDS) 111 #define HCI_RECEIVE_SYNC_TRAIN (0x0044 | HCI_GRP_LINK_CONTROL_CMDS) 112 113 #define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 114 #define HCI_LINK_CTRL_CMDS_LAST HCI_RECEIVE_SYNC_TRAIN 115 116 /* Commands of HCI_GRP_LINK_POLICY_CMDS */ 117 #define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) 118 #define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) 119 #define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) 120 #define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) 121 #define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) 122 #define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) 123 #define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) 124 #define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) 125 #define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) 126 #define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) 127 #define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) 128 #define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) 129 #define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) 130 #define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) 131 132 #define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 133 #define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 134 135 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 136 #define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 137 #define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 138 #define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 139 #define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 140 #define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 141 #define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 142 #define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 143 #define HCI_GET_MWS_TRANS_LAYER_CFG (0x000C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 144 #define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 145 #define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 146 #define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 147 #define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 148 #define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 149 #define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 150 #define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 151 #define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 152 #define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 153 #define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 154 #define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 155 #define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 156 #define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 157 #define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 158 #define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 159 #define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 160 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 161 #define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 162 #define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 163 #define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 164 #define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 165 #define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 166 #define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 167 #define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 168 #define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 169 #define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170 #define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171 #define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172 #define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173 #define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174 #define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 176 #define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 177 #define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178 #define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179 #define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180 #define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181 #define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182 #define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183 #define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184 #define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185 #define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186 #define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187 #define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 188 #define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 189 190 #define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191 #define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192 #define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193 #define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194 #define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 195 #define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 #define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 197 #define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 198 #define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 199 #define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200 #define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201 #define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202 #define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203 #define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204 #define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205 #define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206 #define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207 #define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208 #define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 209 #define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 210 211 /* AMP HCI */ 212 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 213 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 214 #define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 215 #define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 216 #define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 217 #define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 218 #define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 219 #define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 220 #define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 221 #define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) /* 802.11 only */ 222 #define HCI_READ_LE_HOST_SUPPORT (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 223 #define HCI_WRITE_LE_HOST_SUPPORT (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 224 225 /* MWS coexistence */ 226 #define HCI_SET_MWS_CHANNEL_PARAMETERS (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 227 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 228 #define HCI_SET_MWS_SIGNALING (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 229 #define HCI_SET_MWS_TRANSPORT_LAYER (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 230 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 231 #define HCI_SET_MWS_PATTERN_CONFIGURATION (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 232 233 /* Connectionless Broadcast */ 234 #define HCI_SET_RESERVED_LT_ADDR (0x0074 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 235 #define HCI_DELETE_RESERVED_LT_ADDR (0x0075 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 236 #define HCI_WRITE_CLB_DATA (0x0076 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 237 #define HCI_READ_SYNC_TRAIN_PARAM (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 238 #define HCI_WRITE_SYNC_TRAIN_PARAM (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 239 240 #define HCI_READ_SECURE_CONNS_SUPPORT (0x0079 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 241 #define HCI_WRITE_SECURE_CONNS_SUPPORT (0x007A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 242 #define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 243 #define HCI_CONT_BASEBAND_CMDS_LAST HCI_READ_SYNC_TRAIN_PARAM 244 245 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 246 #define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 247 #define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 248 #define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 249 #define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 250 #define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 251 #define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 252 #define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 253 #define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 254 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS) 255 256 #define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 257 #define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_LOCAL_SUPPORTED_CODECS 258 259 /* Commands of HCI_GRP_STATUS_PARAMS group */ 260 #define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 261 #define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 262 #define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 263 #define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 264 #define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 265 #define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 266 #define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 267 268 /* AMP HCI */ 269 #define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 270 #define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 271 #define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 272 273 #define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 274 #define HCI_STATUS_PARAMS_CMDS_LAST HCI_WRITE_REMOTE_AMP_ASSOC 275 276 /* Commands of HCI_GRP_TESTING_CMDS group */ 277 #define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 278 #define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 279 #define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 280 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 281 282 /* AMP HCI */ 283 #define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 284 #define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 285 #define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 286 287 #define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 288 #define HCI_TESTING_CMDS_LAST HCI_AMP_TEST 289 290 #define HCI_VENDOR_CMDS_FIRST 0x0001 291 #define HCI_VENDOR_CMDS_LAST 0xFFFF 292 #define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 293 #define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 294 295 /* BLE HCI */ 296 #define HCI_GRP_BLE_CMDS (0x08 << 10) 297 /* Commands of BLE Controller setup and configuration */ 298 #define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) 299 #define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) 300 #define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) 301 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) 302 #define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) 303 #define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) 304 #define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) 305 #define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) 306 #define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) 307 #define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) 308 #define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) 309 #define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) 310 #define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) 311 #define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) 312 #define HCI_BLE_READ_WHITE_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) 313 #define HCI_BLE_CLEAR_WHITE_LIST (0x0010 | HCI_GRP_BLE_CMDS) 314 #define HCI_BLE_ADD_WHITE_LIST (0x0011 | HCI_GRP_BLE_CMDS) 315 #define HCI_BLE_REMOVE_WHITE_LIST (0x0012 | HCI_GRP_BLE_CMDS) 316 #define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) 317 #define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) 318 #define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) 319 #define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) 320 #define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) 321 #define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) 322 #define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) 323 #define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) 324 #define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) 325 #define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) 326 /*0x001D, 0x001E and 0x001F are reserved*/ 327 #define HCI_BLE_RECEIVER_TEST (0x001D | HCI_GRP_BLE_CMDS) 328 #define HCI_BLE_TRANSMITTER_TEST (0x001E | HCI_GRP_BLE_CMDS) 329 /* BLE TEST COMMANDS */ 330 #define HCI_BLE_TEST_END (0x001F | HCI_GRP_BLE_CMDS) 331 #define HCI_BLE_RC_PARAM_REQ_REPLY (0x0020 | HCI_GRP_BLE_CMDS) 332 #define HCI_BLE_RC_PARAM_REQ_NEG_REPLY (0x0021 | HCI_GRP_BLE_CMDS) 333 334 #define HCI_BLE_SET_DATA_LENGTH (0x0022 | HCI_GRP_BLE_CMDS) 335 #define HCI_BLE_READ_DEFAULT_DATA_LENGTH (0x0023 | HCI_GRP_BLE_CMDS) 336 #define HCI_BLE_WRITE_DEFAULT_DATA_LENGTH (0x0024 | HCI_GRP_BLE_CMDS) 337 338 #define HCI_BLE_ADD_DEV_RESOLVING_LIST (0x0027 | HCI_GRP_BLE_CMDS) 339 #define HCI_BLE_RM_DEV_RESOLVING_LIST (0x0028 | HCI_GRP_BLE_CMDS) 340 #define HCI_BLE_CLEAR_RESOLVING_LIST (0x0029 | HCI_GRP_BLE_CMDS) 341 #define HCI_BLE_READ_RESOLVING_LIST_SIZE (0x002A | HCI_GRP_BLE_CMDS) 342 #define HCI_BLE_READ_RESOLVABLE_ADDR_PEER (0x002B | HCI_GRP_BLE_CMDS) 343 #define HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL (0x002C | HCI_GRP_BLE_CMDS) 344 #define HCI_BLE_SET_ADDR_RESOLUTION_ENABLE (0x002D | HCI_GRP_BLE_CMDS) 345 #define HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT (0x002E | HCI_GRP_BLE_CMDS) 346 #define HCI_BLE_READ_MAXIMUM_DATA_LENGTH (0x002F | HCI_GRP_BLE_CMDS) 347 #define HCI_BLE_READ_PHY (0x0030 | HCI_GRP_BLE_CMDS) 348 #define HCI_BLE_SET_DEFAULT_PHY (0x0031 | HCI_GRP_BLE_CMDS) 349 #define HCI_BLE_SET_PHY (0x0032 | HCI_GRP_BLE_CMDS) 350 #define HCI_BLE_ENH_RECEIVER_TEST (0x0033 | HCI_GRP_BLE_CMDS) 351 #define HCI_BLE_ENH_TRANSMITTER_TEST (0x0034 | HCI_GRP_BLE_CMDS) 352 #define HCI_LE_SET_EXT_ADVERTISING_RANDOM_ADDRESS (0x35 | HCI_GRP_BLE_CMDS) 353 #define HCI_LE_SET_EXT_ADVERTISING_PARAM (0x36 | HCI_GRP_BLE_CMDS) 354 #define HCI_LE_SET_EXT_ADVERTISING_DATA (0x37 | HCI_GRP_BLE_CMDS) 355 #define HCI_LE_SET_EXT_ADVERTISING_SCAN_RESP (0x38 | HCI_GRP_BLE_CMDS) 356 #define HCI_LE_SET_EXT_ADVERTISING_ENABLE (0x39 | HCI_GRP_BLE_CMDS) 357 #define HCI_LE_READ_MAXIMUM_ADVERTISING_DATA_LENGTH (0x003A | HCI_GRP_BLE_CMDS) 358 #define HCI_LE_READ_NUMBER_OF_SUPPORTED_ADVERTISING_SETS \ 359 (0x003B | HCI_GRP_BLE_CMDS) 360 #define HCI_LE_REMOVE_ADVERTISING_SET (0x003C | HCI_GRP_BLE_CMDS) 361 #define HCI_LE_CLEAR_ADVERTISING_SETS (0x003D | HCI_GRP_BLE_CMDS) 362 #define HCI_LE_SET_PERIODIC_ADVERTISING_PARAM (0x003E | HCI_GRP_BLE_CMDS) 363 #define HCI_LE_SET_PERIODIC_ADVERTISING_DATA (0x003F | HCI_GRP_BLE_CMDS) 364 #define HCI_LE_SET_PERIODIC_ADVERTISING_ENABLE (0x0040 | HCI_GRP_BLE_CMDS) 365 #define HCI_LE_SET_EXTENDED_SCAN_PARAMETERS (0x0041 | HCI_GRP_BLE_CMDS) 366 #define HCI_LE_SET_EXTENDED_SCAN_ENABLE (0x0042 | HCI_GRP_BLE_CMDS) 367 #define HCI_LE_EXTENDED_CREATE_CONNECTION (0x0043 | HCI_GRP_BLE_CMDS) 368 #define HCI_BLE_PERIODIC_ADVERTISING_CREATE_SYNC (0x0044 | HCI_GRP_BLE_CMDS) 369 #define HCI_BLE_PERIODIC_ADVERTISING_CREATE_SYNC_CANCEL \ 370 (0x0045 | HCI_GRP_BLE_CMDS) 371 #define HCI_BLE_PERIODIC_ADVERTISING_TERMINATE_SYNC \ 372 (0x0046 | HCI_GRP_BLE_CMDS) 373 #define HCI_BLE_ADD_DEVICE_TO_PERIODIC_ADVERTISING_LIST \ 374 (0x0047 | HCI_GRP_BLE_CMDS) 375 #define HCI_BLE_RM_DEVICE_FROM_PERIODIC_ADVERTISING_LIST \ 376 (0x0048 | HCI_GRP_BLE_CMDS) 377 #define HCI_BLE_CLEAR_PERIODIC_ADVERTISING_LIST (0x0049 | HCI_GRP_BLE_CMDS) 378 #define HCI_BLE_READ_PERIODIC_ADVERTISING_LIST_SIZE (0x004A | HCI_GRP_BLE_CMDS) 379 #define HCI_BLE_READ_TRANSMIT_POWER (0x004B | HCI_GRP_BLE_CMDS) 380 #define HCI_BLE_READ_RF_COMPENS_POWER (0x004C | HCI_GRP_BLE_CMDS) 381 #define HCI_BLE_WRITE_RF_COMPENS_POWER (0x004D | HCI_GRP_BLE_CMDS) 382 #define HCI_BLE_SET_PRIVACY_MODE (0x004E | HCI_GRP_BLE_CMDS) 383 384 /* LE Get Vendor Capabilities Command OCF */ 385 #define HCI_BLE_VENDOR_CAP_OCF (0x0153 | HCI_GRP_VENDOR_SPECIFIC) 386 387 /* Multi adv OCF */ 388 #define HCI_BLE_MULTI_ADV_OCF (0x0154 | HCI_GRP_VENDOR_SPECIFIC) 389 390 /* Batch scan OCF */ 391 #define HCI_BLE_BATCH_SCAN_OCF (0x0156 | HCI_GRP_VENDOR_SPECIFIC) 392 393 /* ADV filter OCF */ 394 #define HCI_BLE_ADV_FILTER_OCF (0x0157 | HCI_GRP_VENDOR_SPECIFIC) 395 396 /* Tracking OCF */ 397 #define HCI_BLE_TRACK_ADV_OCF (0x0158 | HCI_GRP_VENDOR_SPECIFIC) 398 399 /* Energy info OCF */ 400 #define HCI_BLE_ENERGY_INFO_OCF (0x0159 | HCI_GRP_VENDOR_SPECIFIC) 401 402 /* Extended BLE Scan parameters OCF */ 403 #define HCI_BLE_EXTENDED_SCAN_PARAMS_OCF (0x015A | HCI_GRP_VENDOR_SPECIFIC) 404 405 /* Controller debug info OCF */ 406 #define HCI_CONTROLLER_DEBUG_INFO_OCF (0x015B | HCI_GRP_VENDOR_SPECIFIC) 407 408 /* subcode for multi adv feature */ 409 #define BTM_BLE_MULTI_ADV_SET_PARAM 0x01 410 #define BTM_BLE_MULTI_ADV_WRITE_ADV_DATA 0x02 411 #define BTM_BLE_MULTI_ADV_WRITE_SCAN_RSP_DATA 0x03 412 #define BTM_BLE_MULTI_ADV_SET_RANDOM_ADDR 0x04 413 #define BTM_BLE_MULTI_ADV_ENB 0x05 414 415 /* multi adv VSE subcode */ 416 #define HCI_VSE_SUBCODE_BLE_MULTI_ADV_ST_CHG 0x55 /* multi adv instance state change */ 417 418 /* subcode for batch scan feature */ 419 #define BTM_BLE_BATCH_SCAN_ENB_DISAB_CUST_FEATURE 0x01 420 #define BTM_BLE_BATCH_SCAN_SET_STORAGE_PARAM 0x02 421 #define BTM_BLE_BATCH_SCAN_SET_PARAMS 0x03 422 #define BTM_BLE_BATCH_SCAN_READ_RESULTS 0x04 423 424 /* batch scan VSE subcode */ 425 #define HCI_VSE_SUBCODE_BLE_THRESHOLD_SUB_EVT 0x54 /* Threshold event */ 426 427 /* tracking sub event */ 428 #define HCI_VSE_SUBCODE_BLE_TRACKING_SUB_EVT 0x56 /* Tracking event */ 429 430 /* debug info sub event */ 431 #define HCI_VSE_SUBCODE_DEBUG_INFO_SUB_EVT 0x57 432 433 /* LE supported states definition */ 434 #define HCI_LE_ADV_STATE 0x00000001 435 #define HCI_LE_SCAN_STATE 0x00000002 436 #define HCI_LE_INIT_STATE 0x00000004 437 #define HCI_LE_CONN_SL_STATE 0x00000008 438 #define HCI_LE_ADV_SCAN_STATE 0x00000010 439 #define HCI_LE_ADV_INIT_STATE 0x00000020 440 #define HCI_LE_ADV_MA_STATE 0x00000040 441 #define HCI_LE_ADV_SL_STATE 0x00000080 442 #define HCI_LE_SCAN_INIT_STATE 0x00000100 443 #define HCI_LE_SCAN_MA_STATE 0x00000200 444 #define HCI_LE_SCAN_SL_STATE 0x00000400 445 #define HCI_LE_INIT_MA_STATE 0x00000800 446 447 /* LE Supported States */ 448 /* Non Connectable Adv state is supported. 0x0000000000000001 */ 449 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK 0x01 450 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF 0 451 #define HCI_LE_STATES_NON_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK) 452 453 /*Scanneable Connectable Adv state is supported. 0x0000000000000002 */ 454 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASK 0x02 455 #define HCI_SUPP_LE_STATESSCAN_ADV_OFF 0 456 #define HCI_LE_STATES_SCAN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATESSCAN_ADV_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASK) 457 458 /* Connectable Adv state is supported. 0x0000000000000004 */ 459 #define HCI_SUPP_LE_STATES_CONN_ADV_MASK 0x04 460 #define HCI_SUPP_LE_STATES_CONN_ADV_OFF 0 461 #define HCI_LE_STATES_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASK) 462 463 /* Hi duty Cycle Directed Adv state is supported. 0x0000000000000008 */ 464 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK 0x08 465 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF 0 466 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK) 467 468 /* Passive Scan state is supported. 0x0000000000000010 */ 469 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASK 0x10 470 #define HCI_SUPP_LE_STATES_PASS_SCAN_OFF 0 471 #define HCI_LE_STATES_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASK) 472 473 /* Active Scan state is supported. 0x0000000000000020 */ 474 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK 0x20 475 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF 0 476 #define HCI_LE_STATES_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK) 477 478 /* Initiating state is supported. 0x0000000000000040 (or connection state in master role is also supported) */ 479 #define HCI_SUPP_LE_STATES_INIT_MASK 0x40 480 #define HCI_SUPP_LE_STATES_INIT_OFF 0 481 #define HCI_LE_STATES_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_OFF] & HCI_SUPP_LE_STATES_INIT_MASK) 482 483 /*connection state in slave role is also supported. 0x0000000000000080 */ 484 #define HCI_SUPP_LE_STATES_SLAVE_MASK 0x80 485 #define HCI_SUPP_LE_STATES_SLAVE_OFF 0 486 #define HCI_LE_STATES_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SLAVE_OFF] & HCI_SUPP_LE_STATES_SLAVE_MASK) 487 488 /* Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000100 */ 489 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK 0x01 490 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF 1 491 #define HCI_LE_STATES_NON_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK) 492 493 /*Scannable Adv state and Passive Scanning State combination is supported. 0x0000000000000200 */ 494 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK 0x02 495 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF 1 496 #define HCI_LE_STATES_SCAN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK) 497 498 /*Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000400 */ 499 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK 0x04 500 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF 1 501 #define HCI_LE_STATES_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK) 502 503 /*High Duty Cycl Directed ADv and Passive Scanning State combination is supported. 0x0000000000000800 */ 504 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK 0x08 505 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF 1 506 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF) 507 508 /*Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000001000 */ 509 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK 0x10 510 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF 1 511 #define HCI_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK) 512 513 /*Scannable Adv state and Active Scanning State combination is supported. 0x0000000000002000 */ 514 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK 0x20 515 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF 1 516 #define HCI_LE_STATES_SCAN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK) 517 518 /*Connectable Adv state and Active Scanning State combination is supported. 0x0000000000004000 */ 519 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK 0x40 520 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF 1 521 #define HCI_LE_STATES_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK) 522 523 /*High Duty Cycl Directed ADv and ACtive Scanning State combination is supported. 0x0000000000008000 */ 524 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 525 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 1 526 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF) 527 528 /*Non-Connectable Adv state and Initiating State combination is supported. 0x0000000000010000 */ 529 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK 0x01 530 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF 2 531 #define HCI_LE_STATES_NON_CONN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF] & HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK) 532 533 /* Scannable Adv state and Initiating State combination is supported. 0x0000000000020000 */ 534 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK 0x02 535 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF 2 536 #define HCI_LE_STATES_SCAN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK) 537 538 /* Non-Connectable Adv state and Master Role combination is supported. 0x0000000000040000 */ 539 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK 0x04 540 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF 2 541 #define HCI_LE_STATES_NON_CONN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK) 542 543 /*Scannable Adv state and Master Role combination is supported. 0x0000000000040000 */ 544 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK 0x08 545 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF 2 546 #define HCI_LE_STATES_SCAN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK) 547 548 /* Non-Connectable Adv and Slave Role combination is supported. 0x000000000100000 */ 549 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK 0x10 550 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF 2 551 #define HCI_LE_STATES_NON_CONN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK) 552 553 /*Scannable Adv and Slave Role combination is supported. 0x000000000200000 */ 554 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK 0x20 555 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF 2 556 #define HCI_LE_STATES_SCAN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK) 557 558 /*Passive Scan and Initiating State combination is supported. 0x000000000400000 */ 559 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK 0x40 560 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF 2 561 #define HCI_LE_STATES_PASS_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK) 562 563 /*Active Scan and Initiating State combination is supported. 0x000000000800000 */ 564 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK 0x80 565 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF 2 566 #define HCI_LE_STATES_ACTIVE_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK) 567 568 /*Passive Scan and Master Role combination is supported. 0x000000001000000 */ 569 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK 0x01 570 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF 3 571 #define HCI_LE_STATES_PASS_SCAN_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK) 572 573 /*Active Scan and Master Role combination is supported. 0x000000002000000 */ 574 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK 0x02 575 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF 3 576 #define HCI_LE_STATES_ACTIVE_SCAN_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK) 577 578 /*Passive Scan and Slave Role combination is supported. 0x000000004000000 */ 579 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK 0x04 580 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF 3 581 #define HCI_LE_STATES_PASS_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK) 582 583 /*Active Scan and Slave Role combination is supported. 0x000000008000000 */ 584 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK 0x08 585 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF 3 586 #define HCI_LE_STATES_ACTIVE_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK) 587 588 /*Link Layer Topology Added States Combo */ 589 /*Initiating State and Master Role combination supported. 590 Master Role and Master Role combination is also supported. 0x0000000010000000 */ 591 #define HCI_SUPP_LE_STATES_INIT_MASTER_MASK 0x10 592 #define HCI_SUPP_LE_STATES_INIT_MASTER_OFF 3 593 #define HCI_LE_STATES_INIT_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_MASK) 594 595 /*Low Duty Cycle Directed Advertising State . 0x0000000020000000 */ 596 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASK 0x20 597 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_OFF 3 598 #define HCI_LE_STATES_LOW_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_MASK) 599 600 /*Low Duty Cycle Directed Advertising State and Passive scan combination. 0x0000000040000000 */ 601 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK 0x40 602 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF 3 603 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK) 604 605 /*Low Duty Cycle Directed Advertising State and Active scan combination . 0x0000000080000000 */ 606 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 607 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 3 608 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK) 609 610 /* Connectable Advertising State and Initiating State combination supported. 0x0000000100000000 */ 611 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK 0x01 612 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF 4 613 #define HCI_LE_STATES_CONN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK) 614 615 /* High Duty Cycle Directed Advertising State and Initiating State combination supported. */ 616 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK 0x02 617 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF 4 618 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK) 619 620 /* Low Duty Cycle Directed Advertising State and Initiating State combination supported.*/ 621 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK 0x04 622 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF 4 623 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK) 624 625 /* Connectable Advertising State and Master Role combination supported.*/ 626 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK 0x08 627 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF 4 628 #define HCI_LE_STATES_CONN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK) 629 630 /* High Duty Cycle Directed Advertising State and Master Role combination supported.*/ 631 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK 0x10 632 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF 4 633 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK) 634 635 /* Low Duty Cycle Directed Advertising State and Master Role combination supported.*/ 636 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK 0x20 637 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF 4 638 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK) 639 640 /* Connectable Advertising State and Slave Role combination supported. */ 641 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK 0x40 642 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF 4 643 #define HCI_LE_STATES_CONN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK) 644 645 /* High Duty Cycle Directed Advertising State and slave Role combination supported.*/ 646 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK 0x80 647 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF 4 648 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK) 649 650 /* Low Duty Cycle Directed Advertising State and slave Role combination supported.*/ 651 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK 0x01 652 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF 5 653 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK) 654 655 /* Initiating State and Slave Role combination supported. 656 Master Role and Slave Role combination also supported. 657 */ 658 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK 0x02 659 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF 5 660 #define HCI_LE_STATES_INIT_MASTER_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK) 661 662 /* 663 ** Definitions for HCI Events 664 */ 665 #define HCI_INQUIRY_COMP_EVT 0x01 666 #define HCI_INQUIRY_RESULT_EVT 0x02 667 #define HCI_CONNECTION_COMP_EVT 0x03 668 #define HCI_CONNECTION_REQUEST_EVT 0x04 669 #define HCI_DISCONNECTION_COMP_EVT 0x05 670 #define HCI_AUTHENTICATION_COMP_EVT 0x06 671 #define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 672 #define HCI_ENCRYPTION_CHANGE_EVT 0x08 673 #define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 674 #define HCI_MASTER_LINK_KEY_COMP_EVT 0x0A 675 #define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 676 #define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 677 #define HCI_QOS_SETUP_COMP_EVT 0x0D 678 #define HCI_COMMAND_COMPLETE_EVT 0x0E 679 #define HCI_COMMAND_STATUS_EVT 0x0F 680 #define HCI_HARDWARE_ERROR_EVT 0x10 681 #define HCI_FLUSH_OCCURED_EVT 0x11 682 #define HCI_ROLE_CHANGE_EVT 0x12 683 #define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 684 #define HCI_MODE_CHANGE_EVT 0x14 685 #define HCI_RETURN_LINK_KEYS_EVT 0x15 686 #define HCI_PIN_CODE_REQUEST_EVT 0x16 687 #define HCI_LINK_KEY_REQUEST_EVT 0x17 688 #define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 689 #define HCI_LOOPBACK_COMMAND_EVT 0x19 690 #define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 691 #define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 692 #define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 693 #define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 694 #define HCI_QOS_VIOLATION_EVT 0x1E 695 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 696 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 697 #define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 698 #define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 699 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 700 #define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 701 #define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 702 #define HCI_SNIFF_SUB_RATE_EVT 0x2E 703 #define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 704 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 705 #define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 706 #define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 707 #define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 708 #define HCI_USER_PASSKEY_REQUEST_EVT 0x34 709 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 710 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 711 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 712 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 713 #define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 714 #define HCI_KEYPRESS_NOTIFY_EVT 0x3C 715 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 716 717 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 718 #define HCI_PHYSICAL_LINK_COMP_EVT 0x40 719 #define HCI_CHANNEL_SELECTED_EVT 0x41 720 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 721 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 722 #define HCI_PHY_LINK_RECOVERY_EVT 0x44 723 #define HCI_LOGICAL_LINK_COMP_EVT 0x45 724 #define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 725 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 726 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 727 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 728 #define HCI_AMP_STATUS_CHANGE_EVT 0x4D 729 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE_EVT 0x4E 730 #ifdef BLUETOOTH_RTK_API 731 #define HCI_SL_PAGE_RESPONSE_TO_EVT 0x54 732 #define HCI_CONNLESS_SL_BC_TO_EVT 0x52 733 #endif 734 735 /* ULP HCI Event */ 736 #define HCI_BLE_EVENT 0x3e 737 /* ULP Event sub code */ 738 #define HCI_BLE_CONN_COMPLETE_EVT 0x01 739 #define HCI_BLE_ADV_PKT_RPT_EVT 0x02 740 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 741 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 742 #define HCI_BLE_LTK_REQ_EVT 0x05 743 #define HCI_BLE_RC_PARAM_REQ_EVT 0x06 744 #define HCI_BLE_DATA_LENGTH_CHANGE_EVT 0x07 745 #define HCI_BLE_ENHANCED_CONN_COMPLETE_EVT 0x0a 746 #define HCI_BLE_DIRECT_ADV_EVT 0x0b 747 748 /* Definitions for LE Channel Map */ 749 #define HCI_BLE_CHNL_MAP_SIZE 5 750 751 #define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 752 #define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF \ 753 because conflict w/ TCI_EVT and per \ 754 specification compliant */ 755 756 /* 757 ** Defentions for HCI Error Codes that are past in the events 758 */ 759 #define HCI_SUCCESS 0x00 760 #define HCI_PENDING 0x00 761 #define HCI_ERR_ILLEGAL_COMMAND 0x01 762 #define HCI_ERR_NO_CONNECTION 0x02 763 #define HCI_ERR_HW_FAILURE 0x03 764 #define HCI_ERR_PAGE_TIMEOUT 0x04 765 #define HCI_ERR_AUTH_FAILURE 0x05 766 #define HCI_ERR_KEY_MISSING 0x06 767 #define HCI_ERR_MEMORY_FULL 0x07 768 #define HCI_ERR_CONNECTION_TOUT 0x08 769 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 770 #define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 771 #define HCI_ERR_CONNECTION_EXISTS 0x0B 772 #define HCI_ERR_COMMAND_DISALLOWED 0x0C 773 #define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 774 #define HCI_ERR_HOST_REJECT_SECURITY 0x0E 775 #define HCI_ERR_HOST_REJECT_DEVICE 0x0F 776 #define HCI_ERR_HOST_TIMEOUT 0x10 777 #define HCI_ERR_UNSUPPORTED_VALUE 0x11 778 #define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 779 #define HCI_ERR_PEER_USER 0x13 780 #define HCI_ERR_PEER_LOW_RESOURCES 0x14 781 #define HCI_ERR_PEER_POWER_OFF 0x15 782 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 783 #define HCI_ERR_REPEATED_ATTEMPTS 0x17 784 #define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 785 #define HCI_ERR_UNKNOWN_LMP_PDU 0x19 786 #define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 787 #define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 788 #define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 789 #define HCI_ERR_SCO_AIR_MODE 0x1D 790 #define HCI_ERR_INVALID_LMP_PARAM 0x1E 791 #define HCI_ERR_UNSPECIFIED 0x1F 792 #define HCI_ERR_UNSUPPORTED_LMP_FEATURE 0x20 793 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 794 #define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 795 #define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 796 #define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 797 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 798 #define HCI_ERR_UNIT_KEY_USED 0x26 799 #define HCI_ERR_QOS_NOT_SUPPORTED 0x27 800 #define HCI_ERR_INSTANT_PASSED 0x28 801 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 802 #define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 803 #define HCI_ERR_UNDEFINED_0x2B 0x2B 804 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 805 #define HCI_ERR_QOS_REJECTED 0x2D 806 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 807 #define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 808 #define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 809 #define HCI_ERR_UNDEFINED_0x31 0x31 810 #define HCI_ERR_ROLE_SWITCH_PENDING 0x32 811 #define HCI_ERR_UNDEFINED_0x33 0x33 812 #define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 813 #define HCI_ERR_ROLE_SWITCH_FAILED 0x35 814 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 815 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 816 #define HCI_ERR_HOST_BUSY_PAIRING 0x38 817 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 818 #define HCI_ERR_CONTROLLER_BUSY 0x3A 819 #define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 820 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 821 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 822 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 823 #define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 824 825 /* ConnectionLess Broadcast errors */ 826 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE 0x40 827 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED 0x41 828 #define HCI_ERR_CLB_NOT_ENABLED 0x42 829 #define HCI_ERR_CLB_DATA_TOO_BIG 0x43 830 831 #define HCI_ERR_MAX_ERR 0x43 832 833 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 834 835 /* 836 ** Definitions for HCI enable event 837 */ 838 #define HCI_INQUIRY_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000001) 839 #define HCI_INQUIRY_RESULT_EV(p) (*((uint32_t *)(p)) & 0x00000002) 840 #define HCI_CONNECTION_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000004) 841 #define HCI_CONNECTION_REQUEST_EV(p) (*((uint32_t *)(p)) & 0x00000008) 842 #define HCI_DISCONNECTION_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000010) 843 #define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000020) 844 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((uint32_t *)(p)) & 0x00000040) 845 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((uint32_t *)(p)) & 0x00000080) 846 #define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((uint32_t *)(p)) & 0x00000100) 847 #define HCI_MASTER_LINK_KEY_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000200) 848 #define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((uint32_t *)(p)) & 0x00000400) 849 #define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((uint32_t *)(p)) & 0x00000800) 850 #define HCI_QOS_SETUP_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00001000) 851 #define HCI_COMMAND_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00002000) 852 #define HCI_COMMAND_STATUS_EV(p) (*((uint32_t *)(p)) & 0x00004000) 853 #define HCI_HARDWARE_ERROR_EV(p) (*((uint32_t *)(p)) & 0x00008000) 854 #define HCI_FLASH_OCCURED_EV(p) (*((uint32_t *)(p)) & 0x00010000) 855 #define HCI_ROLE_CHANGE_EV(p) (*((uint32_t *)(p)) & 0x00020000) 856 #define HCI_NUM_COMPLETED_PKTS_EV(p) (*((uint32_t *)(p)) & 0x00040000) 857 #define HCI_MODE_CHANGE_EV(p) (*((uint32_t *)(p)) & 0x00080000) 858 #define HCI_RETURN_LINK_KEYS_EV(p) (*((uint32_t *)(p)) & 0x00100000) 859 #define HCI_PIN_CODE_REQUEST_EV(p) (*((uint32_t *)(p)) & 0x00200000) 860 #define HCI_LINK_KEY_REQUEST_EV(p) (*((uint32_t *)(p)) & 0x00400000) 861 #define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((uint32_t *)(p)) & 0x00800000) 862 #define HCI_LOOPBACK_COMMAND_EV(p) (*((uint32_t *)(p)) & 0x01000000) 863 #define HCI_DATA_BUF_OVERFLOW_EV(p) (*((uint32_t *)(p)) & 0x02000000) 864 #define HCI_MAX_SLOTS_CHANGE_EV(p) (*((uint32_t *)(p)) & 0x04000000) 865 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((uint32_t *)(p)) & 0x08000000) 866 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((uint32_t *)(p)) & 0x10000000) 867 #define HCI_QOS_VIOLATION_EV(p) (*((uint32_t *)(p)) & 0x20000000) 868 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((uint32_t *)(p)) & 0x40000000) 869 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((uint32_t *)(p)) & 0x80000000) 870 871 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 872 #define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 873 #define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 874 875 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 876 #define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 877 #define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 878 #define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 879 #define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 880 #define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 881 /* 0x00001FFF FFFFFFFF Default - no Lisbon events 882 0x00000800 00000000 Synchronous Connection Complete Event 883 0x00001000 00000000 Synchronous Connection Changed Event 884 0x00002000 00000000 Sniff Subrate Event 885 0x00004000 00000000 Extended Inquiry Result Event 886 0x00008000 00000000 Encryption Key Refresh Complete Event 887 0x00010000 00000000 IO Capability Request Event 888 0x00020000 00000000 IO Capability Response Event 889 0x00040000 00000000 User Confirmation Request Event 890 0x00080000 00000000 User Passkey Request Event 891 0x00100000 00000000 Remote OOB Data Request Event 892 0x00200000 00000000 Simple Pairing Complete Event 893 0x00400000 00000000 Generic AMP Link Key Notification Event 894 0x00800000 00000000 Link Supervision Timeout Changed Event 895 0x01000000 00000000 Enhanced Flush Complete Event 896 0x04000000 00000000 User Passkey Notification Event 897 0x08000000 00000000 Keypress Notification Event 898 0x10000000 00000000 Remote Host Supported Features Notification Event 899 0x20000000 00000000 LE Meta Event 900 */ 901 902 /* the event mask for AMP controllers */ 903 #define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 904 905 /* 0x0000000000000000 No events specified (default) 906 0x0000000000000001 Physical Link Complete Event 907 0x0000000000000002 Channel Selected Event 908 0x0000000000000004 Disconnection Physical Link Event 909 0x0000000000000008 Physical Link Loss Early Warning Event 910 0x0000000000000010 Physical Link Recovery Event 911 0x0000000000000020 Logical Link Complete Event 912 0x0000000000000040 Disconnection Logical Link Complete Event 913 0x0000000000000080 Flow Spec Modify Complete Event 914 0x0000000000000100 Number of Completed Data Blocks Event 915 0x0000000000000200 AMP Start Test Event 916 0x0000000000000400 AMP Test End Event 917 0x0000000000000800 AMP Receiver Report Event 918 0x0000000000001000 Short Range Mode Change Complete Event 919 0x0000000000002000 AMP Status Change Event 920 */ 921 922 /* the event mask page 2 (CLB + CSA4) for BR/EDR controller */ 923 #define HCI_PAGE_2_EVENT_MASK "\x00\x00\x00\x00\x00\x7F\xC0\x00" 924 /* 0x0000000000004000 Triggered Clock Capture Event 925 0x0000000000008000 Sync Train Complete Event 926 0x0000000000010000 Sync Train Received Event 927 0x0000000000020000 Connectionless Broadcast Receive Event 928 0x0000000000040000 Connectionless Broadcast Timeout Event 929 0x0000000000080000 Truncated Page Complete Event 930 0x0000000000100000 Salve Page Response Timeout Event 931 0x0000000000200000 Connectionless Broadcast Channel Map Change Event 932 0x0000000000400000 Inquiry Response Notification Event 933 */ 934 #if BLE_PRIVACY_SPT == TRUE 935 /* BLE event mask */ 936 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\x00\x00\x00\x07\xff" 937 #else 938 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\x00\x00\x00\x00\x7f" 939 #endif 940 /* 941 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 942 */ 943 #define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 944 #define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 945 #define HCI_PKT_TYPES_MASK_DM1 0x0008 946 #define HCI_PKT_TYPES_MASK_DH1 0x0010 947 #define HCI_PKT_TYPES_MASK_HV1 0x0020 948 #define HCI_PKT_TYPES_MASK_HV2 0x0040 949 #define HCI_PKT_TYPES_MASK_HV3 0x0080 950 #define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 951 #define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 952 #define HCI_PKT_TYPES_MASK_DM3 0x0400 953 #define HCI_PKT_TYPES_MASK_DH3 0x0800 954 #define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 955 #define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 956 #define HCI_PKT_TYPES_MASK_DM5 0x4000 957 #define HCI_PKT_TYPES_MASK_DH5 0x8000 958 959 /* Packet type should be one of valid but at least one should be specified */ 960 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 | HCI_PKT_TYPES_MASK_HV2 | HCI_PKT_TYPES_MASK_HV3)) == 0)) && ((t) != 0)) 961 962 /* Packet type should not be invalid and at least one should be specified */ 963 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 | HCI_PKT_TYPES_MASK_DH1 | HCI_PKT_TYPES_MASK_DM3 | HCI_PKT_TYPES_MASK_DH3 | HCI_PKT_TYPES_MASK_DM5 | HCI_PKT_TYPES_MASK_DH5 | HCI_PKT_TYPES_MASK_NO_2_DH1 | HCI_PKT_TYPES_MASK_NO_3_DH1 | HCI_PKT_TYPES_MASK_NO_2_DH3 | HCI_PKT_TYPES_MASK_NO_3_DH3 | HCI_PKT_TYPES_MASK_NO_2_DH5 | HCI_PKT_TYPES_MASK_NO_3_DH5)) == 0)) && (((t) & (HCI_PKT_TYPES_MASK_DM1 | HCI_PKT_TYPES_MASK_DH1 | HCI_PKT_TYPES_MASK_DM3 | HCI_PKT_TYPES_MASK_DH3 | HCI_PKT_TYPES_MASK_DM5 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 964 965 /* 966 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 967 */ 968 #define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 969 #define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 970 #define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 971 #define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 972 #define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 973 #define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 974 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 975 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 976 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 977 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 978 979 /* Packet type should be one of valid but at least one should be specified for 1.2 */ 980 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 | HCI_ESCO_PKT_TYPES_MASK_EV4 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) && ((t) != 0)) /* Packet type should be one of valid but at least one should be specified */ 981 982 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 | HCI_ESCO_PKT_TYPES_MASK_HV2 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) && ((t) != 0)) 983 984 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 | HCI_ESCO_PKT_TYPES_MASK_HV2 | HCI_ESCO_PKT_TYPES_MASK_HV3 | HCI_ESCO_PKT_TYPES_MASK_EV3 | HCI_ESCO_PKT_TYPES_MASK_EV4 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) && ((t) != 0)) 985 986 /* 987 ** Define parameters to allow role switch during create connection 988 */ 989 #define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 990 #define HCI_CR_CONN_ALLOW_SWITCH 0x01 991 992 /* 993 ** Hold Mode command destination 994 */ 995 #define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 996 #define HOLD_MODE_DEST_RMT_DEVICE 0x01 997 998 /* 999 ** Definitions for different HCI parameters 1000 */ 1001 #define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 1002 #define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 1003 #define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 1004 #define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 1005 1006 #define HCI_MAX_INQUIRY_LENGTH 0x30 1007 1008 #define HCI_MIN_INQ_LAP 0x9E8B00 1009 #define HCI_MAX_INQ_LAP 0x9E8B3F 1010 1011 /* HCI role definitions */ 1012 #define HCI_ROLE_MASTER 0x00 1013 #define HCI_ROLE_SLAVE 0x01 1014 #define HCI_ROLE_UNKNOWN 0xff 1015 1016 /* HCI mode definitions */ 1017 #define HCI_MODE_ACTIVE 0x00 1018 #define HCI_MODE_HOLD 0x01 1019 #define HCI_MODE_SNIFF 0x02 1020 #define HCI_MODE_PARK 0x03 1021 1022 /* HCI Flow Control Mode definitions */ 1023 #define HCI_PACKET_BASED_FC_MODE 0x00 1024 #define HCI_BLOCK_BASED_FC_MODE 0x01 1025 1026 /* Define Packet types as requested by the Host */ 1027 #define HCI_ACL_PKT_TYPE_NONE 0x0000 1028 #define HCI_ACL_PKT_TYPE_DM1 0x0008 1029 #define HCI_ACL_PKT_TYPE_DH1 0x0010 1030 #define HCI_ACL_PKT_TYPE_AUX1 0x0200 1031 #define HCI_ACL_PKT_TYPE_DM3 0x0400 1032 #define HCI_ACL_PKT_TYPE_DH3 0x0800 1033 #define HCI_ACL_PKT_TYPE_DM5 0x4000 1034 #define HCI_ACL_PKT_TYPE_DH5 0x8000 1035 1036 /* Define key type in the Master Link Key command */ 1037 #define HCI_USE_SEMI_PERMANENT_KEY 0x00 1038 #define HCI_USE_TEMPORARY_KEY 0x01 1039 1040 /* Page scan period modes */ 1041 #define HCI_PAGE_SCAN_REP_MODE_R0 0x00 1042 #define HCI_PAGE_SCAN_REP_MODE_R1 0x01 1043 #define HCI_PAGE_SCAN_REP_MODE_R2 0x02 1044 1045 /* Define limits for page scan repetition modes */ 1046 #define HCI_PAGE_SCAN_R1_LIMIT 0x0800 1047 #define HCI_PAGE_SCAN_R2_LIMIT 0x1000 1048 1049 /* Page scan period modes */ 1050 #define HCI_PAGE_SCAN_PER_MODE_P0 0x00 1051 #define HCI_PAGE_SCAN_PER_MODE_P1 0x01 1052 #define HCI_PAGE_SCAN_PER_MODE_P2 0x02 1053 1054 /* Page scan modes */ 1055 #define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 1056 #define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 1057 #define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 1058 #define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 1059 1060 /* Page and inquiry scan types */ 1061 #define HCI_SCAN_TYPE_STANDARD 0x00 1062 #define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 1063 #define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 1064 1065 /* Definitions for quality of service service types */ 1066 #define HCI_SERVICE_NO_TRAFFIC 0x00 1067 #define HCI_SERVICE_BEST_EFFORT 0x01 1068 #define HCI_SERVICE_GUARANTEED 0x02 1069 1070 #define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1071 #define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 1072 1073 /* Definitions for Flow Specification */ 1074 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1075 1076 /* Definitions for AFH Channel Map */ 1077 #define HCI_AFH_CHANNEL_MAP_LEN 10 1078 1079 /* Definitions for Extended Inquiry Response */ 1080 #define HCI_EXT_INQ_RESPONSE_LEN 240 1081 #define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 1082 #define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 1083 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 1084 #define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 1085 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 1086 #define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 1087 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 1088 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 1089 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 1090 #define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 1091 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 1092 #define HCI_EIR_SERVICE_DATA_TYPE BT_EIR_SERVICE_DATA_TYPE 1093 #define HCI_EIR_SERVICE_DATA_16BITS_UUID_TYPE BT_EIR_SERVICE_DATA_16BITS_UUID_TYPE 1094 #define HCI_EIR_SERVICE_DATA_32BITS_UUID_TYPE BT_EIR_SERVICE_DATA_32BITS_UUID_TYPE 1095 #define HCI_EIR_SERVICE_DATA_128BITS_UUID_TYPE BT_EIR_SERVICE_DATA_128BITS_UUID_TYPE 1096 #define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 1097 #define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 1098 #define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 1099 #define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 1100 1101 /* Definitions for Write Simple Pairing Mode */ 1102 #define HCI_SP_MODE_UNDEFINED 0x00 1103 #define HCI_SP_MODE_ENABLED 0x01 1104 1105 /* Definitions for Write Simple Pairing Debug Mode */ 1106 #define HCI_SPD_MODE_DISABLED 0x00 1107 #define HCI_SPD_MODE_ENABLED 0x01 1108 1109 /* Definitions for Write Secure Connections Host Support */ 1110 #define HCI_SC_MODE_DISABLED 0x00 1111 #define HCI_SC_MODE_ENABLED 0x01 1112 1113 /* Definitions for IO Capability Response/Command */ 1114 #define HCI_IO_CAP_DISPLAY_ONLY 0x00 1115 #define HCI_IO_CAP_DISPLAY_YESNO 0x01 1116 #define HCI_IO_CAP_KEYBOARD_ONLY 0x02 1117 #define HCI_IO_CAP_NO_IO 0x03 1118 1119 #define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 1120 #define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 1121 1122 #define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 1123 #define HCI_MITM_PROTECT_REQUIRED 0x01 1124 1125 /* Policy settings status */ 1126 #define HCI_DISABLE_ALL_LM_MODES 0x0000 1127 #define HCI_ENABLE_MASTER_SLAVE_SWITCH 0x0001 1128 #define HCI_ENABLE_HOLD_MODE 0x0002 1129 #define HCI_ENABLE_SNIFF_MODE 0x0004 1130 #define HCI_ENABLE_PARK_MODE 0x0008 1131 1132 /* By default allow switch, because host can not allow that */ 1133 /* that until he created the connection */ 1134 #define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 1135 1136 /* Filters that are sent in set filter command */ 1137 #define HCI_FILTER_TYPE_CLEAR_ALL 0x00 1138 #define HCI_FILTER_INQUIRY_RESULT 0x01 1139 #define HCI_FILTER_CONNECTION_SETUP 0x02 1140 1141 #define HCI_FILTER_COND_NEW_DEVICE 0x00 1142 #define HCI_FILTER_COND_DEVICE_CLASS 0x01 1143 #define HCI_FILTER_COND_BD_ADDR 0x02 1144 1145 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 1146 #define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 1147 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 1148 1149 /* Auto accept flags */ 1150 #define HCI_AUTO_ACCEPT_OFF 0x00 1151 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 1152 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 1153 1154 /* PIN type */ 1155 #define HCI_PIN_TYPE_VARIABLE 0 1156 #define HCI_PIN_TYPE_FIXED 1 1157 1158 /* Loopback Modes */ 1159 #define HCI_LOOPBACK_MODE_DISABLED 0 1160 #define HCI_LOOPBACK_MODE_LOCAL 1 1161 #define HCI_LOOPBACK_MODE_REMOTE 2 1162 1163 #define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 1164 1165 /* Maximum connection accept timeout in 0.625msec */ 1166 #define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 1167 #define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 1168 1169 /* Page timeout is used in LC only and LC is counting down slots not using OS */ 1170 #define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 1171 1172 /* Scan enable flags */ 1173 #define HCI_NO_SCAN_ENABLED 0x00 1174 #define HCI_INQUIRY_SCAN_ENABLED 0x01 1175 #define HCI_PAGE_SCAN_ENABLED 0x02 1176 1177 /* Pagescan timer definitions in 0.625 ms */ 1178 #define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 1179 #define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 1180 #define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 1181 1182 /* Parameter for pagescan window is passed to LC and is kept in slots */ 1183 #define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 1184 #define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 1185 #define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 1186 1187 /* Inquiryscan timer definitions in 0.625 ms */ 1188 #define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 1189 #define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1190 #define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1191 1192 /* Parameter for inquiryscan window is passed to LC and is kept in slots */ 1193 #define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 1194 #define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 1195 #define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 1196 1197 /* Encryption modes */ 1198 #define HCI_ENCRYPT_MODE_DISABLED 0x00 1199 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 1200 #define HCI_ENCRYPT_MODE_ALL 0x02 1201 1202 /* Voice settings */ 1203 #define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 1204 #define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 1205 #define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 1206 #define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 1207 1208 #define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 1209 #define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 1210 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 1211 #define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 1212 #define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 1213 1214 #define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 1215 #define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 1216 #define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 1217 1218 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 1219 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 1220 1221 #define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 1222 #define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 1223 #define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 1224 #define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 1225 #define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 1226 1227 /* default 0001100000 */ 1228 #define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR | HCI_INP_DATA_FMT_2S_COMPLEMENT | HCI_INP_SAMPLE_SIZE_16BIT | HCI_AIR_CODING_FORMAT_CVSD) 1229 1230 #define HCI_CVSD_SUPPORTED(x) (((x)&HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 1231 #define HCI_U_LAW_SUPPORTED(x) (((x)&HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 1232 #define HCI_A_LAW_SUPPORTED(x) (((x)&HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 1233 #define HCI_TRANSPNT_SUPPORTED(x) (((x)&HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 1234 1235 /* Retransmit timer definitions in 0.625 */ 1236 #define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 1237 #define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 1238 1239 /* Broadcast retransmitions */ 1240 #define HCI_DEFAULT_NUM_BCAST_RETRAN 1 1241 1242 /* Define broadcast data types as passed in the hci data packet */ 1243 #define HCI_DATA_POINT_TO_POINT 0x00 1244 #define HCI_DATA_ACTIVE_BCAST 0x01 1245 #define HCI_DATA_PICONET_BCAST 0x02 1246 1247 /* Hold mode activity */ 1248 #define HCI_MAINTAIN_CUR_POWER_STATE 0x00 1249 #define HCI_SUSPEND_PAGE_SCAN 0x01 1250 #define HCI_SUSPEND_INQUIRY_SCAN 0x02 1251 #define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 1252 1253 /* Default Link Supervision timeoout */ 1254 #define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 1255 #define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 1256 1257 /* Read transmit power level parameter */ 1258 #define HCI_READ_CURRENT 0x00 1259 #define HCI_READ_MAXIMUM 0x01 1260 1261 /* Link types for connection complete event */ 1262 #define HCI_LINK_TYPE_SCO 0x00 1263 #define HCI_LINK_TYPE_ACL 0x01 1264 #define HCI_LINK_TYPE_ESCO 0x02 1265 1266 /* Link Key Notification Event (Key Type) definitions */ 1267 #define HCI_LKEY_TYPE_COMBINATION 0x00 1268 #define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 1269 #define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 1270 #define HCI_LKEY_TYPE_DEBUG_COMB 0x03 1271 #define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 1272 #define HCI_LKEY_TYPE_AUTH_COMB 0x05 1273 #define HCI_LKEY_TYPE_CHANGED_COMB 0x06 1274 #define HCI_LKEY_TYPE_UNAUTH_COMB_P_256 0x07 1275 #define HCI_LKEY_TYPE_AUTH_COMB_P_256 0x08 1276 1277 /* Internal definitions - not used over HCI */ 1278 #define HCI_LKEY_TYPE_AMP_WIFI 0x80 1279 #define HCI_LKEY_TYPE_AMP_UWB 0x81 1280 #define HCI_LKEY_TYPE_UNKNOWN 0xff 1281 1282 /* Read Local Version HCI Version return values (Command Complete Event) */ 1283 #define HCI_VERSION_1_0B 0x00 1284 #define HCI_VERSION_1_1 0x01 1285 1286 /* Define an invalid value for a handle */ 1287 #define HCI_INVALID_HANDLE 0xFFFF 1288 1289 /* Define max amount of data in the HCI command */ 1290 #define HCI_COMMAND_SIZE 255 1291 1292 /* Define the preamble length for all HCI Commands. 1293 ** This is 2-bytes for opcode and 1 byte for length 1294 */ 1295 #define HCIC_PREAMBLE_SIZE 3 1296 1297 /* Define the preamble length for all HCI Events 1298 ** This is 1-byte for opcode and 1 byte for length 1299 */ 1300 #define HCIE_PREAMBLE_SIZE 2 1301 #define HCI_SCO_PREAMBLE_SIZE 3 1302 #define HCI_DATA_PREAMBLE_SIZE 4 1303 1304 /* local Bluetooth controller id for AMP HCI */ 1305 #define LOCAL_BR_EDR_CONTROLLER_ID 0 1306 1307 /* controller id types for AMP HCI */ 1308 #define HCI_CONTROLLER_TYPE_BR_EDR 0 1309 #define HCI_CONTROLLER_TYPE_802_11 1 1310 #define HCI_CONTROLLER_TYPE_ECMA 2 1311 #define HCI_MAX_CONTROLLER_TYPES 3 1312 1313 /* ConnectionLess Broadcast */ 1314 #define HCI_CLB_DISABLE 0x00 1315 #define HCI_CLB_ENABLE 0x01 1316 1317 /* ConnectionLess Broadcast Data fragment */ 1318 #define HCI_CLB_FRAGMENT_CONT 0x00 1319 #define HCI_CLB_FRAGMENT_START 0x01 1320 #define HCI_CLB_FRAGMENT_END 0x02 1321 #define HCI_CLB_FRAGMENT_SINGLE 0x03 1322 1323 /* AMP Controller Status codes 1324 */ 1325 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1326 #define HCI_AMP_CTRLR_USABLE_BY_BT 1 1327 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1328 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1329 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1330 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1331 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1332 1333 #define HCI_MAX_AMP_STATUS_TYPES 7 1334 1335 /* Define the extended flow specification fields used by AMP */ 1336 typedef struct 1337 { 1338 uint8_t id; 1339 uint8_t stype; 1340 uint16_t max_sdu_size; 1341 uint32_t sdu_inter_time; 1342 uint32_t access_latency; 1343 uint32_t flush_timeout; 1344 } tHCI_EXT_FLOW_SPEC; 1345 1346 /* HCI message type definitions (for H4 messages) */ 1347 #define HCIT_TYPE_COMMAND 1 1348 #define HCIT_TYPE_ACL_DATA 2 1349 #define HCIT_TYPE_SCO_DATA 3 1350 #define HCIT_TYPE_EVENT 4 1351 #define HCIT_TYPE_LM_DIAG 7 1352 #define HCIT_TYPE_NFC 16 1353 1354 #define HCIT_LM_DIAG_LENGTH 63 1355 1356 /* Parameter information for HCI_BRCM_SET_ACL_PRIORITY */ 1357 #define HCI_BRCM_ACL_PRIORITY_PARAM_SIZE 3 1358 #define HCI_BRCM_ACL_PRIORITY_LOW 0x00 1359 #define HCI_BRCM_ACL_PRIORITY_HIGH 0xFF 1360 #define HCI_BRCM_SET_ACL_PRIORITY (0x0057 | HCI_GRP_VENDOR_SPECIFIC) 1361 1362 /* Define values for LMP Test Control parameters 1363 ** Test Scenario, Hopping Mode, Power Control Mode 1364 */ 1365 #define LMP_TESTCTL_TESTSC_PAUSE 0 1366 #define LMP_TESTCTL_TESTSC_TXTEST_0 1 1367 #define LMP_TESTCTL_TESTSC_TXTEST_1 2 1368 #define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1369 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1370 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1371 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1372 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1373 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1374 #define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1375 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1376 1377 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1378 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1379 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1380 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1381 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1382 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1383 1384 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1385 #define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1386 1387 // TODO(zachoverflow): remove this once broadcom specific hacks are removed 1388 #define LMP_COMPID_BROADCOM 15 1389 1390 /* 1391 ** Define the packet types in the packet header, and a couple extra 1392 */ 1393 #define PKT_TYPE_NULL 0x00 1394 #define PKT_TYPE_POLL 0x01 1395 #define PKT_TYPE_FHS 0x02 1396 #define PKT_TYPE_DM1 0x03 1397 1398 #define PKT_TYPE_DH1 0x04 1399 #define PKT_TYPE_HV1 0x05 1400 #define PKT_TYPE_HV2 0x06 1401 #define PKT_TYPE_HV3 0x07 1402 #define PKT_TYPE_DV 0x08 1403 #define PKT_TYPE_AUX1 0x09 1404 1405 #define PKT_TYPE_DM3 0x0a 1406 #define PKT_TYPE_DH3 0x0b 1407 1408 #define PKT_TYPE_DM5 0x0e 1409 #define PKT_TYPE_DH5 0x0f 1410 1411 #define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1412 #define PKT_TYPE_BAD 0x11 1413 #define PKT_TYPE_NONE 0x12 1414 1415 /* 1416 ** Define packet size 1417 */ 1418 #define HCI_DM1_PACKET_SIZE 17 1419 #define HCI_DH1_PACKET_SIZE 27 1420 #define HCI_DM3_PACKET_SIZE 121 1421 #define HCI_DH3_PACKET_SIZE 183 1422 #define HCI_DM5_PACKET_SIZE 224 1423 #define HCI_DH5_PACKET_SIZE 339 1424 #define HCI_AUX1_PACKET_SIZE 29 1425 #define HCI_HV1_PACKET_SIZE 10 1426 #define HCI_HV2_PACKET_SIZE 20 1427 #define HCI_HV3_PACKET_SIZE 30 1428 #define HCI_DV_PACKET_SIZE 9 1429 #define HCI_EDR2_DH1_PACKET_SIZE 54 1430 #define HCI_EDR2_DH3_PACKET_SIZE 367 1431 #define HCI_EDR2_DH5_PACKET_SIZE 679 1432 #define HCI_EDR3_DH1_PACKET_SIZE 83 1433 #define HCI_EDR3_DH3_PACKET_SIZE 552 1434 #define HCI_EDR3_DH5_PACKET_SIZE 1021 1435 1436 /* Feature Pages */ 1437 #define HCI_EXT_FEATURES_PAGE_0 0 /* Extended Feature Page 0 (regular features) */ 1438 #define HCI_EXT_FEATURES_PAGE_1 1 /* Extended Feature Page 1 */ 1439 #define HCI_EXT_FEATURES_PAGE_2 2 /* Extended Feature Page 2 */ 1440 #define HCI_EXT_FEATURES_PAGE_MAX HCI_EXT_FEATURES_PAGE_2 1441 1442 #define HCI_FEATURE_BYTES_PER_PAGE 8 1443 1444 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1445 1446 /* 1447 ** LMP features encoding - page 0 1448 */ 1449 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1450 #define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1451 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1452 1453 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1454 #define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1455 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1456 1457 #define HCI_FEATURE_ENCRYPTION_MASK 0x04 1458 #define HCI_FEATURE_ENCRYPTION_OFF 0 1459 #define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1460 1461 #define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1462 #define HCI_FEATURE_SLOT_OFFSET_OFF 0 1463 #define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1464 1465 #define HCI_FEATURE_TIMING_ACC_MASK 0x10 1466 #define HCI_FEATURE_TIMING_ACC_OFF 0 1467 #define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1468 1469 #define HCI_FEATURE_SWITCH_MASK 0x20 1470 #define HCI_FEATURE_SWITCH_OFF 0 1471 #define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1472 1473 #define HCI_FEATURE_HOLD_MODE_MASK 0x40 1474 #define HCI_FEATURE_HOLD_MODE_OFF 0 1475 #define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1476 1477 #define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1478 #define HCI_FEATURE_SNIFF_MODE_OFF 0 1479 #define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1480 1481 #define HCI_FEATURE_PARK_MODE_MASK 0x01 1482 #define HCI_FEATURE_PARK_MODE_OFF 1 1483 #define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1484 1485 #define HCI_FEATURE_RSSI_MASK 0x02 1486 #define HCI_FEATURE_RSSI_OFF 1 1487 #define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1488 1489 #define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1490 #define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1491 #define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1492 1493 #define HCI_FEATURE_SCO_LINK_MASK 0x08 1494 #define HCI_FEATURE_SCO_LINK_OFF 1 1495 #define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1496 1497 #define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1498 #define HCI_FEATURE_HV2_PACKETS_OFF 1 1499 #define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1500 1501 #define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1502 #define HCI_FEATURE_HV3_PACKETS_OFF 1 1503 #define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1504 1505 #define HCI_FEATURE_U_LAW_MASK 0x40 1506 #define HCI_FEATURE_U_LAW_OFF 1 1507 #define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1508 1509 #define HCI_FEATURE_A_LAW_MASK 0x80 1510 #define HCI_FEATURE_A_LAW_OFF 1 1511 #define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1512 1513 #define HCI_FEATURE_CVSD_MASK 0x01 1514 #define HCI_FEATURE_CVSD_OFF 2 1515 #define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1516 1517 #define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1518 #define HCI_FEATURE_PAGING_SCHEME_OFF 2 1519 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1520 1521 #define HCI_FEATURE_POWER_CTRL_MASK 0x04 1522 #define HCI_FEATURE_POWER_CTRL_OFF 2 1523 #define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1524 1525 #define HCI_FEATURE_TRANSPNT_MASK 0x08 1526 #define HCI_FEATURE_TRANSPNT_OFF 2 1527 #define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1528 1529 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1530 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1531 #define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1532 1533 #define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1534 #define HCI_FEATURE_BROADCAST_ENC_OFF 2 1535 #define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1536 1537 #define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1538 #define HCI_FEATURE_SCATTER_MODE_OFF 3 1539 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1540 1541 #define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1542 #define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1543 #define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1544 1545 #define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1546 #define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1547 #define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1548 1549 #define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1550 #define HCI_FEATURE_ENHANCED_INQ_OFF 3 1551 #define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1552 1553 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1554 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1555 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1556 1557 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1558 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1559 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1560 1561 #define HCI_FEATURE_INQ_RSSI_MASK 0x40 1562 #define HCI_FEATURE_INQ_RSSI_OFF 3 1563 #define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1564 1565 #define HCI_FEATURE_ESCO_EV3_MASK 0x80 1566 #define HCI_FEATURE_ESCO_EV3_OFF 3 1567 #define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1568 1569 #define HCI_FEATURE_ESCO_EV4_MASK 0x01 1570 #define HCI_FEATURE_ESCO_EV4_OFF 4 1571 #define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1572 1573 #define HCI_FEATURE_ESCO_EV5_MASK 0x02 1574 #define HCI_FEATURE_ESCO_EV5_OFF 4 1575 #define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1576 1577 #define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1578 #define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1579 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1580 1581 #define HCI_FEATURE_AFH_CAP_SLAVE_MASK 0x08 1582 #define HCI_FEATURE_AFH_CAP_SLAVE_OFF 4 1583 #define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK) 1584 1585 #define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10 1586 #define HCI_FEATURE_AFH_CLASS_SLAVE_OFF 4 1587 #define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK) 1588 1589 #if 1 1590 #define HCI_FEATURE_BREDR_NOT_SPT_MASK 0x20 1591 #define HCI_FEATURE_BREDR_NOT_SPT_OFF 4 1592 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK) 1593 1594 #define HCI_FEATURE_LE_SPT_MASK 0x40 1595 #define HCI_FEATURE_LE_SPT_OFF 4 1596 #define HCI_LE_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK) 1597 #else 1598 1599 #define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1600 #define HCI_FEATURE_ALIAS_AUTH_OFF 4 1601 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1602 1603 #define HCI_FEATURE_ANON_MODE_MASK 0x40 1604 #define HCI_FEATURE_ANON_MODE_OFF 4 1605 #define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1606 #endif 1607 1608 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1609 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1610 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1611 1612 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1613 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1614 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1615 1616 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1617 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1618 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1619 1620 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1621 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1622 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1623 1624 #define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1625 #define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1626 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1627 1628 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1629 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1630 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1631 1632 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1633 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1634 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1635 1636 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1637 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1638 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1639 1640 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1641 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1642 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1643 1644 #define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1645 #define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1646 #define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1647 1648 #if 1 /* TOKYO spec definition */ 1649 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02 1650 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF 6 1651 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK) 1652 1653 #else 1654 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1655 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1656 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1657 #endif 1658 1659 #define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1660 #define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1661 #define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1662 1663 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1664 #define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1665 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1666 1667 #define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1668 #define HCI_FEATURE_ENCAP_PDU_OFF 6 1669 #define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1670 1671 #define HCI_FEATURE_ERROR_DATA_MASK 0x20 1672 #define HCI_FEATURE_ERROR_DATA_OFF 6 1673 #define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1674 1675 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1676 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1677 1678 /* This feature is causing frequent link drops when doing call switch with certain av/hfp headsets */ 1679 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) (0) //((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1680 1681 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1682 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1683 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1684 1685 #define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1686 #define HCI_FEATURE_INQ_RESP_TX_OFF 7 1687 #define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 1688 1689 #define HCI_FEATURE_EXTENDED_MASK 0x80 1690 #define HCI_FEATURE_EXTENDED_OFF 7 1691 #define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 1692 1693 /* 1694 ** LMP features encoding - page 1 1695 */ 1696 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 1697 #define HCI_EXT_FEATURE_SSP_HOST_OFF 0 1698 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 1699 1700 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02 1701 #define HCI_EXT_FEATURE_LE_HOST_OFF 0 1702 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK) 1703 1704 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04 1705 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF 0 1706 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK) 1707 1708 #define HCI_EXT_FEATURE_SC_HOST_MASK 0x08 1709 #define HCI_EXT_FEATURE_SC_HOST_OFF 0 1710 #define HCI_SC_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_HOST_OFF] & HCI_EXT_FEATURE_SC_HOST_MASK) 1711 1712 /* 1713 ** LMP features encoding - page 2 1714 */ 1715 #define HCI_EXT_FEATURE_CSB_MASTER_MASK 0x01 1716 #define HCI_EXT_FEATURE_CSB_MASTER_OFF 0 1717 #define HCI_CSB_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_MASTER_OFF] & HCI_EXT_FEATURE_CSB_MASTER_MASK) 1718 1719 #define HCI_EXT_FEATURE_CSB_SLAVE_MASK 0x02 1720 #define HCI_EXT_FEATURE_CSB_SLAVE_OFF 0 1721 #define HCI_CSB_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_SLAVE_OFF] & HCI_EXT_FEATURE_CSB_SLAVE_MASK) 1722 1723 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK 0x04 1724 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF 0 1725 #define HCI_SYNC_TRAIN_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK) 1726 1727 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK 0x08 1728 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF 0 1729 #define HCI_SYNC_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK) 1730 1731 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK 0x10 1732 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF 0 1733 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK) 1734 1735 #define HCI_EXT_FEATURE_SC_CTRLR_MASK 0x01 1736 #define HCI_EXT_FEATURE_SC_CTRLR_OFF 1 1737 #define HCI_SC_CTRLR_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_CTRLR_OFF] & HCI_EXT_FEATURE_SC_CTRLR_MASK) 1738 1739 #define HCI_EXT_FEATURE_PING_MASK 0x02 1740 #define HCI_EXT_FEATURE_PING_OFF 1 1741 #define HCI_PING_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_PING_OFF] & HCI_EXT_FEATURE_PING_MASK) 1742 1743 /* 1744 ** LE features encoding - page 0 (the only page for now) 1745 */ 1746 /* LE Encryption */ 1747 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK 0x01 1748 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF 0 1749 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK) 1750 1751 /* Connection Parameters Request Procedure */ 1752 #define HCI_LE_FEATURE_CONN_PARAM_REQ_MASK 0x02 1753 #define HCI_LE_FEATURE_CONN_PARAM_REQ_OFF 0 1754 #define HCI_LE_CONN_PARAM_REQ_SUPPORTED(x) ((x)[HCI_LE_FEATURE_CONN_PARAM_REQ_OFF] & HCI_LE_FEATURE_CONN_PARAM_REQ_MASK) 1755 1756 /* Extended Reject Indication */ 1757 #define HCI_LE_FEATURE_EXT_REJ_IND_MASK 0x04 1758 #define HCI_LE_FEATURE_EXT_REJ_IND_OFF 0 1759 #define HCI_LE_EXT_REJ_IND_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_REJ_IND_OFF] & HCI_LE_FEATURE_EXT_REJ_IND_MASK) 1760 1761 /* Slave-initiated Features Exchange */ 1762 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK 0x08 1763 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF 0 1764 #define HCI_LE_SLAVE_INIT_FEAT_EXC_SUPPORTED(x) ((x)[HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF] & HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK) 1765 1766 /* Enhanced privacy Feature: bit 6 */ 1767 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK 0x40 1768 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF 0 1769 #define HCI_LE_ENHANCED_PRIVACY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF] & HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK) 1770 1771 /* Extended scanner filter policy : 7 */ 1772 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK 0x80 1773 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF 0 1774 #define HCI_LE_EXT_SCAN_FILTER_POLICY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF] & HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK) 1775 1776 /* Slave-initiated Features Exchange */ 1777 #define HCI_LE_FEATURE_DATA_LEN_EXT_MASK 0x20 1778 #define HCI_LE_FEATURE_DATA_LEN_EXT_OFF 0 1779 #define HCI_LE_DATA_LEN_EXT_SUPPORTED(x) ((x)[HCI_LE_FEATURE_DATA_LEN_EXT_OFF] & HCI_LE_FEATURE_DATA_LEN_EXT_MASK) 1780 1781 /* 1782 ** Local Supported Commands encoding 1783 */ 1784 #define HCI_NUM_SUPP_COMMANDS_BYTES 64 1785 1786 /* Supported Commands Byte 0 */ 1787 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 1788 #define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 1789 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 1790 1791 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 1792 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 1793 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 1794 1795 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 1796 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 1797 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 1798 1799 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 1800 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 1801 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 1802 1803 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 1804 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 1805 #define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 1806 1807 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 1808 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 1809 #define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 1810 1811 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 1812 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 1813 #define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 1814 1815 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 1816 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 1817 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 1818 1819 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 1820 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 1821 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 1822 1823 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 1824 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 1825 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 1826 1827 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 1828 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 1829 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 1830 1831 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 1832 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 1833 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 1834 1835 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 1836 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 1837 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 1838 1839 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 1840 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 1841 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 1842 1843 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 1844 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 1845 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 1846 1847 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 1848 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 1849 #define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 1850 1851 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 1852 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 1853 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 1854 1855 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 1856 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 1857 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 1858 1859 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK 0x04 1860 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF 2 1861 #define HCI_MASTER_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK) 1862 1863 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 1864 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 1865 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 1866 1867 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 1868 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 1869 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 1870 1871 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 1872 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 1873 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 1874 1875 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 1876 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 1877 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 1878 1879 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 1880 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 1881 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 1882 1883 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 1884 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 1885 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 1886 1887 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 1888 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 1889 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 1890 1891 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 1892 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 1893 #define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 1894 1895 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 1896 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 1897 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 1898 1899 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 1900 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 1901 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 1902 1903 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 1904 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 1905 #define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 1906 1907 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 1908 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 1909 #define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 1910 1911 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 1912 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 1913 #define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 1914 1915 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 1916 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 1917 #define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 1918 1919 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 1920 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 1921 #define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 1922 1923 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 1924 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 1925 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 1926 1927 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 1928 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 1929 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 1930 1931 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 1932 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 1933 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 1934 1935 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 1936 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 1937 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 1938 1939 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 1940 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 1941 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 1942 1943 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 1944 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 1945 #define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 1946 1947 #define HCI_SUPP_COMMANDS_RESET_MASK 0x80 1948 #define HCI_SUPP_COMMANDS_RESET_OFF 5 1949 #define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 1950 1951 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 1952 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 1953 #define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 1954 1955 #define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 1956 #define HCI_SUPP_COMMANDS_FLUSH_OFF 6 1957 #define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 1958 1959 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 1960 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 1961 #define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 1962 1963 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 1964 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 1965 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 1966 1967 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 1968 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 1969 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 1970 1971 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 1972 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 1973 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 1974 1975 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 1976 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 1977 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 1978 1979 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 1980 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 1981 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 1982 1983 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 1984 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 1985 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 1986 1987 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 1988 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 1989 #define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 1990 1991 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 1992 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 1993 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 1994 1995 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 1996 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 1997 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 1998 1999 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 2000 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 2001 #define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 2002 2003 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 2004 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 2005 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 2006 2007 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 2008 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 2009 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 2010 2011 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 2012 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 2013 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 2014 2015 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 2016 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 2017 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 2018 2019 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 2020 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 2021 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 2022 2023 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 2024 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 2025 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 2026 2027 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 2028 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 2029 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 2030 2031 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 2032 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 2033 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 2034 2035 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 2036 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 2037 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 2038 2039 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 2040 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 2041 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 2042 2043 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 2044 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 2045 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 2046 2047 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 2048 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 2049 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 2050 2051 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 2052 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 2053 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 2054 2055 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 2056 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 2057 #define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 2058 2059 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 2060 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 2061 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 2062 2063 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 2064 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 2065 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 2066 2067 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 2068 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 2069 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 2070 2071 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 2072 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 2073 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 2074 2075 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 2076 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 2077 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 2078 2079 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 2080 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 2081 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 2082 2083 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 2084 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 2085 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 2086 2087 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 2088 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 2089 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 2090 2091 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 2092 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2093 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 2094 2095 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 2096 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2097 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 2098 2099 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 2100 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 2101 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 2102 2103 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 2104 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 2105 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 2106 2107 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 2108 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 2109 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 2110 2111 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 2112 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 2113 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 2114 2115 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 2116 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 2117 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 2118 2119 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 2120 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 2121 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 2122 2123 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 2124 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 2125 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 2126 2127 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 2128 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 2129 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 2130 2131 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 2132 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 2133 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 2134 2135 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 2136 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 2137 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 2138 2139 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 2140 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 2141 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 2142 2143 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 2144 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 2145 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 2146 2147 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 2148 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 2149 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 2150 2151 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 2152 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 2153 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 2154 2155 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 2156 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 2157 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 2158 2159 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 2160 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 2161 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 2162 2163 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 2164 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 2165 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 2166 2167 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 2168 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 2169 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 2170 2171 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 2172 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 2173 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 2174 2175 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 2176 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 2177 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 2178 2179 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 2180 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 2181 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 2182 2183 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 2184 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 2185 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 2186 2187 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 2188 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 2189 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 2190 2191 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 2192 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 2193 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 2194 2195 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 2196 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 2197 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 2198 2199 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 2200 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 2201 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 2202 2203 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 2204 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 2205 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 2206 2207 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 2208 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 2209 #define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 2210 2211 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 2212 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 2213 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 2214 2215 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 2216 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 2217 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 2218 2219 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 2220 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 2221 #define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 2222 2223 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 2224 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 2225 #define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 2226 2227 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 2228 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 2229 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 2230 2231 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 2232 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 2233 #define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2234 2235 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2236 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2237 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2238 2239 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2240 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2241 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2242 2243 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2244 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2245 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2246 2247 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2248 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2249 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2250 2251 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2252 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2253 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2254 2255 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2256 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2257 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2258 2259 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2260 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2261 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2262 2263 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2264 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2265 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2266 2267 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2268 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2269 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2270 2271 /* Octet 17, bit 3 is reserved */ 2272 2273 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2274 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2275 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2276 2277 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2278 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2279 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2280 2281 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2282 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2283 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2284 2285 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2286 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2287 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2288 2289 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2290 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2291 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2292 2293 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2294 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2295 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2296 2297 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2298 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2299 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2300 2301 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2302 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2303 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2304 2305 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK 0x80 2306 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF 18 2307 #define HCI_IO_CAPABILITY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK) 2308 2309 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2310 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2311 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2312 2313 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2314 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2315 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2316 2317 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2318 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2319 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2320 2321 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2322 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2323 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2324 2325 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2326 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2327 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2328 2329 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2330 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2331 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2332 2333 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2334 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2335 #define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2336 2337 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2338 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2339 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2340 2341 /* Supported Commands (Byte 20) */ 2342 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2343 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2344 #define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2345 2346 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2347 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2348 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2349 2350 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2351 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2352 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2353 2354 /* Supported Commands (Byte 21) */ 2355 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2356 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2357 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2358 2359 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2360 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2361 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2362 2363 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2364 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2365 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2366 2367 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2368 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2369 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2370 2371 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2372 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2373 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2374 2375 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2376 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2377 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2378 2379 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2380 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2381 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2382 2383 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2384 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2385 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2386 2387 /* Supported Commands (Byte 22) */ 2388 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2389 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2390 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2391 2392 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2393 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2394 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2395 2396 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2397 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2398 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2399 2400 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2401 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2402 #define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2403 2404 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2405 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2406 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2407 2408 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2409 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2410 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2411 2412 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2413 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2414 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2415 2416 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2417 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2418 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2419 2420 /* Supported Commands (Byte 23) */ 2421 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2422 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2423 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2424 2425 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2426 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2427 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2428 2429 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2430 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2431 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2432 2433 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2434 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2435 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2436 2437 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2438 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2439 #define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2440 2441 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2442 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2443 #define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2444 2445 /* Supported Commands (Byte 24) */ 2446 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2447 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2448 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2449 2450 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2451 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2452 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2453 2454 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2455 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2456 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2457 2458 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2459 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2460 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2461 2462 /* LE commands TBD 2463 ** Supported Commands (Byte 24 continued) 2464 ** Supported Commands (Byte 25) 2465 ** Supported Commands (Byte 26) 2466 ** Supported Commands (Byte 27) 2467 ** Supported Commands (Byte 28) 2468 */ 2469 2470 /* Supported Commands (Byte 29) */ 2471 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK 0x08 2472 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF 29 2473 #define HCI_READ_ENH_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK) 2474 2475 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK 0x10 2476 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF 29 2477 #define HCI_READ_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK) 2478 2479 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK 0x20 2480 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF 29 2481 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK) 2482 2483 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK 0x40 2484 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF 29 2485 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK) 2486 2487 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK 0x80 2488 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF 29 2489 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK) 2490 2491 /* Supported Commands (Byte 30) */ 2492 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK 0x01 2493 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF 30 2494 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK) 2495 2496 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK 0x02 2497 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF 30 2498 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK) 2499 2500 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK 0x04 2501 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF 30 2502 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK) 2503 2504 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK 0x08 2505 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF 30 2506 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK) 2507 2508 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK 0x10 2509 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF 30 2510 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK) 2511 2512 /* Supported Commands (Byte 30 bit 5) */ 2513 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK 0x20 2514 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF 30 2515 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK) 2516 2517 /* Supported Commands (Byte 30 bit 6-7) */ 2518 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE 0x06 2519 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF 30 2520 #define HCI_TRUNCATED_PAGE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE) 2521 2522 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL 0x07 2523 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF 30 2524 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL) 2525 2526 /* Supported Commands (Byte 31 bit 6-7) */ 2527 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST 0x00 2528 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF 31 2529 #define HCI_SET_CONLESS_SLAVE_BRCST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST) 2530 2531 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE 0x01 2532 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF 31 2533 #define HCI_SET_CONLESS_SLAVE_BRCST_RECEIVE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE) 2534 2535 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN 0x02 2536 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF 31 2537 #define HCI_START_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN) 2538 2539 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN 0x03 2540 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF 31 2541 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN) 2542 2543 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR 0x04 2544 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF 31 2545 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR) 2546 2547 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR 0x05 2548 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF 31 2549 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR) 2550 2551 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA 0x06 2552 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF 31 2553 #define HCI_SET_CONLESS_SLAVE_BRCST_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA) 2554 2555 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM 0x07 2556 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF 31 2557 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM) 2558 2559 /* Supported Commands (Byte 32 bit 0) */ 2560 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM 0x00 2561 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF 32 2562 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM) 2563 2564 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK 0x02 2565 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF 32 2566 #define HCI_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK) 2567 2568 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK 0x04 2569 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF 32 2570 #define HCI_READ_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK) 2571 2572 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK 0x08 2573 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF 32 2574 #define HCI_WRITE_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK) 2575 2576 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK 0x10 2577 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF 32 2578 #define HCI_READ_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK) 2579 2580 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK 0x20 2581 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF 32 2582 #define HCI_WRITE_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK) 2583 2584 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK 0x40 2585 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF 32 2586 #define HCI_READ_LOCAL_OOB_EXTENDED_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK) 2587 2588 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK 0x80 2589 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF 32 2590 #define HCI_WRITE_SECURE_CONNECTIONS_TEST_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK) 2591 2592 /* supported LE remote control connection parameter request reply */ 2593 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK 0x10 2594 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF 33 2595 #define HCI_LE_RC_CONN_PARAM_UPD_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF] & HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK) 2596 2597 #define HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK 0x20 2598 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF 33 2599 #define HCI_LE_RC_CONN_PARAM_UPD_NEG_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF] & HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK) 2600 2601 #define HCI_DATA_EVENT_MASK 3 2602 #define HCI_DATA_EVENT_OFFSET 12 2603 2604 #define RTK_HANDLE_MASK 0x0FFF 2605 #define RTK_NONF_START_PACKET_BOUNDARY 0 2606 #define RTK_START_PACKET_BOUNDARY 2 2607 #define RTK_CONTINUATION_PACKET_BOUNDARY 1 2608 #define RTK_L2CAP_HEADER_PDU_LEN_SIZE 2 2609 #define RTK_L2CAP_HEADER_CID_SIZE 2 2610 #define RTK_L2CAP_HEADER_SIZE (RTK_L2CAP_HEADER_PDU_LEN_SIZE + RTK_L2CAP_HEADER_CID_SIZE) 2611 2612 #define RTK_GET_BOUNDARY_FLAG(handle) (((handle) >> 12) & 0x0003) 2613 2614 // 2 bytes for opcode, 1 byte for parameter length (Volume 2, Part E, 5.4.1) 2615 #define COMMAND_PREAMBLE_SIZE 3 2616 // 2 bytes for handle, 2 bytes for data length (Volume 2, Part E, 5.4.2) 2617 #define ACL_PREAMBLE_SIZE 4 2618 // 2 bytes for handle, 1 byte for data length (Volume 2, Part E, 5.4.3) 2619 #define SCO_PREAMBLE_SIZE 3 2620 // 1 byte for event code, 1 byte for parameter length (Volume 2, Part E, 5.4.4) 2621 #define EVENT_PREAMBLE_SIZE 2 2622 2623 #define HCI_PACKET_TYPE_TO_INDEX(type) ((type)-1) 2624 2625 #define COMMON_DATA_LENGTH_INDEX 3 2626 2627 #define EVENT_DATA_LENGTH_INDEX 2 2628 2629 typedef struct 2630 { 2631 uint8_t hci_version; 2632 uint16_t hci_revision; 2633 uint8_t lmp_version; 2634 uint16_t manufacturer; 2635 uint16_t lmp_subversion; 2636 } rtkbt_version_t; 2637 2638 typedef struct 2639 { 2640 uint8_t adverting_type; 2641 bool adverting_enable; 2642 bool adverting_start; 2643 bool connetion_enable; 2644 } rtkbt_lescn_t; 2645 2646 #endif 2647