1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's S5PV210 SoC device tree source 4 * 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 6 * 7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 8 * Tomasz Figa <t.figa@samsung.com> 9 * 10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 11 * based board files can include this file and provide values for board specfic 12 * bindings. 13 * 14 * Note: This file does not include device nodes for all the controllers in 15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 16 * nodes can be added to this file. 17 */ 18 19#include <dt-bindings/clock/s5pv210.h> 20#include <dt-bindings/clock/s5pv210-audss.h> 21 22/ { 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 aliases { 27 csis0 = &csis0; 28 dmc0 = &dmc0; 29 dmc1 = &dmc1; 30 fimc0 = &fimc0; 31 fimc1 = &fimc1; 32 fimc2 = &fimc2; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 i2c2 = &i2c2; 36 i2s0 = &i2s0; 37 i2s1 = &i2s1; 38 i2s2 = &i2s2; 39 pinctrl0 = &pinctrl0; 40 spi0 = &spi0; 41 spi1 = &spi1; 42 }; 43 44 cpus { 45 #address-cells = <1>; 46 #size-cells = <0>; 47 48 cpu@0 { 49 device_type = "cpu"; 50 compatible = "arm,cortex-a8"; 51 reg = <0>; 52 }; 53 }; 54 55 xxti: oscillator-0 { 56 compatible = "fixed-clock"; 57 clock-frequency = <0>; 58 clock-output-names = "xxti"; 59 #clock-cells = <0>; 60 }; 61 62 xusbxti: oscillator-1 { 63 compatible = "fixed-clock"; 64 clock-frequency = <0>; 65 clock-output-names = "xusbxti"; 66 #clock-cells = <0>; 67 }; 68 69 soc { 70 compatible = "simple-bus"; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 75 onenand: onenand@b0600000 { 76 compatible = "samsung,s5pv210-onenand"; 77 reg = <0xb0600000 0x2000>, 78 <0xb0000000 0x20000>, 79 <0xb0040000 0x20000>; 80 interrupt-parent = <&vic1>; 81 interrupts = <31>; 82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 83 clock-names = "bus", "onenand"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 status = "disabled"; 87 }; 88 89 chipid@e0000000 { 90 compatible = "samsung,s5pv210-chipid"; 91 reg = <0xe0000000 0x1000>; 92 }; 93 94 clocks: clock-controller@e0100000 { 95 compatible = "samsung,s5pv210-clock"; 96 reg = <0xe0100000 0x10000>; 97 clock-names = "xxti", "xusbxti"; 98 clocks = <&xxti>, <&xusbxti>; 99 #clock-cells = <1>; 100 }; 101 102 pmu_syscon: syscon@e0108000 { 103 compatible = "samsung-s5pv210-pmu", "syscon"; 104 reg = <0xe0108000 0x8000>; 105 }; 106 107 pinctrl0: pinctrl@e0200000 { 108 compatible = "samsung,s5pv210-pinctrl"; 109 reg = <0xe0200000 0x1000>; 110 interrupt-parent = <&vic0>; 111 interrupts = <30>; 112 113 wakeup-interrupt-controller { 114 compatible = "samsung,s5pv210-wakeup-eint"; 115 interrupts = <16>; 116 interrupt-parent = <&vic0>; 117 }; 118 }; 119 120 pdma0: dma@e0900000 { 121 compatible = "arm,pl330", "arm,primecell"; 122 reg = <0xe0900000 0x1000>; 123 interrupt-parent = <&vic0>; 124 interrupts = <19>; 125 clocks = <&clocks CLK_PDMA0>; 126 clock-names = "apb_pclk"; 127 #dma-cells = <1>; 128 #dma-channels = <8>; 129 #dma-requests = <32>; 130 }; 131 132 pdma1: dma@e0a00000 { 133 compatible = "arm,pl330", "arm,primecell"; 134 reg = <0xe0a00000 0x1000>; 135 interrupt-parent = <&vic0>; 136 interrupts = <20>; 137 clocks = <&clocks CLK_PDMA1>; 138 clock-names = "apb_pclk"; 139 #dma-cells = <1>; 140 #dma-channels = <8>; 141 #dma-requests = <32>; 142 }; 143 144 adc: adc@e1700000 { 145 compatible = "samsung,s5pv210-adc"; 146 reg = <0xe1700000 0x1000>; 147 interrupt-parent = <&vic2>; 148 interrupts = <23>, <24>; 149 clocks = <&clocks CLK_TSADC>; 150 clock-names = "adc"; 151 #io-channel-cells = <1>; 152 io-channel-ranges; 153 status = "disabled"; 154 }; 155 156 spi0: spi@e1300000 { 157 compatible = "samsung,s5pv210-spi"; 158 reg = <0xe1300000 0x1000>; 159 interrupt-parent = <&vic1>; 160 interrupts = <15>; 161 dmas = <&pdma0 7>, <&pdma0 6>; 162 dma-names = "tx", "rx"; 163 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 164 clock-names = "spi", "spi_busclk0"; 165 pinctrl-names = "default"; 166 pinctrl-0 = <&spi0_bus>; 167 #address-cells = <1>; 168 #size-cells = <0>; 169 status = "disabled"; 170 }; 171 172 spi1: spi@e1400000 { 173 compatible = "samsung,s5pv210-spi"; 174 reg = <0xe1400000 0x1000>; 175 interrupt-parent = <&vic1>; 176 interrupts = <16>; 177 dmas = <&pdma1 7>, <&pdma1 6>; 178 dma-names = "tx", "rx"; 179 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 180 clock-names = "spi", "spi_busclk0"; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&spi1_bus>; 183 #address-cells = <1>; 184 #size-cells = <0>; 185 status = "disabled"; 186 }; 187 188 keypad: keypad@e1600000 { 189 compatible = "samsung,s5pv210-keypad"; 190 reg = <0xe1600000 0x1000>; 191 interrupt-parent = <&vic2>; 192 interrupts = <25>; 193 clocks = <&clocks CLK_KEYIF>; 194 clock-names = "keypad"; 195 status = "disabled"; 196 }; 197 198 i2c0: i2c@e1800000 { 199 compatible = "samsung,s3c2440-i2c"; 200 reg = <0xe1800000 0x1000>; 201 interrupt-parent = <&vic1>; 202 interrupts = <14>; 203 clocks = <&clocks CLK_I2C0>; 204 clock-names = "i2c"; 205 pinctrl-names = "default"; 206 pinctrl-0 = <&i2c0_bus>; 207 #address-cells = <1>; 208 #size-cells = <0>; 209 status = "disabled"; 210 }; 211 212 i2c2: i2c@e1a00000 { 213 compatible = "samsung,s3c2440-i2c"; 214 reg = <0xe1a00000 0x1000>; 215 interrupt-parent = <&vic1>; 216 interrupts = <19>; 217 clocks = <&clocks CLK_I2C2>; 218 clock-names = "i2c"; 219 pinctrl-0 = <&i2c2_bus>; 220 pinctrl-names = "default"; 221 #address-cells = <1>; 222 #size-cells = <0>; 223 status = "disabled"; 224 }; 225 226 clk_audss: clock-controller@eee10000 { 227 compatible = "samsung,s5pv210-audss-clock"; 228 reg = <0xeee10000 0x1000>; 229 clock-names = "hclk", "xxti", 230 "fout_epll", 231 "sclk_audio0"; 232 clocks = <&clocks DOUT_HCLKP>, <&xxti>, 233 <&clocks FOUT_EPLL>, 234 <&clocks SCLK_AUDIO0>; 235 #clock-cells = <1>; 236 }; 237 238 i2s0: i2s@eee30000 { 239 compatible = "samsung,s5pv210-i2s"; 240 reg = <0xeee30000 0x1000>; 241 interrupt-parent = <&vic2>; 242 interrupts = <16>; 243 dma-names = "rx", "tx", "tx-sec"; 244 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; 245 clock-names = "iis", 246 "i2s_opclk0", 247 "i2s_opclk1"; 248 clocks = <&clk_audss CLK_I2S>, 249 <&clk_audss CLK_I2S>, 250 <&clk_audss CLK_DOUT_AUD_BUS>; 251 samsung,idma-addr = <0xc0010000>; 252 pinctrl-names = "default"; 253 pinctrl-0 = <&i2s0_bus>; 254 #sound-dai-cells = <0>; 255 status = "disabled"; 256 }; 257 258 i2s1: i2s@e2100000 { 259 compatible = "samsung,s3c6410-i2s"; 260 reg = <0xe2100000 0x1000>; 261 interrupt-parent = <&vic2>; 262 interrupts = <17>; 263 dma-names = "rx", "tx"; 264 dmas = <&pdma1 12>, <&pdma1 13>; 265 clock-names = "iis", "i2s_opclk0"; 266 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 267 pinctrl-names = "default"; 268 pinctrl-0 = <&i2s1_bus>; 269 #sound-dai-cells = <0>; 270 status = "disabled"; 271 }; 272 273 i2s2: i2s@e2a00000 { 274 compatible = "samsung,s3c6410-i2s"; 275 reg = <0xe2a00000 0x1000>; 276 interrupt-parent = <&vic2>; 277 interrupts = <18>; 278 dma-names = "rx", "tx"; 279 dmas = <&pdma1 14>, <&pdma1 15>; 280 clock-names = "iis", "i2s_opclk0"; 281 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 282 pinctrl-names = "default"; 283 pinctrl-0 = <&i2s2_bus>; 284 #sound-dai-cells = <0>; 285 status = "disabled"; 286 }; 287 288 pwm: pwm@e2500000 { 289 compatible = "samsung,s5pc100-pwm"; 290 reg = <0xe2500000 0x1000>; 291 interrupt-parent = <&vic0>; 292 interrupts = <21>, <22>, <23>, <24>, <25>; 293 clock-names = "timers"; 294 clocks = <&clocks CLK_PWM>; 295 #pwm-cells = <3>; 296 }; 297 298 watchdog: watchdog@e2700000 { 299 compatible = "samsung,s3c6410-wdt"; 300 reg = <0xe2700000 0x1000>; 301 interrupt-parent = <&vic0>; 302 interrupts = <26>; 303 clock-names = "watchdog"; 304 clocks = <&clocks CLK_WDT>; 305 }; 306 307 rtc: rtc@e2800000 { 308 compatible = "samsung,s3c6410-rtc"; 309 reg = <0xe2800000 0x100>; 310 interrupt-parent = <&vic0>; 311 interrupts = <28>, <29>; 312 clocks = <&clocks CLK_RTC>; 313 clock-names = "rtc"; 314 status = "disabled"; 315 }; 316 317 uart0: serial@e2900000 { 318 compatible = "samsung,s5pv210-uart"; 319 reg = <0xe2900000 0x400>; 320 interrupt-parent = <&vic1>; 321 interrupts = <10>; 322 clock-names = "uart", "clk_uart_baud0", 323 "clk_uart_baud1"; 324 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 325 <&clocks SCLK_UART0>; 326 status = "disabled"; 327 }; 328 329 uart1: serial@e2900400 { 330 compatible = "samsung,s5pv210-uart"; 331 reg = <0xe2900400 0x400>; 332 interrupt-parent = <&vic1>; 333 interrupts = <11>; 334 clock-names = "uart", "clk_uart_baud0", 335 "clk_uart_baud1"; 336 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 337 <&clocks SCLK_UART1>; 338 status = "disabled"; 339 }; 340 341 uart2: serial@e2900800 { 342 compatible = "samsung,s5pv210-uart"; 343 reg = <0xe2900800 0x400>; 344 interrupt-parent = <&vic1>; 345 interrupts = <12>; 346 clock-names = "uart", "clk_uart_baud0", 347 "clk_uart_baud1"; 348 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 349 <&clocks SCLK_UART2>; 350 status = "disabled"; 351 }; 352 353 uart3: serial@e2900c00 { 354 compatible = "samsung,s5pv210-uart"; 355 reg = <0xe2900c00 0x400>; 356 interrupt-parent = <&vic1>; 357 interrupts = <13>; 358 clock-names = "uart", "clk_uart_baud0", 359 "clk_uart_baud1"; 360 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 361 <&clocks SCLK_UART3>; 362 status = "disabled"; 363 }; 364 365 sdhci0: sdhci@eb000000 { 366 compatible = "samsung,s3c6410-sdhci"; 367 reg = <0xeb000000 0x100000>; 368 interrupt-parent = <&vic1>; 369 interrupts = <26>; 370 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 371 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 372 <&clocks SCLK_MMC0>; 373 status = "disabled"; 374 }; 375 376 sdhci1: sdhci@eb100000 { 377 compatible = "samsung,s3c6410-sdhci"; 378 reg = <0xeb100000 0x100000>; 379 interrupt-parent = <&vic1>; 380 interrupts = <27>; 381 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 382 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 383 <&clocks SCLK_MMC1>; 384 status = "disabled"; 385 }; 386 387 sdhci2: sdhci@eb200000 { 388 compatible = "samsung,s3c6410-sdhci"; 389 reg = <0xeb200000 0x100000>; 390 interrupt-parent = <&vic1>; 391 interrupts = <28>; 392 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 393 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 394 <&clocks SCLK_MMC2>; 395 status = "disabled"; 396 }; 397 398 sdhci3: sdhci@eb300000 { 399 compatible = "samsung,s3c6410-sdhci"; 400 reg = <0xeb300000 0x100000>; 401 interrupt-parent = <&vic3>; 402 interrupts = <2>; 403 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 404 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 405 <&clocks SCLK_MMC3>; 406 status = "disabled"; 407 }; 408 409 hsotg: hsotg@ec000000 { 410 compatible = "samsung,s3c6400-hsotg"; 411 reg = <0xec000000 0x20000>; 412 interrupt-parent = <&vic1>; 413 interrupts = <24>; 414 clocks = <&clocks CLK_USB_OTG>; 415 clock-names = "otg"; 416 phy-names = "usb2-phy"; 417 phys = <&usbphy 0>; 418 status = "disabled"; 419 }; 420 421 usbphy: usbphy@ec100000 { 422 compatible = "samsung,s5pv210-usb2-phy"; 423 reg = <0xec100000 0x100>; 424 samsung,pmureg-phandle = <&pmu_syscon>; 425 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 426 clock-names = "phy", "ref"; 427 #phy-cells = <1>; 428 status = "disabled"; 429 }; 430 431 ehci: ehci@ec200000 { 432 compatible = "samsung,exynos4210-ehci"; 433 reg = <0xec200000 0x100>; 434 interrupts = <23>; 435 interrupt-parent = <&vic1>; 436 clocks = <&clocks CLK_USB_HOST>; 437 clock-names = "usbhost"; 438 #address-cells = <1>; 439 #size-cells = <0>; 440 status = "disabled"; 441 442 port@0 { 443 reg = <0>; 444 phys = <&usbphy 1>; 445 }; 446 }; 447 448 ohci: ohci@ec300000 { 449 compatible = "samsung,exynos4210-ohci"; 450 reg = <0xec300000 0x100>; 451 interrupts = <23>; 452 interrupt-parent = <&vic1>; 453 clocks = <&clocks CLK_USB_HOST>; 454 clock-names = "usbhost"; 455 #address-cells = <1>; 456 #size-cells = <0>; 457 status = "disabled"; 458 459 port@0 { 460 reg = <0>; 461 phys = <&usbphy 1>; 462 }; 463 }; 464 465 mfc: codec@f1700000 { 466 compatible = "samsung,mfc-v5"; 467 reg = <0xf1700000 0x10000>; 468 interrupt-parent = <&vic2>; 469 interrupts = <14>; 470 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; 471 clock-names = "sclk_mfc", "mfc"; 472 }; 473 474 vic0: interrupt-controller@f2000000 { 475 compatible = "arm,pl192-vic"; 476 interrupt-controller; 477 reg = <0xf2000000 0x1000>; 478 #interrupt-cells = <1>; 479 }; 480 481 vic1: interrupt-controller@f2100000 { 482 compatible = "arm,pl192-vic"; 483 interrupt-controller; 484 reg = <0xf2100000 0x1000>; 485 #interrupt-cells = <1>; 486 }; 487 488 vic2: interrupt-controller@f2200000 { 489 compatible = "arm,pl192-vic"; 490 interrupt-controller; 491 reg = <0xf2200000 0x1000>; 492 #interrupt-cells = <1>; 493 }; 494 495 vic3: interrupt-controller@f2300000 { 496 compatible = "arm,pl192-vic"; 497 interrupt-controller; 498 reg = <0xf2300000 0x1000>; 499 #interrupt-cells = <1>; 500 }; 501 502 fimd: fimd@f8000000 { 503 compatible = "samsung,s5pv210-fimd"; 504 interrupt-parent = <&vic2>; 505 reg = <0xf8000000 0x20000>; 506 interrupt-names = "fifo", "vsync", "lcd_sys"; 507 interrupts = <0>, <1>, <2>; 508 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 509 clock-names = "sclk_fimd", "fimd"; 510 status = "disabled"; 511 }; 512 513 dmc0: dmc@f0000000 { 514 compatible = "samsung,s5pv210-dmc"; 515 reg = <0xf0000000 0x1000>; 516 }; 517 518 dmc1: dmc@f1400000 { 519 compatible = "samsung,s5pv210-dmc"; 520 reg = <0xf1400000 0x1000>; 521 }; 522 523 g2d: g2d@fa000000 { 524 compatible = "samsung,s5pv210-g2d"; 525 reg = <0xfa000000 0x1000>; 526 interrupt-parent = <&vic2>; 527 interrupts = <9>; 528 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 529 clock-names = "sclk_fimg2d", "fimg2d"; 530 }; 531 532 mdma1: mdma@fa200000 { 533 compatible = "arm,pl330", "arm,primecell"; 534 reg = <0xfa200000 0x1000>; 535 interrupt-parent = <&vic0>; 536 interrupts = <18>; 537 clocks = <&clocks CLK_MDMA>; 538 clock-names = "apb_pclk"; 539 #dma-cells = <1>; 540 #dma-channels = <8>; 541 #dma-requests = <1>; 542 }; 543 544 rotator: rotator@fa300000 { 545 compatible = "samsung,s5pv210-rotator"; 546 reg = <0xfa300000 0x1000>; 547 interrupt-parent = <&vic2>; 548 interrupts = <4>; 549 clocks = <&clocks CLK_ROTATOR>; 550 clock-names = "rotator"; 551 }; 552 553 i2c1: i2c@fab00000 { 554 compatible = "samsung,s3c2440-i2c"; 555 reg = <0xfab00000 0x1000>; 556 interrupt-parent = <&vic2>; 557 interrupts = <13>; 558 clocks = <&clocks CLK_I2C1>; 559 clock-names = "i2c"; 560 pinctrl-names = "default"; 561 pinctrl-0 = <&i2c1_bus>; 562 #address-cells = <1>; 563 #size-cells = <0>; 564 status = "disabled"; 565 }; 566 567 camera: camera { 568 compatible = "samsung,fimc", "simple-bus"; 569 pinctrl-names = "default"; 570 pinctrl-0 = <>; 571 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 572 clock-names = "sclk_cam0", "sclk_cam1"; 573 #address-cells = <1>; 574 #size-cells = <1>; 575 #clock-cells = <1>; 576 clock-output-names = "cam_a_clkout", "cam_b_clkout"; 577 ranges; 578 579 csis0: csis@fa600000 { 580 compatible = "samsung,s5pv210-csis"; 581 reg = <0xfa600000 0x4000>; 582 interrupt-parent = <&vic2>; 583 interrupts = <29>; 584 clocks = <&clocks CLK_CSIS>, 585 <&clocks SCLK_CSIS>; 586 clock-names = "clk_csis", 587 "sclk_csis"; 588 bus-width = <4>; 589 status = "disabled"; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 }; 593 594 fimc0: fimc@fb200000 { 595 compatible = "samsung,s5pv210-fimc"; 596 reg = <0xfb200000 0x1000>; 597 interrupts = <5>; 598 interrupt-parent = <&vic2>; 599 clocks = <&clocks CLK_FIMC0>, 600 <&clocks SCLK_FIMC0>; 601 clock-names = "fimc", 602 "sclk_fimc"; 603 samsung,pix-limits = <4224 8192 1920 4224>; 604 samsung,min-pix-alignment = <16 8>; 605 samsung,cam-if; 606 }; 607 608 fimc1: fimc@fb300000 { 609 compatible = "samsung,s5pv210-fimc"; 610 reg = <0xfb300000 0x1000>; 611 interrupt-parent = <&vic2>; 612 interrupts = <6>; 613 clocks = <&clocks CLK_FIMC1>, 614 <&clocks SCLK_FIMC1>; 615 clock-names = "fimc", 616 "sclk_fimc"; 617 samsung,pix-limits = <4224 8192 1920 4224>; 618 samsung,min-pix-alignment = <1 1>; 619 samsung,mainscaler-ext; 620 samsung,cam-if; 621 samsung,lcd-wb; 622 }; 623 624 fimc2: fimc@fb400000 { 625 compatible = "samsung,s5pv210-fimc"; 626 reg = <0xfb400000 0x1000>; 627 interrupt-parent = <&vic2>; 628 interrupts = <7>; 629 clocks = <&clocks CLK_FIMC2>, 630 <&clocks SCLK_FIMC2>; 631 clock-names = "fimc", 632 "sclk_fimc"; 633 samsung,pix-limits = <1920 8192 1280 1920>; 634 samsung,min-pix-alignment = <16 8>; 635 samsung,rotators = <0>; 636 samsung,cam-if; 637 }; 638 }; 639 640 jpeg_codec: jpeg-codec@fb600000 { 641 compatible = "samsung,s5pv210-jpeg"; 642 reg = <0xfb600000 0x1000>; 643 interrupt-parent = <&vic2>; 644 interrupts = <8>; 645 clocks = <&clocks CLK_JPEG>; 646 clock-names = "jpeg"; 647 }; 648 }; 649}; 650 651#include "s5pv210-pinctrl.dtsi" 652