1 /* 2 * Copyright 2018 Collabora Ltd. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef ZINK_STATE_H 25 #define ZINK_STATE_H 26 27 #include <vulkan/vulkan.h> 28 29 #include "pipe/p_state.h" 30 31 struct zink_vertex_elements_hw_state { 32 uint32_t hash; 33 union { 34 VkVertexInputAttributeDescription attribs[PIPE_MAX_ATTRIBS]; 35 VkVertexInputAttributeDescription2EXT dynattribs[PIPE_MAX_ATTRIBS]; 36 }; 37 union { 38 struct { 39 VkVertexInputBindingDivisorDescriptionEXT divisors[PIPE_MAX_ATTRIBS]; 40 VkVertexInputBindingDescription bindings[PIPE_MAX_ATTRIBS]; // combination of element_state and stride 41 uint8_t divisors_present; 42 } b; 43 VkVertexInputBindingDescription2EXT dynbindings[PIPE_MAX_ATTRIBS]; 44 }; 45 uint32_t num_bindings, num_attribs; 46 }; 47 48 struct zink_vertex_elements_state { 49 struct { 50 uint32_t binding; 51 VkVertexInputRate inputRate; 52 } bindings[PIPE_MAX_ATTRIBS]; 53 uint32_t divisor[PIPE_MAX_ATTRIBS]; 54 uint8_t binding_map[PIPE_MAX_ATTRIBS]; 55 uint32_t decomposed_attrs; 56 unsigned decomposed_attrs_size; 57 uint32_t decomposed_attrs_without_w; 58 unsigned decomposed_attrs_without_w_size; 59 struct zink_vertex_elements_hw_state hw_state; 60 }; 61 62 struct zink_rasterizer_hw_state { 63 unsigned polygon_mode : 2; //VkPolygonMode 64 unsigned cull_mode : 2; //VkCullModeFlags 65 unsigned line_mode : 2; //VkLineRasterizationModeEXT 66 bool depth_clamp:1; 67 bool rasterizer_discard:1; 68 bool pv_last:1; 69 bool line_stipple_enable:1; 70 bool force_persample_interp:1; 71 bool clip_halfz:1; 72 }; 73 #define ZINK_RAST_HW_STATE_SIZE 12 74 75 76 struct zink_rasterizer_state { 77 struct pipe_rasterizer_state base; 78 bool offset_point, offset_line, offset_tri; 79 float offset_units, offset_clamp, offset_scale; 80 float line_width; 81 VkFrontFace front_face; 82 struct zink_rasterizer_hw_state hw_state; 83 }; 84 85 struct zink_blend_state { 86 uint32_t hash; 87 VkPipelineColorBlendAttachmentState attachments[PIPE_MAX_COLOR_BUFS]; 88 89 VkBool32 logicop_enable; 90 VkLogicOp logicop_func; 91 92 VkBool32 alpha_to_coverage; 93 VkBool32 alpha_to_one; 94 95 bool need_blend_constants; 96 bool dual_src_blend; 97 }; 98 99 struct zink_depth_stencil_alpha_hw_state { 100 VkBool32 depth_test; 101 VkCompareOp depth_compare_op; 102 103 VkBool32 depth_bounds_test; 104 float min_depth_bounds, max_depth_bounds; 105 106 VkBool32 stencil_test; 107 VkStencilOpState stencil_front; 108 VkStencilOpState stencil_back; 109 110 VkBool32 depth_write; 111 }; 112 113 struct zink_depth_stencil_alpha_state { 114 struct pipe_depth_stencil_alpha_state base; 115 struct zink_depth_stencil_alpha_hw_state hw_state; 116 }; 117 118 void 119 zink_context_state_init(struct pipe_context *pctx); 120 121 #endif 122