Searched refs:regs (Results 1 – 12 of 12) sorted by relevance
63 std::vector<uintptr_t> regs {}; in DfxRegsArm64() local64 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X0])); // 0:x0 in DfxRegsArm64()65 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X1])); // 1:x1 in DfxRegsArm64()66 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X2])); // 2:x2 in DfxRegsArm64()67 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X3])); // 3:x3 in DfxRegsArm64()68 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X4])); // 4:x4 in DfxRegsArm64()69 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X5])); // 5:x5 in DfxRegsArm64()70 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X6])); // 6:x6 in DfxRegsArm64()71 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X7])); // 7:x7 in DfxRegsArm64()72 regs.push_back(uintptr_t(context.uc_mcontext.regs[REG_AARCH64_X8])); // 8:x8 in DfxRegsArm64()[all …]
49 std::vector<uintptr_t> regs {}; in DfxRegsArm() local51 regs.push_back(uintptr_t(context.uc_mcontext.arm_r0)); // 0:r0 in DfxRegsArm()52 regs.push_back(uintptr_t(context.uc_mcontext.arm_r1)); // 1:r1 in DfxRegsArm()53 regs.push_back(uintptr_t(context.uc_mcontext.arm_r2)); // 2:r2 in DfxRegsArm()54 regs.push_back(uintptr_t(context.uc_mcontext.arm_r3)); // 3:r3 in DfxRegsArm()55 regs.push_back(uintptr_t(context.uc_mcontext.arm_r4)); // 4:r4 in DfxRegsArm()56 regs.push_back(uintptr_t(context.uc_mcontext.arm_r5)); // 5:r5 in DfxRegsArm()57 regs.push_back(uintptr_t(context.uc_mcontext.arm_r6)); // 6:r6 in DfxRegsArm()58 regs.push_back(uintptr_t(context.uc_mcontext.arm_r7)); // 7:r7 in DfxRegsArm()59 regs.push_back(uintptr_t(context.uc_mcontext.arm_r8)); // 8:r8 in DfxRegsArm()[all …]
54 std::vector<uintptr_t> regs {}; in DfxRegsX86_64() local56 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RAX])); in DfxRegsX86_64()57 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RDX])); in DfxRegsX86_64()58 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RCX])); in DfxRegsX86_64()59 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RBX])); in DfxRegsX86_64()60 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RSI])); in DfxRegsX86_64()61 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RDI])); in DfxRegsX86_64()62 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RBP])); in DfxRegsX86_64()63 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_RSP])); in DfxRegsX86_64()64 regs.push_back((uintptr_t)(context.uc_mcontext.gregs[REG_R8])); in DfxRegsX86_64()[all …]
334 context_.regs[UNW_ARM_R0] = uc->uc_mcontext.arm_r0; in LocalDumper()335 context_.regs[UNW_ARM_R1] = uc->uc_mcontext.arm_r1; in LocalDumper()336 context_.regs[UNW_ARM_R2] = uc->uc_mcontext.arm_r2; in LocalDumper()337 context_.regs[UNW_ARM_R3] = uc->uc_mcontext.arm_r3; in LocalDumper()338 context_.regs[UNW_ARM_R4] = uc->uc_mcontext.arm_r4; in LocalDumper()339 context_.regs[UNW_ARM_R5] = uc->uc_mcontext.arm_r5; in LocalDumper()340 context_.regs[UNW_ARM_R6] = uc->uc_mcontext.arm_r6; in LocalDumper()341 context_.regs[UNW_ARM_R7] = uc->uc_mcontext.arm_r7; in LocalDumper()342 context_.regs[UNW_ARM_R8] = uc->uc_mcontext.arm_r8; in LocalDumper()343 context_.regs[UNW_ARM_R9] = uc->uc_mcontext.arm_r9; in LocalDumper()[all …]
248 std::shared_ptr<DfxRegs> regs = thread->GetThreadRegs(); in UpdateAndPrintFrameInfo() local249 if (regs != nullptr) { in UpdateAndPrintFrameInfo()250 tips.append(regs->GetSpecialRegisterName(frame->GetFramePc())); in UpdateAndPrintFrameInfo()303 std::shared_ptr<DfxRegs> regs = thread->GetThreadRegs(); in UnwindThread() local304 if (regs != nullptr) { in UnwindThread()305 std::vector<uintptr_t> regsVector = regs->GetRegsData(); in UnwindThread()322 if (regs != nullptr) { in UnwindThread()323 DfxRingBufferWrapper::GetInstance().AppendMsg(regs->PrintRegs()); in UnwindThread()337 std::shared_ptr<DfxRegs> regs = thread->GetThreadRegs(); in UnwindThreadFallback() local338 if (regs == nullptr) { in UnwindThreadFallback()[all …]
40 void SetRegs(const std::vector<uintptr_t>& regs) in SetRegs() argument42 regsData_ = regs; in SetRegs()
125 void DfxThread::SetThreadRegs(const std::shared_ptr<DfxRegs> ®s) in SetThreadRegs() argument127 regs_ = regs; in SetThreadRegs()
45 void SetThreadRegs(const std::shared_ptr<DfxRegs> ®s);
130 static inline void rotate_regs(uint32_t regs[8]) in rotate_regs()133 backup = regs[6]; in rotate_regs()134 regs[6] = regs[5]; in rotate_regs()135 regs[5] = regs[4]; in rotate_regs()136 regs[4] = regs[3]; in rotate_regs()137 regs[3] = regs[2]; in rotate_regs()138 regs[2] = regs[1]; in rotate_regs()139 regs[1] = regs[0]; in rotate_regs()140 regs[0] = regs[7]; in rotate_regs()141 regs[7] = backup; in rotate_regs()[all …]
105 context->regs[ARM_R0] = uc->uc_mcontext.arm_r0; in CrashLocalUnwind()106 context->regs[ARM_R1] = uc->uc_mcontext.arm_r1; in CrashLocalUnwind()107 context->regs[ARM_R2] = uc->uc_mcontext.arm_r2; in CrashLocalUnwind()108 context->regs[ARM_R3] = uc->uc_mcontext.arm_r3; in CrashLocalUnwind()109 context->regs[ARM_R4] = uc->uc_mcontext.arm_r4; in CrashLocalUnwind()110 context->regs[ARM_R5] = uc->uc_mcontext.arm_r5; in CrashLocalUnwind()111 context->regs[ARM_R6] = uc->uc_mcontext.arm_r6; in CrashLocalUnwind()112 context->regs[ARM_R7] = uc->uc_mcontext.arm_r7; in CrashLocalUnwind()113 context->regs[ARM_R8] = uc->uc_mcontext.arm_r8; in CrashLocalUnwind()114 context->regs[ARM_R9] = uc->uc_mcontext.arm_r9; in CrashLocalUnwind()[all …]
180 uint32_t regs = 0xFFFFFFFF; // init to all ones in CalculateCrc32() local189 regsMsb = (regs >> 31) & 1; // 31:32-1, MSB of regs in CalculateCrc32()190 regs = regs << 1; // shift regs for CRC-CCITT in CalculateCrc32()192 regs = regs ^ polynomial; // XOR with generator poly in CalculateCrc32()194 regs = regs & regsMask; // Mask off excess upper bits in CalculateCrc32()198 regs = regs & regsMask; in CalculateCrc32()199 uint32_t ret = Reflect(regs, 32) ^ 0xFFFFFFFF; // 32:32bit in CalculateCrc32()
199 …} for pid=4884 comm="com.example.web" path="/sys/devices/system/cpu/cpu0/regs/identification/midr…