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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2014, Sony Mobile Communications AB.
4  */
5 
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9 #include <linux/pinctrl/pinctrl.h>
10 
11 #include "pinctrl-msm.h"
12 
13 static const struct pinctrl_pin_desc apq8064_pins[] = {
14 	PINCTRL_PIN(0, "GPIO_0"),
15 	PINCTRL_PIN(1, "GPIO_1"),
16 	PINCTRL_PIN(2, "GPIO_2"),
17 	PINCTRL_PIN(3, "GPIO_3"),
18 	PINCTRL_PIN(4, "GPIO_4"),
19 	PINCTRL_PIN(5, "GPIO_5"),
20 	PINCTRL_PIN(6, "GPIO_6"),
21 	PINCTRL_PIN(7, "GPIO_7"),
22 	PINCTRL_PIN(8, "GPIO_8"),
23 	PINCTRL_PIN(9, "GPIO_9"),
24 	PINCTRL_PIN(10, "GPIO_10"),
25 	PINCTRL_PIN(11, "GPIO_11"),
26 	PINCTRL_PIN(12, "GPIO_12"),
27 	PINCTRL_PIN(13, "GPIO_13"),
28 	PINCTRL_PIN(14, "GPIO_14"),
29 	PINCTRL_PIN(15, "GPIO_15"),
30 	PINCTRL_PIN(16, "GPIO_16"),
31 	PINCTRL_PIN(17, "GPIO_17"),
32 	PINCTRL_PIN(18, "GPIO_18"),
33 	PINCTRL_PIN(19, "GPIO_19"),
34 	PINCTRL_PIN(20, "GPIO_20"),
35 	PINCTRL_PIN(21, "GPIO_21"),
36 	PINCTRL_PIN(22, "GPIO_22"),
37 	PINCTRL_PIN(23, "GPIO_23"),
38 	PINCTRL_PIN(24, "GPIO_24"),
39 	PINCTRL_PIN(25, "GPIO_25"),
40 	PINCTRL_PIN(26, "GPIO_26"),
41 	PINCTRL_PIN(27, "GPIO_27"),
42 	PINCTRL_PIN(28, "GPIO_28"),
43 	PINCTRL_PIN(29, "GPIO_29"),
44 	PINCTRL_PIN(30, "GPIO_30"),
45 	PINCTRL_PIN(31, "GPIO_31"),
46 	PINCTRL_PIN(32, "GPIO_32"),
47 	PINCTRL_PIN(33, "GPIO_33"),
48 	PINCTRL_PIN(34, "GPIO_34"),
49 	PINCTRL_PIN(35, "GPIO_35"),
50 	PINCTRL_PIN(36, "GPIO_36"),
51 	PINCTRL_PIN(37, "GPIO_37"),
52 	PINCTRL_PIN(38, "GPIO_38"),
53 	PINCTRL_PIN(39, "GPIO_39"),
54 	PINCTRL_PIN(40, "GPIO_40"),
55 	PINCTRL_PIN(41, "GPIO_41"),
56 	PINCTRL_PIN(42, "GPIO_42"),
57 	PINCTRL_PIN(43, "GPIO_43"),
58 	PINCTRL_PIN(44, "GPIO_44"),
59 	PINCTRL_PIN(45, "GPIO_45"),
60 	PINCTRL_PIN(46, "GPIO_46"),
61 	PINCTRL_PIN(47, "GPIO_47"),
62 	PINCTRL_PIN(48, "GPIO_48"),
63 	PINCTRL_PIN(49, "GPIO_49"),
64 	PINCTRL_PIN(50, "GPIO_50"),
65 	PINCTRL_PIN(51, "GPIO_51"),
66 	PINCTRL_PIN(52, "GPIO_52"),
67 	PINCTRL_PIN(53, "GPIO_53"),
68 	PINCTRL_PIN(54, "GPIO_54"),
69 	PINCTRL_PIN(55, "GPIO_55"),
70 	PINCTRL_PIN(56, "GPIO_56"),
71 	PINCTRL_PIN(57, "GPIO_57"),
72 	PINCTRL_PIN(58, "GPIO_58"),
73 	PINCTRL_PIN(59, "GPIO_59"),
74 	PINCTRL_PIN(60, "GPIO_60"),
75 	PINCTRL_PIN(61, "GPIO_61"),
76 	PINCTRL_PIN(62, "GPIO_62"),
77 	PINCTRL_PIN(63, "GPIO_63"),
78 	PINCTRL_PIN(64, "GPIO_64"),
79 	PINCTRL_PIN(65, "GPIO_65"),
80 	PINCTRL_PIN(66, "GPIO_66"),
81 	PINCTRL_PIN(67, "GPIO_67"),
82 	PINCTRL_PIN(68, "GPIO_68"),
83 	PINCTRL_PIN(69, "GPIO_69"),
84 	PINCTRL_PIN(70, "GPIO_70"),
85 	PINCTRL_PIN(71, "GPIO_71"),
86 	PINCTRL_PIN(72, "GPIO_72"),
87 	PINCTRL_PIN(73, "GPIO_73"),
88 	PINCTRL_PIN(74, "GPIO_74"),
89 	PINCTRL_PIN(75, "GPIO_75"),
90 	PINCTRL_PIN(76, "GPIO_76"),
91 	PINCTRL_PIN(77, "GPIO_77"),
92 	PINCTRL_PIN(78, "GPIO_78"),
93 	PINCTRL_PIN(79, "GPIO_79"),
94 	PINCTRL_PIN(80, "GPIO_80"),
95 	PINCTRL_PIN(81, "GPIO_81"),
96 	PINCTRL_PIN(82, "GPIO_82"),
97 	PINCTRL_PIN(83, "GPIO_83"),
98 	PINCTRL_PIN(84, "GPIO_84"),
99 	PINCTRL_PIN(85, "GPIO_85"),
100 	PINCTRL_PIN(86, "GPIO_86"),
101 	PINCTRL_PIN(87, "GPIO_87"),
102 	PINCTRL_PIN(88, "GPIO_88"),
103 	PINCTRL_PIN(89, "GPIO_89"),
104 
105 	PINCTRL_PIN(90, "SDC1_CLK"),
106 	PINCTRL_PIN(91, "SDC1_CMD"),
107 	PINCTRL_PIN(92, "SDC1_DATA"),
108 	PINCTRL_PIN(93, "SDC3_CLK"),
109 	PINCTRL_PIN(94, "SDC3_CMD"),
110 	PINCTRL_PIN(95, "SDC3_DATA"),
111 };
112 
113 #define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
114 DECLARE_APQ_GPIO_PINS(0);
115 DECLARE_APQ_GPIO_PINS(1);
116 DECLARE_APQ_GPIO_PINS(2);
117 DECLARE_APQ_GPIO_PINS(3);
118 DECLARE_APQ_GPIO_PINS(4);
119 DECLARE_APQ_GPIO_PINS(5);
120 DECLARE_APQ_GPIO_PINS(6);
121 DECLARE_APQ_GPIO_PINS(7);
122 DECLARE_APQ_GPIO_PINS(8);
123 DECLARE_APQ_GPIO_PINS(9);
124 DECLARE_APQ_GPIO_PINS(10);
125 DECLARE_APQ_GPIO_PINS(11);
126 DECLARE_APQ_GPIO_PINS(12);
127 DECLARE_APQ_GPIO_PINS(13);
128 DECLARE_APQ_GPIO_PINS(14);
129 DECLARE_APQ_GPIO_PINS(15);
130 DECLARE_APQ_GPIO_PINS(16);
131 DECLARE_APQ_GPIO_PINS(17);
132 DECLARE_APQ_GPIO_PINS(18);
133 DECLARE_APQ_GPIO_PINS(19);
134 DECLARE_APQ_GPIO_PINS(20);
135 DECLARE_APQ_GPIO_PINS(21);
136 DECLARE_APQ_GPIO_PINS(22);
137 DECLARE_APQ_GPIO_PINS(23);
138 DECLARE_APQ_GPIO_PINS(24);
139 DECLARE_APQ_GPIO_PINS(25);
140 DECLARE_APQ_GPIO_PINS(26);
141 DECLARE_APQ_GPIO_PINS(27);
142 DECLARE_APQ_GPIO_PINS(28);
143 DECLARE_APQ_GPIO_PINS(29);
144 DECLARE_APQ_GPIO_PINS(30);
145 DECLARE_APQ_GPIO_PINS(31);
146 DECLARE_APQ_GPIO_PINS(32);
147 DECLARE_APQ_GPIO_PINS(33);
148 DECLARE_APQ_GPIO_PINS(34);
149 DECLARE_APQ_GPIO_PINS(35);
150 DECLARE_APQ_GPIO_PINS(36);
151 DECLARE_APQ_GPIO_PINS(37);
152 DECLARE_APQ_GPIO_PINS(38);
153 DECLARE_APQ_GPIO_PINS(39);
154 DECLARE_APQ_GPIO_PINS(40);
155 DECLARE_APQ_GPIO_PINS(41);
156 DECLARE_APQ_GPIO_PINS(42);
157 DECLARE_APQ_GPIO_PINS(43);
158 DECLARE_APQ_GPIO_PINS(44);
159 DECLARE_APQ_GPIO_PINS(45);
160 DECLARE_APQ_GPIO_PINS(46);
161 DECLARE_APQ_GPIO_PINS(47);
162 DECLARE_APQ_GPIO_PINS(48);
163 DECLARE_APQ_GPIO_PINS(49);
164 DECLARE_APQ_GPIO_PINS(50);
165 DECLARE_APQ_GPIO_PINS(51);
166 DECLARE_APQ_GPIO_PINS(52);
167 DECLARE_APQ_GPIO_PINS(53);
168 DECLARE_APQ_GPIO_PINS(54);
169 DECLARE_APQ_GPIO_PINS(55);
170 DECLARE_APQ_GPIO_PINS(56);
171 DECLARE_APQ_GPIO_PINS(57);
172 DECLARE_APQ_GPIO_PINS(58);
173 DECLARE_APQ_GPIO_PINS(59);
174 DECLARE_APQ_GPIO_PINS(60);
175 DECLARE_APQ_GPIO_PINS(61);
176 DECLARE_APQ_GPIO_PINS(62);
177 DECLARE_APQ_GPIO_PINS(63);
178 DECLARE_APQ_GPIO_PINS(64);
179 DECLARE_APQ_GPIO_PINS(65);
180 DECLARE_APQ_GPIO_PINS(66);
181 DECLARE_APQ_GPIO_PINS(67);
182 DECLARE_APQ_GPIO_PINS(68);
183 DECLARE_APQ_GPIO_PINS(69);
184 DECLARE_APQ_GPIO_PINS(70);
185 DECLARE_APQ_GPIO_PINS(71);
186 DECLARE_APQ_GPIO_PINS(72);
187 DECLARE_APQ_GPIO_PINS(73);
188 DECLARE_APQ_GPIO_PINS(74);
189 DECLARE_APQ_GPIO_PINS(75);
190 DECLARE_APQ_GPIO_PINS(76);
191 DECLARE_APQ_GPIO_PINS(77);
192 DECLARE_APQ_GPIO_PINS(78);
193 DECLARE_APQ_GPIO_PINS(79);
194 DECLARE_APQ_GPIO_PINS(80);
195 DECLARE_APQ_GPIO_PINS(81);
196 DECLARE_APQ_GPIO_PINS(82);
197 DECLARE_APQ_GPIO_PINS(83);
198 DECLARE_APQ_GPIO_PINS(84);
199 DECLARE_APQ_GPIO_PINS(85);
200 DECLARE_APQ_GPIO_PINS(86);
201 DECLARE_APQ_GPIO_PINS(87);
202 DECLARE_APQ_GPIO_PINS(88);
203 DECLARE_APQ_GPIO_PINS(89);
204 
205 static const unsigned int sdc1_clk_pins[] = { 90 };
206 static const unsigned int sdc1_cmd_pins[] = { 91 };
207 static const unsigned int sdc1_data_pins[] = { 92 };
208 static const unsigned int sdc3_clk_pins[] = { 93 };
209 static const unsigned int sdc3_cmd_pins[] = { 94 };
210 static const unsigned int sdc3_data_pins[] = { 95 };
211 
212 #define FUNCTION(fname)					\
213 	[APQ_MUX_##fname] = {				\
214 		.name = #fname,				\
215 		.groups = fname##_groups,		\
216 		.ngroups = ARRAY_SIZE(fname##_groups),	\
217 	}
218 
219 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \
220 	{						\
221 		.name = "gpio" #id,			\
222 		.pins = gpio##id##_pins,		\
223 		.npins = ARRAY_SIZE(gpio##id##_pins),	\
224 		.funcs = (int[]){			\
225 			APQ_MUX_gpio,			\
226 			APQ_MUX_##f1,			\
227 			APQ_MUX_##f2,			\
228 			APQ_MUX_##f3,			\
229 			APQ_MUX_##f4,			\
230 			APQ_MUX_##f5,			\
231 			APQ_MUX_##f6,			\
232 			APQ_MUX_##f7,			\
233 			APQ_MUX_##f8,			\
234 			APQ_MUX_##f9,			\
235 			APQ_MUX_##f10,			\
236 		},					\
237 		.nfuncs = 11,				\
238 		.ctl_reg = 0x1000 + 0x10 * id,		\
239 		.io_reg = 0x1004 + 0x10 * id,		\
240 		.intr_cfg_reg = 0x1008 + 0x10 * id,	\
241 		.intr_status_reg = 0x100c + 0x10 * id,	\
242 		.intr_target_reg = 0x400 + 0x4 * id,	\
243 		.mux_bit = 2,				\
244 		.pull_bit = 0,				\
245 		.drv_bit = 6,				\
246 		.oe_bit = 9,				\
247 		.in_bit = 0,				\
248 		.out_bit = 1,				\
249 		.intr_enable_bit = 0,			\
250 		.intr_status_bit = 0,			\
251 		.intr_ack_high = 1,			\
252 		.intr_target_bit = 0,			\
253 		.intr_target_kpss_val = 4,		\
254 		.intr_raw_status_bit = 3,		\
255 		.intr_polarity_bit = 1,			\
256 		.intr_detection_bit = 2,		\
257 		.intr_detection_width = 1,		\
258 	}
259 
260 #define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
261 	{						\
262 		.name = #pg_name,			\
263 		.pins = pg_name##_pins,			\
264 		.npins = ARRAY_SIZE(pg_name##_pins),	\
265 		.ctl_reg = ctl,				\
266 		.io_reg = 0,				\
267 		.intr_cfg_reg = 0,			\
268 		.intr_status_reg = 0,			\
269 		.intr_target_reg = 0,			\
270 		.mux_bit = -1,				\
271 		.pull_bit = pull,			\
272 		.drv_bit = drv,				\
273 		.oe_bit = -1,				\
274 		.in_bit = -1,				\
275 		.out_bit = -1,				\
276 		.intr_enable_bit = -1,			\
277 		.intr_status_bit = -1,			\
278 		.intr_target_bit = -1,			\
279 		.intr_target_kpss_val = -1,		\
280 		.intr_raw_status_bit = -1,		\
281 		.intr_polarity_bit = -1,		\
282 		.intr_detection_bit = -1,		\
283 		.intr_detection_width = -1,		\
284 	}
285 
286 enum apq8064_functions {
287 	APQ_MUX_cam_mclk,
288 	APQ_MUX_codec_mic_i2s,
289 	APQ_MUX_codec_spkr_i2s,
290 	APQ_MUX_gp_clk_0a,
291 	APQ_MUX_gp_clk_0b,
292 	APQ_MUX_gp_clk_1a,
293 	APQ_MUX_gp_clk_1b,
294 	APQ_MUX_gp_clk_2a,
295 	APQ_MUX_gp_clk_2b,
296 	APQ_MUX_gpio,
297 	APQ_MUX_gsbi1,
298 	APQ_MUX_gsbi2,
299 	APQ_MUX_gsbi3,
300 	APQ_MUX_gsbi4,
301 	APQ_MUX_gsbi4_cam_i2c,
302 	APQ_MUX_gsbi5,
303 	APQ_MUX_gsbi5_spi_cs1,
304 	APQ_MUX_gsbi5_spi_cs2,
305 	APQ_MUX_gsbi5_spi_cs3,
306 	APQ_MUX_gsbi6,
307 	APQ_MUX_gsbi6_spi_cs1,
308 	APQ_MUX_gsbi6_spi_cs2,
309 	APQ_MUX_gsbi6_spi_cs3,
310 	APQ_MUX_gsbi7,
311 	APQ_MUX_gsbi7_spi_cs1,
312 	APQ_MUX_gsbi7_spi_cs2,
313 	APQ_MUX_gsbi7_spi_cs3,
314 	APQ_MUX_gsbi_cam_i2c,
315 	APQ_MUX_hdmi,
316 	APQ_MUX_mi2s,
317 	APQ_MUX_riva_bt,
318 	APQ_MUX_riva_fm,
319 	APQ_MUX_riva_wlan,
320 	APQ_MUX_sdc2,
321 	APQ_MUX_sdc4,
322 	APQ_MUX_slimbus,
323 	APQ_MUX_spkr_i2s,
324 	APQ_MUX_tsif1,
325 	APQ_MUX_tsif2,
326 	APQ_MUX_usb2_hsic,
327 	APQ_MUX_ps_hold,
328 	APQ_MUX_NA,
329 };
330 
331 static const char * const cam_mclk_groups[] = {
332 	"gpio4" "gpio5"
333 };
334 static const char * const codec_mic_i2s_groups[] = {
335 	"gpio34", "gpio35", "gpio36", "gpio37", "gpio38"
336 };
337 static const char * const codec_spkr_i2s_groups[] = {
338 	"gpio39", "gpio40", "gpio41", "gpio42"
339 };
340 static const char * const gpio_groups[] = {
341 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
342 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
343 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
344 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
345 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
346 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
347 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
348 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
349 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
350 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
351 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
352 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
353 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
354 };
355 static const char * const gp_clk_0a_groups[] = {
356 	"gpio3"
357 };
358 static const char * const gp_clk_0b_groups[] = {
359 	"gpio34"
360 };
361 static const char * const gp_clk_1a_groups[] = {
362 	"gpio4"
363 };
364 static const char * const gp_clk_1b_groups[] = {
365 	"gpio50"
366 };
367 static const char * const gp_clk_2a_groups[] = {
368 	"gpio32"
369 };
370 static const char * const gp_clk_2b_groups[] = {
371 	"gpio25"
372 };
373 static const char * const ps_hold_groups[] = {
374 	"gpio78"
375 };
376 static const char * const gsbi1_groups[] = {
377 	"gpio18", "gpio19", "gpio20", "gpio21"
378 };
379 static const char * const gsbi2_groups[] = {
380 	"gpio22", "gpio23", "gpio24", "gpio25"
381 };
382 static const char * const gsbi3_groups[] = {
383 	"gpio6", "gpio7", "gpio8", "gpio9"
384 };
385 static const char * const gsbi4_groups[] = {
386 	"gpio10", "gpio11", "gpio12", "gpio13"
387 };
388 static const char * const gsbi4_cam_i2c_groups[] = {
389 	"gpio10", "gpio11", "gpio12", "gpio13"
390 };
391 static const char * const gsbi5_groups[] = {
392 	"gpio51", "gpio52", "gpio53", "gpio54"
393 };
394 static const char * const gsbi5_spi_cs1_groups[] = {
395 	"gpio47"
396 };
397 static const char * const gsbi5_spi_cs2_groups[] = {
398 	"gpio31"
399 };
400 static const char * const gsbi5_spi_cs3_groups[] = {
401 	"gpio32"
402 };
403 static const char * const gsbi6_groups[] = {
404 	"gpio14", "gpio15", "gpio16", "gpio17"
405 };
406 static const char * const gsbi6_spi_cs1_groups[] = {
407 	"gpio47"
408 };
409 static const char * const gsbi6_spi_cs2_groups[] = {
410 	"gpio31"
411 };
412 static const char * const gsbi6_spi_cs3_groups[] = {
413 	"gpio32"
414 };
415 static const char * const gsbi7_groups[] = {
416 	"gpio82", "gpio83", "gpio84", "gpio85"
417 };
418 static const char * const gsbi7_spi_cs1_groups[] = {
419 	"gpio47"
420 };
421 static const char * const gsbi7_spi_cs2_groups[] = {
422 	"gpio31"
423 };
424 static const char * const gsbi7_spi_cs3_groups[] = {
425 	"gpio32"
426 };
427 static const char * const gsbi_cam_i2c_groups[] = {
428 	"gpio10", "gpio11", "gpio12", "gpio13"
429 };
430 static const char * const hdmi_groups[] = {
431 	"gpio69", "gpio70", "gpio71", "gpio72"
432 };
433 static const char * const mi2s_groups[] = {
434 	"gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33"
435 };
436 static const char * const riva_bt_groups[] = {
437 	"gpio16", "gpio17"
438 };
439 static const char * const riva_fm_groups[] = {
440 	"gpio14", "gpio15"
441 };
442 static const char * const riva_wlan_groups[] = {
443 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
444 };
445 static const char * const sdc2_groups[] = {
446 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62"
447 };
448 static const char * const sdc4_groups[] = {
449 	"gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
450 };
451 static const char * const slimbus_groups[] = {
452 	"gpio40", "gpio41"
453 };
454 static const char * const spkr_i2s_groups[] = {
455 	"gpio47", "gpio48", "gpio49", "gpio50"
456 };
457 static const char * const tsif1_groups[] = {
458 	"gpio55", "gpio56", "gpio57"
459 };
460 static const char * const tsif2_groups[] = {
461 	"gpio58", "gpio59", "gpio60"
462 };
463 static const char * const usb2_hsic_groups[] = {
464 	"gpio88", "gpio89"
465 };
466 
467 static const struct msm_function apq8064_functions[] = {
468 	FUNCTION(cam_mclk),
469 	FUNCTION(codec_mic_i2s),
470 	FUNCTION(codec_spkr_i2s),
471 	FUNCTION(gp_clk_0a),
472 	FUNCTION(gp_clk_0b),
473 	FUNCTION(gp_clk_1a),
474 	FUNCTION(gp_clk_1b),
475 	FUNCTION(gp_clk_2a),
476 	FUNCTION(gp_clk_2b),
477 	FUNCTION(gpio),
478 	FUNCTION(gsbi1),
479 	FUNCTION(gsbi2),
480 	FUNCTION(gsbi3),
481 	FUNCTION(gsbi4),
482 	FUNCTION(gsbi4_cam_i2c),
483 	FUNCTION(gsbi5),
484 	FUNCTION(gsbi5_spi_cs1),
485 	FUNCTION(gsbi5_spi_cs2),
486 	FUNCTION(gsbi5_spi_cs3),
487 	FUNCTION(gsbi6),
488 	FUNCTION(gsbi6_spi_cs1),
489 	FUNCTION(gsbi6_spi_cs2),
490 	FUNCTION(gsbi6_spi_cs3),
491 	FUNCTION(gsbi7),
492 	FUNCTION(gsbi7_spi_cs1),
493 	FUNCTION(gsbi7_spi_cs2),
494 	FUNCTION(gsbi7_spi_cs3),
495 	FUNCTION(gsbi_cam_i2c),
496 	FUNCTION(hdmi),
497 	FUNCTION(mi2s),
498 	FUNCTION(riva_bt),
499 	FUNCTION(riva_fm),
500 	FUNCTION(riva_wlan),
501 	FUNCTION(sdc2),
502 	FUNCTION(sdc4),
503 	FUNCTION(slimbus),
504 	FUNCTION(spkr_i2s),
505 	FUNCTION(tsif1),
506 	FUNCTION(tsif2),
507 	FUNCTION(usb2_hsic),
508 	FUNCTION(ps_hold),
509 };
510 
511 static const struct msm_pingroup apq8064_groups[] = {
512 	PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
513 	PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
514 	PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
515 	PINGROUP(3, NA, gp_clk_0a, NA, NA, NA, NA, NA, NA, NA, NA),
516 	PINGROUP(4, NA, NA, cam_mclk, gp_clk_1a, NA, NA, NA, NA, NA, NA),
517 	PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
518 	PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
519 	PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
520 	PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
521 	PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
522 	PINGROUP(10, gsbi4, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c, NA),
523 	PINGROUP(11, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c),
524 	PINGROUP(12, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
525 	PINGROUP(13, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
526 	PINGROUP(14, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
527 	PINGROUP(15, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
528 	PINGROUP(16, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
529 	PINGROUP(17, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
530 	PINGROUP(18, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
531 	PINGROUP(19, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
532 	PINGROUP(20, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
533 	PINGROUP(21, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
534 	PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
535 	PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
536 	PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
537 	PINGROUP(25, gsbi2, gp_clk_2b, NA, NA, NA, NA, NA, NA, NA, NA),
538 	PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
539 	PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
540 	PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
541 	PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
542 	PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
543 	PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA),
544 	PINGROUP(32, mi2s, gp_clk_2a, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
545 	PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
546 	PINGROUP(34, codec_mic_i2s, gp_clk_0b, NA, NA, NA, NA, NA, NA, NA, NA),
547 	PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
548 	PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
549 	PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
550 	PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
551 	PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
552 	PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
553 	PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
554 	PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
555 	PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
556 	PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
557 	PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
558 	PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
559 	PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA),
560 	PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
561 	PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
562 	PINGROUP(50, spkr_i2s, gp_clk_1b, NA, NA, NA, NA, NA, NA, NA, NA),
563 	PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
564 	PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
565 	PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
566 	PINGROUP(54, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
567 	PINGROUP(55, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
568 	PINGROUP(56, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
569 	PINGROUP(57, tsif1, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
570 	PINGROUP(58, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
571 	PINGROUP(59, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
572 	PINGROUP(60, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
573 	PINGROUP(61, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
574 	PINGROUP(62, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
575 	PINGROUP(63, NA, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
576 	PINGROUP(64, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
577 	PINGROUP(65, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
578 	PINGROUP(66, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
579 	PINGROUP(67, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
580 	PINGROUP(68, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
581 	PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
582 	PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
583 	PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
584 	PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
585 	PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
586 	PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
587 	PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
588 	PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
589 	PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
590 	PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA),
591 	PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
592 	PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
593 	PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
594 	PINGROUP(82, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
595 	PINGROUP(83, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA),
596 	PINGROUP(84, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
597 	PINGROUP(85, NA, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA),
598 	PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
599 	PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
600 	PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
601 	PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
602 
603 	SDC_PINGROUP(sdc1_clk, 0x20a0, 13, 6),
604 	SDC_PINGROUP(sdc1_cmd, 0x20a0, 11, 3),
605 	SDC_PINGROUP(sdc1_data, 0x20a0, 9, 0),
606 
607 	SDC_PINGROUP(sdc3_clk, 0x20a4, 14, 6),
608 	SDC_PINGROUP(sdc3_cmd, 0x20a4, 11, 3),
609 	SDC_PINGROUP(sdc3_data, 0x20a4, 9, 0),
610 };
611 
612 #define NUM_GPIO_PINGROUPS 90
613 
614 static const struct msm_pinctrl_soc_data apq8064_pinctrl = {
615 	.pins = apq8064_pins,
616 	.npins = ARRAY_SIZE(apq8064_pins),
617 	.functions = apq8064_functions,
618 	.nfunctions = ARRAY_SIZE(apq8064_functions),
619 	.groups = apq8064_groups,
620 	.ngroups = ARRAY_SIZE(apq8064_groups),
621 	.ngpios = NUM_GPIO_PINGROUPS,
622 };
623 
apq8064_pinctrl_probe(struct platform_device * pdev)624 static int apq8064_pinctrl_probe(struct platform_device *pdev)
625 {
626 	return msm_pinctrl_probe(pdev, &apq8064_pinctrl);
627 }
628 
629 static const struct of_device_id apq8064_pinctrl_of_match[] = {
630 	{ .compatible = "qcom,apq8064-pinctrl", },
631 	{ },
632 };
633 
634 static struct platform_driver apq8064_pinctrl_driver = {
635 	.driver = {
636 		.name = "apq8064-pinctrl",
637 		.of_match_table = apq8064_pinctrl_of_match,
638 	},
639 	.probe = apq8064_pinctrl_probe,
640 	.remove = msm_pinctrl_remove,
641 };
642 
apq8064_pinctrl_init(void)643 static int __init apq8064_pinctrl_init(void)
644 {
645 	return platform_driver_register(&apq8064_pinctrl_driver);
646 }
647 arch_initcall(apq8064_pinctrl_init);
648 
apq8064_pinctrl_exit(void)649 static void __exit apq8064_pinctrl_exit(void)
650 {
651 	platform_driver_unregister(&apq8064_pinctrl_driver);
652 }
653 module_exit(apq8064_pinctrl_exit);
654 
655 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
656 MODULE_DESCRIPTION("Qualcomm APQ8064 pinctrl driver");
657 MODULE_LICENSE("GPL v2");
658 MODULE_DEVICE_TABLE(of, apq8064_pinctrl_of_match);
659