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Searched refs:ASID (Results 1 – 14 of 14) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/include/asm/
Dmmu.h27 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro
29 #define ASID(mm) (0) macro
Dtlbflush.h370 const int asid = ASID(mm); in __local_flush_tlb_mm()
388 const int asid = ASID(mm); in local_flush_tlb_mm()
412 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm()
425 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page()
446 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page()
463 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
/kernel/linux/linux-5.10/arch/arm/mm/
Dtlb-v7.S38 asid r3, r3 @ mask ASID
47 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
76 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
Dtlb-v6.S40 asid r3, r3 @ mask ASID
DKconfig611 This indicates whether the CPU has the ASID register; used to
/kernel/linux/linux-5.10/arch/arm64/include/asm/
Dtlbflush.h251 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm()
263 addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); in flush_tlb_page_nosync()
308 asid = ASID(vma->vm_mm); in __flush_tlb_range()
Dmmu.h58 #define ASID(mm) (atomic64_read(&(mm)->context.id) & 0xffff) macro
Dmmu_context.h197 ttbr = phys_to_ttbr(virt_to_phys(mm->pgd)) | ASID(mm) << 48; in update_saved_ttbr0()
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Ddebugfs-driver-habanalabs151 Description: Displays the hop values and physical address for a given ASID
152 and virtual address. The user should write the ASID and VA into
154 e.g. to display info about VA 0x1000 for ASID 1 you need to do:
177 address mappings per ASID
/kernel/linux/linux-5.10/arch/arm64/mm/
Dcontext.c352 unsigned long asid = ASID(mm); in cpu_do_switch_mm()
/kernel/linux/linux-5.10/arch/arm/
DKconfig940 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
944 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
949 entries regardless of the ASID.
977 bool "ARM errata: possible faulty MMU translations following an ASID switch"
982 which starts prior to an ASID switch but completes afterwards. This
984 the new ASID. This workaround places two dsb instructions in the mm
985 switching code so that no page table walks can cross the ASID switch.
1041 which sends an IPI to the CPUs that are running the same ASID
/kernel/linux/linux-5.10/Documentation/virt/kvm/
Damd-memory-encryption.rst44 Hence, the ASID for the SEV-enabled guests must be from 1 to a maximum value
/kernel/linux/linux-5.10/arch/arm64/
DKconfig708 contains data for a non-current ASID. The fix is to
771 bool "Falkor E1003: Incorrect translation due to ASID change"
774 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID
775 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID
1218 zeroed area and reserved ASID. The user access routines
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0001_linux_arch.patch14053 - asid = __TLBI_VADDR(0, ASID(mm));
14063 + asid = __TLBI_VADDR(0, ASID(mm));
14075 - addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
14084 + addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
14093 asid = ASID(vma->vm_mm);