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Searched refs:B11 (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/arch/c6x/kernel/
Dentry.S72 STDW .D2T2 B11:B10,*SP--[1]
78 || MVC .S2 RILC,B11
113 STDW .D2T2 B11:B10,*SP--[1] ; save RILC and ILC
126 LDDW .D2T2 *++SP[1],B11:B10 ; get RILC (B11) and ILC (B10)
156 || MVC .S2 B11,RILC
166 || LDDW .D2T2 *++SP[1],B11:B10
Dswitch_to.S52 STDW .D2T2 B11:B10,*+B5(THREAD_B11_10)
61 LDDW .D2T2 *+B4(THREAD_B11_10),B11:B10
/kernel/linux/linux-5.10/arch/c6x/lib/
Dpop_rts.S13 lddw .d2t2 *++B15, B11:B10
Dpush_rts.S16 stdw .d2t2 B11:B10, *B15--
/kernel/linux/linux-5.10/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g4.c1391 #define B11 167 macro
1392 SIG_EXPR_LIST_DECL_SINGLE(B11, GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15));
1393 SIG_EXPR_LIST_DECL_SINGLE(B11, RMII1RXD1, RMII1, RMII1_DESC);
1394 SIG_EXPR_LIST_DECL_SINGLE(B11, RGMII1RXD1, RGMII1);
1395 PIN_DECL_(B11, SIG_EXPR_LIST_PTR(B11, GPIOU7),
1396 SIG_EXPR_LIST_PTR(B11, RMII1RXD1),
1397 SIG_EXPR_LIST_PTR(B11, RGMII1RXD1));
1457 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
1459 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
1947 ASPEED_PINCTRL_PIN(B11),
Dpinctrl-aspeed-g5.c194 #define B11 23 macro
195 SIG_EXPR_LIST_DECL_SINGLE(B11, SD1WP, SD1, SD1_DESC);
196 SIG_EXPR_LIST_DECL_SINGLE(B11, SDA13, I2C13, I2C13_DESC);
197 PIN_DECL_2(B11, GPIOC7, SD1WP, SDA13);
199 FUNC_GROUP_DECL(I2C13, C11, B11);
200 FUNC_GROUP_DECL(SD1, C12, A12, B12, D9, D10, E12, C11, B11);
1940 ASPEED_PINCTRL_PIN(B11),
2491 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C12, B11, SCU8C, 18),
2492 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C12, B11, SCU8C, 18),
/kernel/linux/linux-5.10/arch/m68k/fpsp040/
Dsetox.S805 fmoves #0x310F8290,%fp2 | ...fp2 is B11
808 fmulx %fp0,%fp2 | ...fp2 is S*B11
/kernel/linux/linux-5.10/arch/m68k/ifpsp060/src/
Dfplsp.S7434 fmov.s &0x310F8290,%fp2 # fp2 is B11
7437 fmul.x %fp0,%fp2 # fp2 is S*B11
Dfpsp.S7093 # [ S*S*(B3 + S*(B5 + ... + S*B11)) ] #
/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch50508 + * Lane1 (tx_rx_p/m_ln_1) RX1+/RX1- (pins B11/B10)