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Searched refs:CACHELINE_ALIGNED_DATA (Results 1 – 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/arch/c6x/kernel/
Dvmlinux.lds.S106 CACHELINE_ALIGNED_DATA(128)
/kernel/linux/linux-5.10/arch/mips/kernel/
Dvmlinux.lds.S94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
/kernel/linux/linux-5.10/arch/ia64/kernel/
Dvmlinux.lds.S181 CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
/kernel/linux/linux-5.10/arch/x86/kernel/
Dvmlinux.lds.S173 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dvmlinux.lds.S346 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
/kernel/linux/linux-5.10/include/asm-generic/
Dvmlinux.lds.h375 #define CACHELINE_ALIGNED_DATA(align) \ macro
1154 CACHELINE_ALIGNED_DATA(cacheline) \