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Searched refs:CCSIDR (Results 1 – 3 of 3) sorted by relevance

/kernel/liteos_a/arch/arm/arm/include/
Dlos_hw_cpu.h94 #define CCSIDR CP15_REG(c0, 1, c0, 0) /* Cache Size ID Registers */ macro
/kernel/linux/linux-5.10/arch/arm/mm/
Dcache-v7.S44 mrc p15, 1, r0, c0, c0, 0 @ read cache geometry from CCSIDR
/kernel/linux/linux-5.10/Documentation/virt/kvm/
Dapi.rst2355 ARM CCSIDR registers are demultiplexed by CSSELR value::
2416 arm64 CCSIDR registers are demultiplexed by CSSELR value::