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Searched refs:CLK_BASE__INST1_SEG0 (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h190 #define CLK_BASE__INST1_SEG0 0 macro
Dnavi12_ip_offset.h243 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dvega20_ip_offset.h217 #define CLK_BASE__INST1_SEG0 0 macro
Dnavi14_ip_offset.h243 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dsienna_cichlid_ip_offset.h250 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dvega10_ip_offset.h1211 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Drenoir_ip_offset.h325 #define CLK_BASE__INST1_SEG0 0 macro
Darct_ip_offset.h309 #define CLK_BASE__INST1_SEG0 0x000120E0 macro