Searched refs:CLK_DIV_8 (Results 1 – 6 of 6) sorted by relevance
630 while ((n < MIN_DIV_N_PCR - 4) && (div < CLK_DIV_8)) { in rts5228_pci_switch_clock()660 } else if (div == CLK_DIV_8) { in rts5228_pci_switch_clock()
660 while ((n < MIN_DIV_N_PCR - 4) && (div < CLK_DIV_8)) { in rts5261_pci_switch_clock()690 } else if (div == CLK_DIV_8) { in rts5261_pci_switch_clock()
756 while ((n < MIN_DIV_N_PCR) && (div < CLK_DIV_8)) { in rtsx_pci_switch_clock()
309 #define CLK_DIV_8 0x03 macro
455 #define CLK_DIV_8 0x04 macro
54 #define CLK_DIV_8 0x04 macro