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Searched refs:CLK_TOP_DI_SEL (Results 1 – 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmt2712-clk.h191 #define CLK_TOP_DI_SEL 160 macro
Dmt2701-clk.h115 #define CLK_TOP_DI_SEL 104 macro
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt2701.c549 MUX_GATE(CLK_TOP_DI_SEL, "di_sel", di_parents,
Dclk-mt2712.c875 MUX_GATE(CLK_TOP_DI_SEL, "di_sel",