Searched refs:CLK_UART1_INTERNAL_DIV (Results 1 – 3 of 3) sorted by relevance
68 #define CLK_UART1_INTERNAL_DIV 78 macro
78 DIV_F(CLK_UART1_INTERNAL_DIV, "uart1_internal_div", "sys_pll_mux",
274 assigned-clocks = <&clk_core CLK_UART1_INTERNAL_DIV>,