Searched refs:CP15_REG (Results 1 – 2 of 2) sorted by relevance
| /kernel/liteos_a/arch/arm/arm/include/ |
| D | los_hw_cpu.h | 86 #define CP15_REG(CRn, Op1, CRm, Op2) "p15, "#Op1", %0, "#CRn","#CRm","#Op2 macro
92 #define MIDR CP15_REG(c0, 0, c0, 0) /* Main ID Register */
93 #define MPIDR CP15_REG(c0, 0, c0, 5) /* Multiprocessor Affinity Register */
94 #define CCSIDR CP15_REG(c0, 1, c0, 0) /* Cache Size ID Registers */
95 #define CLIDR CP15_REG(c0, 1, c0, 1) /* Cache Level ID Register */
96 #define VPIDR CP15_REG(c0, 4, c0, 0) /* Virtualization Processor ID Register */
97 #define VMPIDR CP15_REG(c0, 4, c0, 5) /* Virtualization Multiprocessor ID Register …
102 #define SCTLR CP15_REG(c1, 0, c0, 0) /* System Control Register */
103 #define ACTLR CP15_REG(c1, 0, c0, 1) /* Auxiliary Control Register */
104 #define CPACR CP15_REG(c1, 0, c0, 2) /* Coprocessor Access Control Register */
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| /kernel/liteos_a/arch/arm/arm/src/ |
| D | arm_generic_timer.c | 72 #define TIMER_REG_CNTFRQ CP15_REG(c14, 0, c0, 0)
75 #define TIMER_REG_CNTP_CTL CP15_REG(c14, 0, c2, 1)
76 #define TIMER_REG_CNTP_TVAL CP15_REG(c14, 0, c2, 0)
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