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Searched refs:DEF_MOD (Results 1 – 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/renesas/
Dr8a7742-cpg-mssr.c83 DEF_MOD("msiof0", 0, R8A7742_CLK_MP),
84 DEF_MOD("vcp1", 100, R8A7742_CLK_ZS),
85 DEF_MOD("vcp0", 101, R8A7742_CLK_ZS),
86 DEF_MOD("vpc1", 102, R8A7742_CLK_ZS),
87 DEF_MOD("vpc0", 103, R8A7742_CLK_ZS),
88 DEF_MOD("tmu1", 111, R8A7742_CLK_P),
89 DEF_MOD("3dg", 112, R8A7742_CLK_ZG),
90 DEF_MOD("2d-dmac", 115, R8A7742_CLK_ZS),
91 DEF_MOD("fdp1-2", 117, R8A7742_CLK_ZS),
92 DEF_MOD("fdp1-1", 118, R8A7742_CLK_ZS),
[all …]
Dr8a7743-cpg-mssr.c81 DEF_MOD("msiof0", 0, R8A7743_CLK_MP),
82 DEF_MOD("vcp0", 101, R8A7743_CLK_ZS),
83 DEF_MOD("vpc0", 103, R8A7743_CLK_ZS),
84 DEF_MOD("tmu1", 111, R8A7743_CLK_P),
85 DEF_MOD("3dg", 112, R8A7743_CLK_ZG),
86 DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS),
87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
89 DEF_MOD("tmu3", 121, R8A7743_CLK_P),
90 DEF_MOD("tmu2", 122, R8A7743_CLK_P),
[all …]
Dr8a774e1-cpg-mssr.c124 DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1),
125 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1),
126 DEF_MOD("tmu4", 121, R8A774E1_CLK_S0D6),
127 DEF_MOD("tmu3", 122, R8A774E1_CLK_S3D2),
128 DEF_MOD("tmu2", 123, R8A774E1_CLK_S3D2),
129 DEF_MOD("tmu1", 124, R8A774E1_CLK_S3D2),
130 DEF_MOD("tmu0", 125, R8A774E1_CLK_CP),
131 DEF_MOD("vcplf", 130, R8A774E1_CLK_S2D1),
132 DEF_MOD("vdpb", 131, R8A774E1_CLK_S2D1),
133 DEF_MOD("scif5", 202, R8A774E1_CLK_S3D4),
[all …]
Dr8a77965-cpg-mssr.c125 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
126 DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
127 DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
128 DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
129 DEF_MOD("scif1", 206, R8A77965_CLK_S3D4),
130 DEF_MOD("scif0", 207, R8A77965_CLK_S3D4),
131 DEF_MOD("msiof3", 208, R8A77965_CLK_MSO),
132 DEF_MOD("msiof2", 209, R8A77965_CLK_MSO),
133 DEF_MOD("msiof1", 210, R8A77965_CLK_MSO),
134 DEF_MOD("msiof0", 211, R8A77965_CLK_MSO),
[all …]
Dr8a7791-cpg-mssr.c89 DEF_MOD("msiof0", 0, R8A7791_CLK_MP),
90 DEF_MOD("vcp0", 101, R8A7791_CLK_ZS),
91 DEF_MOD("vpc0", 103, R8A7791_CLK_ZS),
92 DEF_MOD("jpu", 106, R8A7791_CLK_M2),
93 DEF_MOD("ssp1", 109, R8A7791_CLK_ZS),
94 DEF_MOD("tmu1", 111, R8A7791_CLK_P),
95 DEF_MOD("3dg", 112, R8A7791_CLK_ZG),
96 DEF_MOD("2d-dmac", 115, R8A7791_CLK_ZS),
97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS),
[all …]
Dr8a7790-cpg-mssr.c92 DEF_MOD("msiof0", 0, R8A7790_CLK_MP),
93 DEF_MOD("vcp1", 100, R8A7790_CLK_ZS),
94 DEF_MOD("vcp0", 101, R8A7790_CLK_ZS),
95 DEF_MOD("vpc1", 102, R8A7790_CLK_ZS),
96 DEF_MOD("vpc0", 103, R8A7790_CLK_ZS),
97 DEF_MOD("jpu", 106, R8A7790_CLK_M2),
98 DEF_MOD("ssp1", 109, R8A7790_CLK_ZS),
99 DEF_MOD("tmu1", 111, R8A7790_CLK_P),
100 DEF_MOD("3dg", 112, R8A7790_CLK_ZG),
101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),
[all …]
Dr8a774a1-cpg-mssr.c116 DEF_MOD("tmu4", 121, R8A774A1_CLK_S0D6),
117 DEF_MOD("tmu3", 122, R8A774A1_CLK_S3D2),
118 DEF_MOD("tmu2", 123, R8A774A1_CLK_S3D2),
119 DEF_MOD("tmu1", 124, R8A774A1_CLK_S3D2),
120 DEF_MOD("tmu0", 125, R8A774A1_CLK_CP),
121 DEF_MOD("fdp1-0", 119, R8A774A1_CLK_S0D1),
122 DEF_MOD("scif5", 202, R8A774A1_CLK_S3D4),
123 DEF_MOD("scif4", 203, R8A774A1_CLK_S3D4),
124 DEF_MOD("scif3", 204, R8A774A1_CLK_S3D4),
125 DEF_MOD("scif1", 206, R8A774A1_CLK_S3D4),
[all …]
Dr8a7796-cpg-mssr.c130 DEF_MOD("fdp1-0", 119, R8A7796_CLK_S0D1),
131 DEF_MOD("scif5", 202, R8A7796_CLK_S3D4),
132 DEF_MOD("scif4", 203, R8A7796_CLK_S3D4),
133 DEF_MOD("scif3", 204, R8A7796_CLK_S3D4),
134 DEF_MOD("scif1", 206, R8A7796_CLK_S3D4),
135 DEF_MOD("scif0", 207, R8A7796_CLK_S3D4),
136 DEF_MOD("msiof3", 208, R8A7796_CLK_MSO),
137 DEF_MOD("msiof2", 209, R8A7796_CLK_MSO),
138 DEF_MOD("msiof1", 210, R8A7796_CLK_MSO),
139 DEF_MOD("msiof0", 211, R8A7796_CLK_MSO),
[all …]
Dr8a774b1-cpg-mssr.c113 DEF_MOD("tmu4", 121, R8A774B1_CLK_S0D6),
114 DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2),
115 DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2),
116 DEF_MOD("tmu1", 124, R8A774B1_CLK_S3D2),
117 DEF_MOD("tmu0", 125, R8A774B1_CLK_CP),
118 DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1),
119 DEF_MOD("scif5", 202, R8A774B1_CLK_S3D4),
120 DEF_MOD("scif4", 203, R8A774B1_CLK_S3D4),
121 DEF_MOD("scif3", 204, R8A774B1_CLK_S3D4),
122 DEF_MOD("scif1", 206, R8A774B1_CLK_S3D4),
[all …]
Dr8a7745-cpg-mssr.c81 DEF_MOD("msiof0", 0, R8A7745_CLK_MP),
82 DEF_MOD("vcp0", 101, R8A7745_CLK_ZS),
83 DEF_MOD("vpc0", 103, R8A7745_CLK_ZS),
84 DEF_MOD("tmu1", 111, R8A7745_CLK_P),
85 DEF_MOD("3dg", 112, R8A7745_CLK_ZG),
86 DEF_MOD("2d-dmac", 115, R8A7745_CLK_ZS),
87 DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS),
88 DEF_MOD("tmu3", 121, R8A7745_CLK_P),
89 DEF_MOD("tmu2", 122, R8A7745_CLK_P),
90 DEF_MOD("cmt0", 124, R8A7745_CLK_R),
[all …]
Dr8a7794-cpg-mssr.c87 DEF_MOD("msiof0", 0, R8A7794_CLK_MP),
88 DEF_MOD("vcp0", 101, R8A7794_CLK_ZS),
89 DEF_MOD("vpc0", 103, R8A7794_CLK_ZS),
90 DEF_MOD("jpu", 106, R8A7794_CLK_M2),
91 DEF_MOD("tmu1", 111, R8A7794_CLK_P),
92 DEF_MOD("3dg", 112, R8A7794_CLK_ZG),
93 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS),
94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
95 DEF_MOD("tmu3", 121, R8A7794_CLK_P),
96 DEF_MOD("tmu2", 122, R8A7794_CLK_P),
[all …]
Dr8a7795-cpg-mssr.c128 DEF_MOD("fdp1-2", 117, R8A7795_CLK_S2D1), /* ES1.x */
129 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
130 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1),
131 DEF_MOD("scif5", 202, R8A7795_CLK_S3D4),
132 DEF_MOD("scif4", 203, R8A7795_CLK_S3D4),
133 DEF_MOD("scif3", 204, R8A7795_CLK_S3D4),
134 DEF_MOD("scif1", 206, R8A7795_CLK_S3D4),
135 DEF_MOD("scif0", 207, R8A7795_CLK_S3D4),
136 DEF_MOD("msiof3", 208, R8A7795_CLK_MSO),
137 DEF_MOD("msiof2", 209, R8A7795_CLK_MSO),
[all …]
Dr8a77990-cpg-mssr.c127 DEF_MOD("scif5", 202, R8A77990_CLK_S3D4C),
128 DEF_MOD("scif4", 203, R8A77990_CLK_S3D4C),
129 DEF_MOD("scif3", 204, R8A77990_CLK_S3D4C),
130 DEF_MOD("scif1", 206, R8A77990_CLK_S3D4C),
131 DEF_MOD("scif0", 207, R8A77990_CLK_S3D4C),
132 DEF_MOD("msiof3", 208, R8A77990_CLK_MSO),
133 DEF_MOD("msiof2", 209, R8A77990_CLK_MSO),
134 DEF_MOD("msiof1", 210, R8A77990_CLK_MSO),
135 DEF_MOD("msiof0", 211, R8A77990_CLK_MSO),
136 DEF_MOD("sys-dmac2", 217, R8A77990_CLK_S3D1),
[all …]
Dr8a77470-cpg-mssr.c77 DEF_MOD("msiof0", 0, R8A77470_CLK_MP),
78 DEF_MOD("vcp0", 101, R8A77470_CLK_ZS),
79 DEF_MOD("vpc0", 103, R8A77470_CLK_ZS),
80 DEF_MOD("tmu1", 111, R8A77470_CLK_P),
81 DEF_MOD("3dg", 112, R8A77470_CLK_ZS),
82 DEF_MOD("2d-dmac", 115, R8A77470_CLK_ZS),
83 DEF_MOD("fdp1-0", 119, R8A77470_CLK_ZS),
84 DEF_MOD("tmu3", 121, R8A77470_CLK_P),
85 DEF_MOD("tmu2", 122, R8A77470_CLK_P),
86 DEF_MOD("cmt0", 124, R8A77470_CLK_R),
[all …]
Dr8a774c0-cpg-mssr.c126 DEF_MOD("tmu4", 121, R8A774C0_CLK_S0D6C),
127 DEF_MOD("tmu3", 122, R8A774C0_CLK_S3D2C),
128 DEF_MOD("tmu2", 123, R8A774C0_CLK_S3D2C),
129 DEF_MOD("tmu1", 124, R8A774C0_CLK_S3D2C),
130 DEF_MOD("tmu0", 125, R8A774C0_CLK_CP),
131 DEF_MOD("scif5", 202, R8A774C0_CLK_S3D4C),
132 DEF_MOD("scif4", 203, R8A774C0_CLK_S3D4C),
133 DEF_MOD("scif3", 204, R8A774C0_CLK_S3D4C),
134 DEF_MOD("scif1", 206, R8A774C0_CLK_S3D4C),
135 DEF_MOD("scif0", 207, R8A774C0_CLK_S3D4C),
[all …]
Dr8a7792-cpg-mssr.c80 DEF_MOD("msiof0", 0, R8A7792_CLK_MP),
81 DEF_MOD("jpu", 106, R8A7792_CLK_M2),
82 DEF_MOD("tmu1", 111, R8A7792_CLK_P),
83 DEF_MOD("3dg", 112, R8A7792_CLK_ZG),
84 DEF_MOD("2d-dmac", 115, R8A7792_CLK_ZS),
85 DEF_MOD("tmu3", 121, R8A7792_CLK_P),
86 DEF_MOD("tmu2", 122, R8A7792_CLK_P),
87 DEF_MOD("cmt0", 124, R8A7792_CLK_R),
88 DEF_MOD("tmu0", 125, R8A7792_CLK_CP),
89 DEF_MOD("vsp1du1", 127, R8A7792_CLK_ZS),
[all …]
Dr8a77995-cpg-mssr.c115 DEF_MOD("scif5", 202, R8A77995_CLK_S3D4C),
116 DEF_MOD("scif4", 203, R8A77995_CLK_S3D4C),
117 DEF_MOD("scif3", 204, R8A77995_CLK_S3D4C),
118 DEF_MOD("scif1", 206, R8A77995_CLK_S3D4C),
119 DEF_MOD("scif0", 207, R8A77995_CLK_S3D4C),
120 DEF_MOD("msiof3", 208, R8A77995_CLK_MSO),
121 DEF_MOD("msiof2", 209, R8A77995_CLK_MSO),
122 DEF_MOD("msiof1", 210, R8A77995_CLK_MSO),
123 DEF_MOD("msiof0", 211, R8A77995_CLK_MSO),
124 DEF_MOD("sys-dmac2", 217, R8A77995_CLK_S3D1),
[all …]
Dr8a77980-cpg-mssr.c114 DEF_MOD("tmu4", 121, R8A77980_CLK_S0D6),
115 DEF_MOD("tmu3", 122, R8A77980_CLK_S0D6),
116 DEF_MOD("tmu2", 123, R8A77980_CLK_S0D6),
117 DEF_MOD("tmu1", 124, R8A77980_CLK_S0D6),
118 DEF_MOD("tmu0", 125, R8A77980_CLK_CP),
119 DEF_MOD("scif4", 203, R8A77980_CLK_S3D4),
120 DEF_MOD("scif3", 204, R8A77980_CLK_S3D4),
121 DEF_MOD("scif1", 206, R8A77980_CLK_S3D4),
122 DEF_MOD("scif0", 207, R8A77980_CLK_S3D4),
123 DEF_MOD("msiof3", 208, R8A77980_CLK_MSO),
[all …]
Dr8a77970-cpg-mssr.c110 DEF_MOD("tmu4", 121, R8A77970_CLK_S2D2),
111 DEF_MOD("tmu3", 122, R8A77970_CLK_S2D2),
112 DEF_MOD("tmu2", 123, R8A77970_CLK_S2D2),
113 DEF_MOD("tmu1", 124, R8A77970_CLK_S2D2),
114 DEF_MOD("tmu0", 125, R8A77970_CLK_CP),
115 DEF_MOD("ivcp1e", 127, R8A77970_CLK_S2D1),
116 DEF_MOD("scif4", 203, R8A77970_CLK_S2D4),
117 DEF_MOD("scif3", 204, R8A77970_CLK_S2D4),
118 DEF_MOD("scif1", 206, R8A77970_CLK_S2D4),
119 DEF_MOD("scif0", 207, R8A77970_CLK_S2D4),
[all …]
Dr8a779a0-cpg-mssr.c150 DEF_MOD("scif0", 702, R8A779A0_CLK_S1D8),
151 DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
152 DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
153 DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
Drenesas-cpg-mssr.h75 #define DEF_MOD(_name, _mod, _parent...) \ macro