Searched refs:DMA_RB_CNTL (Results 1 – 12 of 12) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | ni_dma.c | 166 rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); in cayman_dma_stop()
168 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl); in cayman_dma_stop()
171 rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); in cayman_dma_stop()
173 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl); in cayman_dma_stop()
215 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl); in cayman_dma_resume()
246 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl | DMA_RB_ENABLE); in cayman_dma_resume()
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| D | r600_dma.c | 101 u32 rb_cntl = RREG32(DMA_RB_CNTL); in r600_dma_stop()
107 WREG32(DMA_RB_CNTL, rb_cntl); in r600_dma_stop()
136 WREG32(DMA_RB_CNTL, rb_cntl); in r600_dma_resume()
170 WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE); in r600_dma_resume()
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| D | ni.c | 1850 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); in cayman_gpu_soft_reset()
1852 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp); in cayman_gpu_soft_reset()
1857 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); in cayman_gpu_soft_reset()
1859 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp); in cayman_gpu_soft_reset()
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| D | si.c | 3884 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); in si_gpu_soft_reset()
3886 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp); in si_gpu_soft_reset()
3890 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); in si_gpu_soft_reset()
3892 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp); in si_gpu_soft_reset()
4051 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); in si_gpu_pci_config_reset()
4053 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp); in si_gpu_pci_config_reset()
4055 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); in si_gpu_pci_config_reset()
4057 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp); in si_gpu_pci_config_reset()
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| D | nid.h | 1304 #define DMA_RB_CNTL 0xd000 macro
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| D | r600.c | 1709 tmp = RREG32(DMA_RB_CNTL); in r600_gpu_soft_reset()
1711 WREG32(DMA_RB_CNTL, tmp); in r600_gpu_soft_reset()
1840 tmp = RREG32(DMA_RB_CNTL); in r600_gpu_pci_config_reset()
1842 WREG32(DMA_RB_CNTL, tmp); in r600_gpu_pci_config_reset()
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| D | evergreen.c | 3913 tmp = RREG32(DMA_RB_CNTL); in evergreen_gpu_soft_reset()
3915 WREG32(DMA_RB_CNTL, tmp); in evergreen_gpu_soft_reset()
4022 tmp = RREG32(DMA_RB_CNTL); in evergreen_gpu_pci_config_reset()
4024 WREG32(DMA_RB_CNTL, tmp); in evergreen_gpu_pci_config_reset()
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| D | sid.h | 1815 #define DMA_RB_CNTL 0xd000 macro
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| D | evergreend.h | 2618 #define DMA_RB_CNTL 0xd000 macro
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| D | r600d.h | 613 #define DMA_RB_CNTL 0xd000 macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | si_dma.c | 121 rb_cntl = RREG32(DMA_RB_CNTL + sdma_offsets[i]); in si_dma_stop()
123 WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl); in si_dma_stop()
149 WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl); in si_dma_start()
177 WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl | DMA_RB_ENABLE); in si_dma_start()
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| D | sid.h | 1878 #define DMA_RB_CNTL 0x3400 macro
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