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Searched refs:DSPCNTR (Results 1 – 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
Ddisplay.c187 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; in emulate_monitor_status_change()
498 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; in emulate_monitor_status_change()
Dfb_decoder.c213 val = vgpu_vreg_t(vgpu, DSPCNTR(pipe)); in intel_vgpu_decode_primary_plane()
Dhandlers.c769 if (vgpu_vreg_t(vgpu, DSPCNTR(pipe)) & PLANE_CTL_ASYNC_FLIP) in pri_surf_mmio_write()
2085 MMIO_D(DSPCNTR(PIPE_A), D_ALL); in init_generic_mmio_info()
2096 MMIO_D(DSPCNTR(PIPE_B), D_ALL); in init_generic_mmio_info()
2107 MMIO_D(DSPCNTR(PIPE_C), D_ALL); in init_generic_mmio_info()
Dcmd_parser.c1279 info->ctrl_reg = DSPCNTR(info->pipe); in gen8_decode_mi_display_flip()
1345 info->ctrl_reg = DSPCNTR(info->pipe); in skl_decode_mi_display_flip()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_display.c4481 intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr); in i9xx_update_plane()
4514 intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr); in i9xx_disable_plane()
4543 val = intel_de_read(dev_priv, DSPCNTR(i9xx_plane)); in i9xx_plane_get_hw_state()
9331 val = intel_de_read(dev_priv, DSPCNTR(i9xx_plane)); in i9xx_get_initial_plane_config()
9450 tmp = intel_de_read(dev_priv, DSPCNTR(i9xx_plane)); in i9xx_get_pipe_color_config()
18141 intel_de_read(dev_priv, DSPCNTR(PLANE_A)) & in i830_disable_pipe()
18144 intel_de_read(dev_priv, DSPCNTR(PLANE_B)) & in i830_disable_pipe()
18147 intel_de_read(dev_priv, DSPCNTR(PLANE_C)) & in i830_disable_pipe()
19038 error->plane[i].control = intel_de_read(dev_priv, DSPCNTR(i)); in intel_display_capture_error_state()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Dintel_pm.c6874 I915_WRITE(DSPCNTR(pipe), in g4x_disable_trickle_feed()
6875 I915_READ(DSPCNTR(pipe)) | in g4x_disable_trickle_feed()
Di915_reg.h6529 #define DSPCNTR(plane) _MMIO_PIPE2(plane, _DSPACNTR) macro