| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | mvebu-corediv-clock.txt | 1 * Core Divider Clock bindings for Marvell MVEBU SoCs
12 - reg : must be the register address of Core Divider control register
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| D | dove-divider-clock.txt | 18 - reg : shall be the register address of the Core PLL and Clock Divider
20 Core PLL and Clock Divider Control 1 register. Thus, it will have
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | smu7_fusion.h | 162 uint8_t Divider; member
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| D | smu7_discrete.h | 258 uint8_t Divider; member
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| D | kv_dpm.c | 917 pi->vce_level[i].Divider = (u8)dividers.post_div; in kv_populate_vce_table()
980 pi->samu_level[i].Divider = (u8)dividers.post_div; in kv_populate_samu_table()
1039 pi->acp_level[i].Divider = (u8)dividers.post_div; in kv_populate_acp_table()
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| D | ci_dpm.c | 2699 table->VceLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_vce_level()
2732 table->AcpLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_acp_level()
2764 table->SamuLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_samu_level()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
| D | smu7_fusion.h | 162 uint8_t Divider; member
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| D | smu7_discrete.h | 258 uint8_t Divider; member
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| D | smu71_discrete.h | 205 uint8_t Divider; member
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| D | smu74_discrete.h | 198 uint8_t Divider; member
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| D | smu73_discrete.h | 179 uint8_t Divider; member
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| D | smu72_discrete.h | 187 uint8_t Divider; member
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| D | smu75_discrete.h | 213 uint8_t Divider; member
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 36 4: N-Divider output
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| /kernel/linux/linux-5.10/drivers/video/fbdev/aty/ |
| D | atyfb_base.c | 189 int Multiplier, Divider, Remainder; in ATIReduceRatio() local
192 Divider = *Denominator; in ATIReduceRatio()
194 while ((Remainder = Multiplier % Divider)) { in ATIReduceRatio()
195 Multiplier = Divider; in ATIReduceRatio()
196 Divider = Remainder; in ATIReduceRatio()
199 *Numerator /= Divider; in ATIReduceRatio()
200 *Denominator /= Divider; in ATIReduceRatio()
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | vt1211.rst | 96 Voltage R1 R2 Divider Raw Value
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/ |
| D | kv_dpm.c | 1000 pi->vce_level[i].Divider = (u8)dividers.post_div; in kv_populate_vce_table()
1063 pi->samu_level[i].Divider = (u8)dividers.post_div; in kv_populate_samu_table()
1122 pi->acp_level[i].Divider = (u8)dividers.post_div; in kv_populate_acp_table()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | fiji_smumgr.c | 1450 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_vce_level()
1486 table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_acp_level()
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| D | ci_smumgr.c | 1582 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_vce_level()
1612 table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_acp_level()
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| D | tonga_smumgr.c | 1405 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_vce_level()
1449 table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_acp_level()
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| D | vegam_smumgr.c | 1237 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_vce_level()
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| D | polaris10_smumgr.c | 1329 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_vce_level()
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| /kernel/linux/linux-5.10/Documentation/virt/kvm/ |
| D | timekeeping.rst | 231 bit 6-4 = Divider for clock
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0022_linux_drivers_i2c.patch | 2103 - /* Divider value calculation */
2113 + /* Divider value calculation */
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| D | 0015_linux_drivers_clk.patch | 1028 + * Monitor control for the Audio PLL K-Divider
5442 +/* PLLDIG PLL Divider Register (PLLDIG_PLLDV) */
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