Searched refs:EMIF_SDRAM_TIMING_3_SHDW (Results 1 – 3 of 3) sorted by relevance
128 #define EMIF_SDRAM_TIMING_3_SHDW 0x002c macro
163 str r1, [r0, #EMIF_SDRAM_TIMING_3_SHDW]
905 writel(tim3, base + EMIF_SDRAM_TIMING_3_SHDW); in setup_temperature_sensitive_regs()