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Searched refs:ENABLE_CONTEXT (Results 1 – 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_0.c184 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v1_0_enable_system_domain()
224 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v1_0_setup_vmid_config()
Dgfxhub_v2_0.c261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v2_0_enable_system_domain()
293 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v2_0_setup_vmid_config()
Dgfxhub_v2_1.c261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v2_1_enable_system_domain()
299 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v2_1_setup_vmid_config()
Dmmhub_v2_0.c307 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v2_0_enable_system_domain()
348 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v2_0_setup_vmid_config()
Dmmhub_v1_0.c203 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_0_enable_system_domain()
247 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_0_setup_vmid_config()
Dgmc_v7_0.c660 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v7_0_gart_enable()
690 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gmc_v7_0_gart_enable()
Dgmc_v8_0.c909 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v8_0_gart_enable()
939 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gmc_v8_0_gart_enable()
Dmmhub_v9_4.c265 tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v9_4_enable_system_domain()
308 ENABLE_CONTEXT, 1); in mmhub_v9_4_setup_vmid_config()
Dsid.h394 #define ENABLE_CONTEXT (1 << 0) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Drv770d.h635 #define ENABLE_CONTEXT (1 << 0) macro
Dnid.h128 #define ENABLE_CONTEXT (1 << 0) macro
Dni.c1311 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in cayman_pcie_gart_enable()
1335 WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | in cayman_pcie_gart_enable()
Dsid.h393 #define ENABLE_CONTEXT (1 << 0) macro
Dcikd.h511 #define ENABLE_CONTEXT (1 << 0) macro
Drv770.c932 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in rv770_pcie_gart_enable()
Devergreend.h1137 #define ENABLE_CONTEXT (1 << 0) macro
Dr600d.h574 #define ENABLE_CONTEXT (1 << 0) macro
Dsi.c4322 WREG32(VM_CONTEXT0_CNTL, (ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in si_pcie_gart_enable()
4350 WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | in si_pcie_gart_enable()
Dcik.c5466 WREG32(VM_CONTEXT0_CNTL, (ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in cik_pcie_gart_enable()
5490 WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | in cik_pcie_gart_enable()
Dr600.c1172 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in r600_pcie_gart_enable()
Devergreen.c2441 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in evergreen_pcie_gart_enable()