Searched refs:ENGINE_WRITE (Results 1 – 7 of 7) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
D | intel_ring_submission.c | 140 ENGINE_WRITE(engine, RING_INSTPM, in flush_cs_tlb() 165 ENGINE_WRITE(engine, in stop_ring() 187 ENGINE_WRITE(engine, RING_HEAD, ENGINE_READ(engine, RING_TAIL)); in stop_ring() 189 ENGINE_WRITE(engine, RING_HEAD, 0); in stop_ring() 190 ENGINE_WRITE(engine, RING_TAIL, 0); in stop_ring() 193 ENGINE_WRITE(engine, RING_CTL, 0); in stop_ring() 216 ENGINE_WRITE(engine, RING_PP_DIR_DCLV, PP_DIR_DCLV_2G); in set_pp_dir() 217 ENGINE_WRITE(engine, RING_PP_DIR_BASE, pp_dir(vm)); in set_pp_dir() 273 ENGINE_WRITE(engine, RING_START, i915_ggtt_offset(ring->vma)); in xcs_resume() 283 ENGINE_WRITE(engine, RING_HEAD, ring->head); in xcs_resume() [all …]
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D | gen6_engine_cs.c | 426 ENGINE_WRITE(engine, RING_IMR, in gen6_irq_enable() 437 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen6_irq_disable() 443 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask); in hsw_irq_enable_vecs() 453 ENGINE_WRITE(engine, RING_IMR, ~0); in hsw_irq_disable_vecs()
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D | intel_gt_irq.c | 37 ENGINE_WRITE(engine, RING_EMR, ~0u); in cs_irq_handler() 38 ENGINE_WRITE(engine, RING_EIR, eir); in cs_irq_handler()
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D | intel_engine.h | 76 #define ENGINE_WRITE(...) __ENGINE_WRITE_OP(write, __VA_ARGS__) macro
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D | gen6_ppgtt.c | 47 ENGINE_WRITE(engine, in gen7_ppgtt_enable()
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D | intel_lrc.c | 4027 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers() 4050 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers() 4089 ENGINE_WRITE(engine, RING_EMR, ~0u); in enable_error_interrupt() 4090 ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */ in enable_error_interrupt() 4124 ENGINE_WRITE(engine, RING_EMR, ~I915_ERROR_INSTRUCTION); in enable_error_interrupt() 4523 ENGINE_WRITE(engine, RING_IMR, in gen8_logical_ring_enable_irq() 4530 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen8_logical_ring_disable_irq()
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D | intel_engine_cs.c | 264 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
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