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Searched refs:GATE_PERI0 (Results 1 – 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8135.c440 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
460 GATE_PERI0(CLK_PERI_I2C5, "i2c5_ck", "axi_sel", 31),
461 GATE_PERI0(CLK_PERI_I2C4, "i2c4_ck", "axi_sel", 30),
462 GATE_PERI0(CLK_PERI_I2C3, "i2c3_ck", "axi_sel", 29),
463 GATE_PERI0(CLK_PERI_I2C2, "i2c2_ck", "axi_sel", 28),
464 GATE_PERI0(CLK_PERI_I2C1, "i2c1_ck", "axi_sel", 27),
465 GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 26),
466 GATE_PERI0(CLK_PERI_UART3, "uart3_ck", "axi_sel", 25),
467 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24),
468 GATE_PERI0(CLK_PERI_UART1, "uart1_ck", "axi_sel", 23),
[all …]
Dclk-mt7622.c88 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
475 GATE_PERI0(CLK_PERI_THERM_PD, "peri_therm_pd", "axi_sel", 1),
476 GATE_PERI0(CLK_PERI_PWM1_PD, "peri_pwm1_pd", "clkxtal", 2),
477 GATE_PERI0(CLK_PERI_PWM2_PD, "peri_pwm2_pd", "clkxtal", 3),
478 GATE_PERI0(CLK_PERI_PWM3_PD, "peri_pwm3_pd", "clkxtal", 4),
479 GATE_PERI0(CLK_PERI_PWM4_PD, "peri_pwm4_pd", "clkxtal", 5),
480 GATE_PERI0(CLK_PERI_PWM5_PD, "peri_pwm5_pd", "clkxtal", 6),
481 GATE_PERI0(CLK_PERI_PWM6_PD, "peri_pwm6_pd", "clkxtal", 7),
482 GATE_PERI0(CLK_PERI_PWM7_PD, "peri_pwm7_pd", "clkxtal", 8),
483 GATE_PERI0(CLK_PERI_PWM_PD, "peri_pwm_pd", "clkxtal", 9),
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Dclk-mt2701.c804 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
823 GATE_PERI0(CLK_PERI_USB0_MCU, "usb0_mcu_ck", "axi_sel", 31),
824 GATE_PERI0(CLK_PERI_ETH, "eth_ck", "clk26m", 30),
825 GATE_PERI0(CLK_PERI_SPI0, "spi0_ck", "spi0_sel", 29),
826 GATE_PERI0(CLK_PERI_AUXADC, "auxadc_ck", "clk26m", 28),
827 GATE_PERI0(CLK_PERI_I2C3, "i2c3_ck", "clk26m", 27),
828 GATE_PERI0(CLK_PERI_I2C2, "i2c2_ck", "axi_sel", 26),
829 GATE_PERI0(CLK_PERI_I2C1, "i2c1_ck", "axi_sel", 25),
830 GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 24),
831 GATE_PERI0(CLK_PERI_BTIF, "bitif_ck", "axi_sel", 23),
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Dclk-mt8173.c661 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
681 GATE_PERI0(CLK_PERI_NFI, "peri_nfi", "axi_sel", 0),
682 GATE_PERI0(CLK_PERI_THERM, "peri_therm", "axi_sel", 1),
683 GATE_PERI0(CLK_PERI_PWM1, "peri_pwm1", "axi_sel", 2),
684 GATE_PERI0(CLK_PERI_PWM2, "peri_pwm2", "axi_sel", 3),
685 GATE_PERI0(CLK_PERI_PWM3, "peri_pwm3", "axi_sel", 4),
686 GATE_PERI0(CLK_PERI_PWM4, "peri_pwm4", "axi_sel", 5),
687 GATE_PERI0(CLK_PERI_PWM5, "peri_pwm5", "axi_sel", 6),
688 GATE_PERI0(CLK_PERI_PWM6, "peri_pwm6", "axi_sel", 7),
689 GATE_PERI0(CLK_PERI_PWM7, "peri_pwm7", "axi_sel", 8),
[all …]
Dclk-mt7629.c70 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
455 GATE_PERI0(CLK_PERI_PWM1_PD, "peri_pwm1_pd", "pwm_qtr_26m", 2),
456 GATE_PERI0(CLK_PERI_PWM2_PD, "peri_pwm2_pd", "pwm_qtr_26m", 3),
457 GATE_PERI0(CLK_PERI_PWM3_PD, "peri_pwm3_pd", "pwm_qtr_26m", 4),
458 GATE_PERI0(CLK_PERI_PWM4_PD, "peri_pwm4_pd", "pwm_qtr_26m", 5),
459 GATE_PERI0(CLK_PERI_PWM5_PD, "peri_pwm5_pd", "pwm_qtr_26m", 6),
460 GATE_PERI0(CLK_PERI_PWM6_PD, "peri_pwm6_pd", "pwm_qtr_26m", 7),
461 GATE_PERI0(CLK_PERI_PWM7_PD, "peri_pwm7_pd", "pwm_qtr_26m", 8),
462 GATE_PERI0(CLK_PERI_PWM_PD, "peri_pwm_pd", "pwm_qtr_26m", 9),
463 GATE_PERI0(CLK_PERI_AP_DMA_PD, "peri_ap_dma_pd", "faxi", 12),
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Dclk-mt2712.c1037 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
1066 GATE_PERI0(CLK_PERI_NFI, "per_nfi",
1068 GATE_PERI0(CLK_PERI_THERM, "per_therm",
1070 GATE_PERI0(CLK_PERI_PWM0, "per_pwm0",
1072 GATE_PERI0(CLK_PERI_PWM1, "per_pwm1",
1074 GATE_PERI0(CLK_PERI_PWM2, "per_pwm2",
1076 GATE_PERI0(CLK_PERI_PWM3, "per_pwm3",
1078 GATE_PERI0(CLK_PERI_PWM4, "per_pwm4",
1080 GATE_PERI0(CLK_PERI_PWM5, "per_pwm5",
1082 GATE_PERI0(CLK_PERI_PWM6, "per_pwm6",
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