Searched refs:GICD_ITARGETSR (Results 1 – 4 of 4) sorted by relevance
68 GIC_REG_8(GICD_ITARGETSR(offset) + index) = cpuMask; in HalIrqSetAffinity()129 GIC_REG_32(GICD_ITARGETSR(i / 4)) = 0x01010101; in HalIrqInit()
71 #define GICD_ITARGETSR(n) (GICD_OFFSET + 0x800 + (n) * 4) /* Interrupt Processor Targ… macro
53 #define GICD_ITARGETSR 0x0800 macro
585 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ITARGETSR,