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Searched refs:ICC_SRE_EL1 (Results 1 – 2 of 2) sorted by relevance

/kernel/liteos_a/arch/arm/include/
Dgic_v3.h45 #define ICC_SRE_EL1 "S3_0_C12_C12_5" macro
151 __asm__ volatile("mrs %0, " ICC_SRE_EL1 : "=r"(temp)); in GiccGetSre()
161 __asm__ volatile("msr " ICC_SRE_EL1 ", %0" ::"r"(val)); in GiccSetSre()
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/
Dvgic-v3-sr.c271 write_gicreg(0, ICC_SRE_EL1); in __vgic_v3_activate_traps()
319 write_gicreg(1, ICC_SRE_EL1); in __vgic_v3_deactivate_traps()