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Searched refs:ICC_SRE_EL3 (Results 1 – 3 of 3) sorted by relevance

/kernel/liteos_a/arch/arm/include/
Dgic_v3.h56 #define ICC_SRE_EL3 "S3_6_C12_C12_5" macro
149 __asm__ volatile("mrs %0, " ICC_SRE_EL3 : "=r"(temp)); in GiccGetSre()
159 __asm__ volatile("msr " ICC_SRE_EL3 ", %0" ::"r"(val)); in GiccSetSre()
/kernel/linux/linux-5.10/Documentation/translations/zh_CN/arm64/
Dbooting.txt193 ICC_SRE_EL3.Enable (位 3) 必须初始化为 0b1。
194 ICC_SRE_EL3.SRE (位 0) 必须初始化为 0b1。
202 ICC_SRE_EL3.SRE (位 0) 必须初始化为 0b0。
/kernel/linux/linux-5.10/Documentation/arm64/
Dbooting.rst217 - ICC_SRE_EL3.Enable (bit 3) must be initialiased to 0b1.
218 - ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1.
235 ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b0.