Searched refs:ISB (Results 1 – 21 of 21) sorted by relevance
| /kernel/liteos_a/arch/arm/include/ |
| D | gic_v3.h | 119 ISB; in GiccSetCtlr()
125 ISB; in GiccSetPmr()
132 ISB; in GiccSetIgrpen0()
142 ISB; in GiccSetIgrpen1()
163 ISB; in GiccSetSre()
173 ISB; in GiccSetEoir()
193 ISB; in GiccSetSgi1r()
200 ISB; in GiccSetBpr0()
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| /kernel/liteos_a/arch/arm/arm/include/ |
| D | los_hw_cpu.h | 53 #define ISB __asm__ volatile("isb" ::: "memory") macro
69 ISB; \
82 ISB; \
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| D | los_tlb_v6.h | 56 ISB; in OsArmInvalidateTlbBarrier()
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| /kernel/liteos_a/arch/arm/arm/src/pmu/ |
| D | armv7_pmu.c | 51 ISB; in Armv7PmncWrite()
73 ISB; in Armv7PmuSelCnt()
114 ISB; in Armv7EnableCntInterrupt()
123 ISB; in Armv7DisableCntInterrupt()
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| /kernel/liteos_a/arch/arm/arm/src/ |
| D | los_arch_mmu.c | 942 ISB; in LOS_ArchMmuContextSwitch()
945 ISB; in LOS_ArchMmuContextSwitch()
947 ISB; in LOS_ArchMmuContextSwitch()
951 ISB; in LOS_ArchMmuContextSwitch()
996 ISB; in OsSwitchTmpTTB()
1106 ISB; in OsKSectionNewAttrEnable()
1121 ISB; in OsArchMmuInitPerCPU()
1123 ISB; in OsArchMmuInitPerCPU()
1125 ISB; in OsArchMmuInitPerCPU()
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| /kernel/liteos_a/arch/arm/gic/ |
| D | gic_v3.c | 163 ISB; in GicrSetWaker()
300 ISB; in HalIrqClear()
363 ISB; in HalIrqInit()
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| D | los_dispatch.S | 86 ISB
122 ISB
210 ISB
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| D | los_dispatch.S | 86 ISB
122 ISB
210 ISB
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| D | los_dispatch.S | 71 ISB
229 ISB
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| D | los_dispatch.S | 71 ISB
229 ISB
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | proc-v6.S | 61 mcr p15, 0, r1, c7, c5, 4 @ ISB
170 mcr p15, 0, ip, c7, c5, 4 @ ISB
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| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| D | los_dispatch.S | 99 ISB
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| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| D | los_dispatch.S | 122 ISB
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| D | los_dispatch.S | 122 ISB
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| D | los_dispatch.S | 122 ISB
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| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| D | los_dispatch.S | 122 ISB
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| /kernel/liteos_a/arch/arm/arm/src/startup/ |
| D | reset_vector_up.S | 118 ISB
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| D | reset_vector_mp.S | 138 ISB
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| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| D | head.S | 962 mcr p15, 0, r0, c7, c5, 4 @ ISB
966 mcr p15, 0, r0, c7, c5, 4 @ ISB
1266 mcr p15, 0, r0, c7, c5, 4 @ ISB
1348 mcr p15, 0, r10, c7, c5, 4 @ ISB
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| /kernel/linux/linux-5.10/arch/arm64/ |
| D | Kconfig | 725 bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
808 to SCTLR_ELn[M]=0. Prefix an ISB instruction to fix the problem.
1342 strongly recommended to use the ISB, DSB, and DMB
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| /kernel/linux/linux-5.10/arch/arm/ |
| D | Kconfig | 1031 to deadlock. This workaround puts DSB before executing ISB if
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