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Searched refs:LCPLL_CTL (Results 1 – 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_cdclk.c418 u32 lcpll = intel_de_read(dev_priv, LCPLL_CTL); in hsw_get_cdclk()
702 u32 lcpll = intel_de_read(dev_priv, LCPLL_CTL); in bdw_get_cdclk()
735 (intel_de_read(dev_priv, LCPLL_CTL) & in bdw_set_cdclk()
751 val = intel_de_read(dev_priv, LCPLL_CTL); in bdw_set_cdclk()
753 intel_de_write(dev_priv, LCPLL_CTL, val); in bdw_set_cdclk()
759 if (wait_for_us(intel_de_read(dev_priv, LCPLL_CTL) & in bdw_set_cdclk()
763 val = intel_de_read(dev_priv, LCPLL_CTL); in bdw_set_cdclk()
784 intel_de_write(dev_priv, LCPLL_CTL, val); in bdw_set_cdclk()
786 val = intel_de_read(dev_priv, LCPLL_CTL); in bdw_set_cdclk()
788 intel_de_write(dev_priv, LCPLL_CTL, val); in bdw_set_cdclk()
[all …]
Dintel_display_power.c4789 u32 val = intel_de_read(dev_priv, LCPLL_CTL); in hsw_assert_cdclk()
4883 val = intel_de_read(dev_priv, LCPLL_CTL); in hsw_disable_lcpll()
4887 intel_de_write(dev_priv, LCPLL_CTL, val); in hsw_disable_lcpll()
4889 if (wait_for_us(intel_de_read(dev_priv, LCPLL_CTL) & in hsw_disable_lcpll()
4893 val = intel_de_read(dev_priv, LCPLL_CTL); in hsw_disable_lcpll()
4897 intel_de_write(dev_priv, LCPLL_CTL, val); in hsw_disable_lcpll()
4898 intel_de_posting_read(dev_priv, LCPLL_CTL); in hsw_disable_lcpll()
4900 if (intel_de_wait_for_clear(dev_priv, LCPLL_CTL, LCPLL_PLL_LOCK, 1)) in hsw_disable_lcpll()
4913 val = intel_de_read(dev_priv, LCPLL_CTL); in hsw_disable_lcpll()
4915 intel_de_write(dev_priv, LCPLL_CTL, val); in hsw_disable_lcpll()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
Dhandlers.c2381 MMIO_DH(LCPLL_CTL, D_ALL, NULL, lcpll_ctl_mmio_write); in init_generic_mmio_info()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_reg.h10167 #define LCPLL_CTL _MMIO(0x130040) macro