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Searched refs:MCLK (Results 1 – 25 of 53) sorted by relevance

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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dmt8173-rt5650.txt16 - mediatek,mclk: the MCLK source
17 0 : external oscillator, MCLK = 12.288M
18 1 : internal source from mt8173, MCLK = sampling rate*256
Dcs42l56.txt20 Frequency = MCLK / 4 * (N+2)
22 MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
Dtas2552.txt18 tas2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or use the
20 reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK.
Dst,stm32-sai.txt34 If the SAI shares a master clock, with another SAI set as MCLK
37 Must also contain "MCLK", if SAI shares a master clock,
38 with a SAI set as MCLK clock provider.
Dmaxim,max98088.txt12 - clocks: the clock provider of MCLK, see ../clock/clock-bindings.txt section
Dmax9860.txt14 - clocks : A clock specifier for the clock connected as MCLK.
Dda7213.txt10 - clocks : phandle and clock specifier for codec MCLK.
Dcs4271.txt24 The CS4271 requires its LRCLK and MCLK to be stable before its RESET
Dtas571x.txt22 - clocks: clock phandle for the MCLK input
Dcs43130.txt20 When external MCLK is generated by external crystal
Drt5682.txt38 - clocks : phandle and clock specifier for codec MCLK.
Domap-abe-twl6040.txt6 - ti,mclk-freq: MCLK frequency for HPPLL operation
Dnau8825.txt76 - clock-names: should include "mclk" for the MCLK master clock
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dpxa-camera.txt12 sensor master clock MCLK
13 - clock-frequency: host interface is driving MCLK, and MCLK rate is this rate
/kernel/linux/linux-5.10/sound/soc/meson/
Daiu-encoder-spdif.c144 ret = clk_set_rate(aiu->spdif.clks[MCLK].clk, mrate); in aiu_encoder_spdif_hw_params()
183 ret = clk_set_parent(aiu->spdif.clks[MCLK].clk, in aiu_encoder_spdif_startup()
Daiu-encoder-i2s.c153 fs = DIV_ROUND_CLOSEST(clk_get_rate(aiu->i2s.clks[MCLK].clk), srate); in aiu_encoder_i2s_set_clocks()
279 ret = clk_set_rate(aiu->i2s.clks[MCLK].clk, freq); in aiu_encoder_i2s_set_sysclk()
Daiu.h20 MCLK, enumerator
Daiu.c205 [MCLK] = "i2s_mclk",
212 [MCLK] = "spdif_mclk_sel"
/kernel/linux/linux-5.10/Documentation/sound/soc/
Dclocking.rst12 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
34 - BCLK = MCLK / x, or
/kernel/linux/linux-5.10/arch/arm/mach-ebsa110/
Dcore.c140 #define MCLK 47894000 macro
145 #define CLKBY7 (MCLK / 7)
/kernel/linux/linux-5.10/drivers/spi/
Dspi-mpc52xx-psc.c27 #define MCLK 20000000 /* PSC port MClk in hz */ macro
104 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
106 ccr |= (MCLK / 1000000 - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
315 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK; in mpc52xx_psc_spi_port_config()
/kernel/linux/linux-5.10/drivers/media/pci/ddbridge/
Dddbridge-sx8.c23 static const u32 MCLK = (1550000000 / 12); variable
196 if (p->symbol_rate >= (MCLK / 2)) in start()
218 if (p->symbol_rate >= MCLK / 2) { in start()
253 i = (p->symbol_rate > (MCLK / 2)) ? 3 : 7; in start()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dsii902x.txt31 Describes SII902x MCLK input. MCLK can be used to produce
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp15xx-dkx.dtsi77 "Playback" , "MCLK",
78 "Capture" , "MCLK",
205 clock-names = "MCLK";
491 clock-names = "sai_ck", "MCLK";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dtwl6040.txt23 - clock-names: Must be "clk32k" for the 32K clock and "mclk" for the MCLK.

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