Searched refs:MISS (Results 1 – 8 of 8) sorted by relevance
| /kernel/linux/linux-5.10/tools/perf/util/ |
| D | mem-events.c | 404 if ((lvl & P(LVL, MISS))) in c2c_decode_stats()
420 if (lvl & P(LVL, MISS)) in c2c_decode_stats()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/amd/ |
| D | ariadne.c | 285 if (csr0 & MISS) in ariadne_interrupt()
368 if (csr0 & MISS) { in ariadne_interrupt()
383 lance->RDP = INEA | BABL | CERR | MISS | MERR | IDON; in ariadne_interrupt()
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| D | ariadne.h | 182 #define MISS 0x0010 /* Missed Frame */ macro
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| /kernel/linux/linux-5.10/arch/x86/events/intel/ |
| D | ds.c | 59 #define SNOOP_NONE_MISS (P(SNOOP, NONE) | P(SNOOP, MISS))
63 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
68 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, MISS), /* 0x05: L3 hit, snoop miss */
115 val |= P(TLB, MISS); in precise_store_data()
127 val |= P(LVL, MISS); in precise_store_data()
191 val |= P(TLB, MISS) | P(TLB, L2); in load_latency_data()
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| D | p4.c | 98 P4_ESCR_EMASK_BIT(P4_EVENT_ITLB_REFERENCE, MISS) |
549 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, MISS,
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| /kernel/linux/linux-5.10/arch/powerpc/perf/ |
| D | isa207-common.h | 263 #define PM(a, b) (P(LVL, MISS) | P(a, b))
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| /kernel/linux/linux-5.10/Documentation/admin-guide/device-mapper/ |
| D | cache-policies.rst | 12 The policy can return a simple HIT or MISS or issue a migration.
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| /kernel/linux/linux-5.10/arch/x86/include/asm/ |
| D | perf_event_p4.h | 606 P4_GEN_ESCR_EMASK(P4_EVENT_ITLB_REFERENCE, MISS, 1),
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