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Searched refs:MSR_TYPE_RW (Results 1 – 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/arch/x86/kvm/vmx/
Dvmx.c2136 MSR_TYPE_RW); in vmx_set_msr()
3922 vmx_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW, in vmx_update_msr_bitmap_x2apic()
3926 vmx_enable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TMCCT), MSR_TYPE_RW); in vmx_update_msr_bitmap_x2apic()
3953 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_STATUS, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3954 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_BASE, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3955 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3956 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_CR3_MATCH, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3958 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_A + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3959 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_B + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
7007 vmx_disable_intercept_for_msr(vcpu, MSR_FS_BASE, MSR_TYPE_RW); in vmx_create_vcpu()
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Dvmx.h22 #define MSR_TYPE_RW 3 macro
Dnested.c624 MSR_FS_BASE, MSR_TYPE_RW); in nested_vmx_prepare_msr_bitmap()
627 MSR_GS_BASE, MSR_TYPE_RW); in nested_vmx_prepare_msr_bitmap()
630 MSR_KERNEL_GS_BASE, MSR_TYPE_RW); in nested_vmx_prepare_msr_bitmap()