Searched refs:OPP (Results 1 – 25 of 32) sorted by relevance
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2 Operating Performance Points (OPP) Library10 2. Initial OPP List Registration11 3. OPP Search Functions12 4. OPP Availability Control Functions13 5. OPP Data Retrieval Functions19 1.1 What is an Operating Performance Point (OPP)?48 OPP library provides a set of helper functions to organize and query the OPP50 is located in include/linux/pm_opp.h. OPP library can be enabled by enabling51 CONFIG_PM_OPP from power management menuconfig menu. OPP library depends on53 optionally boot at a certain OPP without needing cpufreq.[all …]
1 Generic OPP (Operating Performance Points) Bindings10 This document contain multiple versions of OPP binding and only one of them45 phandle to a OPP table in their DT node. The OPP core will use this phandle to50 phandle is available, then the same OPP table will be used for all power domains57 * OPP Table Node66 - OPP nodes: One or more OPP nodes describing voltage-current-frequency68 reference an OPP.71 - opp-shared: Indicates that device nodes using this OPP Table Node's phandle74 but they share OPP tables.76 - status: Marks the OPP table enabled/disabled.[all …]
1 Texas Instruments OMAP compatible OPP supply description7 an OPP transitions.11 to the vdd-supply and clk when making an OPP transition. By supplying two12 regulators to the device that will undergo OPP transitions we can make use13 of the multi regulator binding that is part of the OPP core described here [1]25 "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB34 volt: voltage in uV - reference voltage (OPP voltage)36 - ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply.52 /* OMAP OPP Supply with Class0 registers */
1 Qualcomm OPP bindings to describe OPP nodes7 * OPP Table Node13 * OPP Node17 associated with this OPP node. Sometimes several corners/levels shares
1 Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings5 the CPU frequencies subset and voltage value of each OPP varies based on11 to provide the OPP framework with required information (existing HW bitmap).12 This is used to determine the voltage and frequency value for each OPP of13 operating-points-v2 table when it is parsed by the OPP framework.45 In every OPP node:
54 - required-opps: This contains phandle to an OPP node in another device's OPP56 OPP of a different device. It should not contain multiple phandles to the OPP57 nodes in the same OPP table. This specifies the minimum required OPP of the58 device(s), whose OPP's phandle is present in this property, for the59 functioning of the current device at the current OPP (where this property is63 - OPP table for domain provider that provides two domains.
25 because of the OPP density, we can only choose an OPP with a power27 losing performance. In other words, one OPP under-utilizes the CPU28 with a power less than the requested power budget and the next OPP29 exceeds the power budget. An intermediate OPP could have been used if41 The Operating Performance Point (OPP) density has a great influence on43 plethora of OPP density, and some have large power gap between OPPs,47 At a specific OPP, we can assume that injecting idle cycle on all CPUs52 relation with the OPP’s sustainable power and can be computed with a55 Power(IdleCycle) = Coef x Power(OPP)151 because we don’t want to change the OPP. We can group the[all …]
8 is called Operating Performance Point or OPP. The actual definitions9 of OPP varies over silicon within the same family of devices.11 OPP layer organizes the data internally using device pointers
1 TI CPUFreq and OPP bindings7 provide the OPP framework with supported hardware information. This is9 when it is parsed by the OPP framework.30 1. Which revision of the SoC the OPP is supported by31 2. Which eFuse bits indicate this OPP is available34 matches, the OPP gets enabled.
1 i.MX CPUFreq-DT OPP bindings6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
21 matches, the OPP gets enabled.
5 from the SoC, then supplies the OPP framework with 'prop' and 'supported
26 When OPP is used with the devfreq device, it is recommended to27 register devfreq's nb to the OPP's notifier head. If OPP is28 used with the devfreq device, you may use OPP helper75 devfreq device uses the OPP table to get the frequency/voltage.91 and adjusts the operating frequencies and voltages with OPP support.122 operating frequencies and voltages with OPP support.132 frequencies and voltages with OPP support.
17 3. CPUFreq Table Generation with Operating Performance Point (OPP)83 3. CPUFreq Table Generation with Operating Performance Point (OPP)85 For details about OPP, see Documentation/power/opp.rst89 the OPP layer's internal information about the available frequencies
118 DSPBridge expresses target DSP performance levels in terms of OPP IDs.137 Customizing OPP for platform139 Defining CONFIG_PM should enable OPP layer for the silicon140 and the registration of OPP table should take place automatically.141 However, in special cases, the default OPP table may need to be146 * Disable an unsupported OPP on the platform
420 #define OPP(freq) \ macro427 OPP(456),428 OPP(408),429 OPP(372),430 OPP(300),431 OPP(200),432 OPP(96),
13 /* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
4 or other device. Each OPP of a device corresponds to a "corner" that has48 Definition: A phandle to the OPP table containing the
161 The CPU capacity and power cost associated with each OPP is listed in181 Current OPP: ===== Other OPP: - - - util_avg (100 each): ##261 result in raising the OPP of the entire performance domain, and that will265 which will keep running at a lower OPP. So, when considering the total energy267 smaller than the cost of raising the OPP on the little CPUs for all the other388 EAS tries to predict at which OPP will the CPUs be running in the close future
25 physically able to attain the higher Operating Performance Points (OPP).152 directly impacted by the current OPP the CPU is running at. Consider running a
28 * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
20 * to support 1GHz OPP so enable it for PG 2.0 on this board.
179 * can't enable more than one OPP by default, since the controller sometimes
24 - operating-points-v2: optional phandle to the OPP operating points
98 <&A53_0 0 1>; /* Exclude highest OPP */