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Searched refs:PACKET3_SET_CONTEXT_REG (Results 1 – 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h262 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dsoc15d.h288 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dnvd.h321 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dvid.h342 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dcikd.h460 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dgfx_v7_0.c2557 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_cp_gfx_start()
2565 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start()
2576 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start()
3999 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_get_csb_buffer()
4009 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_get_csb_buffer()
Dgfx_v6_0.c2061 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v6_0_cp_gfx_start()
2075 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v6_0_cp_gfx_start()
2895 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v6_0_get_csb_buffer()
2905 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v6_0_get_csb_buffer()
Dsid.h1848 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dgfx_v8_0.c1266 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v8_0_get_csb_buffer()
1277 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_get_csb_buffer()
4205 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v8_0_cp_gfx_start()
4215 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_cp_gfx_start()
Dgfx_v10_0.c4000 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v10_0_get_csb_buffer()
4013 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v10_0_get_csb_buffer()
5791 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v10_0_cp_gfx_start()
5803 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v10_0_cp_gfx_start()
Dgfx_v9_0.c1733 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v9_0_get_csb_buffer()
3226 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v9_0_cp_gfx_start()
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dnid.h1272 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dsi.c3609 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in si_cp_start()
4576 case PACKET3_SET_CONTEXT_REG: in si_vm_packet3_gfx_check()
4679 case PACKET3_SET_CONTEXT_REG: in si_vm_packet3_compute_check()
5737 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in si_get_csb_buffer()
5747 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in si_get_csb_buffer()
Dsid.h1785 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dcikd.h1928 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Devergreen_cs.c2317 case PACKET3_SET_CONTEXT_REG: in evergreen_packet3_check()
3396 case PACKET3_SET_CONTEXT_REG: in evergreen_vm_packet3_check()
Devergreend.h1668 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dr600d.h1689 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dr600_cs.c1922 case PACKET3_SET_CONTEXT_REG: in r600_packet3_check()
Dcik.c4023 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in cik_cp_gfx_start()
6732 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in cik_get_csb_buffer()
6742 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in cik_get_csb_buffer()