Searched refs:PXA1928_CLK_SDH0 (Results 1 – 2 of 2) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/mmp/ |
| D | clk-of-pxa1928.c | 151 …dh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_SDH0 * 4, 8, 2, 0,…
155 {0, "sdh_div", "sdh_mux", 0, PXA1928_CLK_SDH0 * 4, 10, 4, CLK_DIVIDER_ONE_BASED, &sdh0_lock},
162 …{PXA1928_CLK_SDH0, "sdh0_clk", "sdh_div", CLK_SET_RATE_PARENT, PXA1928_CLK_SDH0 * 4, 0x1b, 0x1b, 0…
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | marvell,pxa1928.h | 43 #define PXA1928_CLK_SDH0 0x15 macro
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