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Searched refs:QM_ARUSER_M_CFG_ENABLE (Results 1 – 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/crypto/hisilicon/
Dqm.h28 #define QM_ARUSER_M_CFG_ENABLE 0x100090 macro
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/zip/
Dzip_main.c258 writel(ARUSER_M_CFG_ENABLE, base + QM_ARUSER_M_CFG_ENABLE); in hisi_zip_set_user_domain_and_cache()
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/sec2/
Dsec_main.c331 writel(ARUSER_M_CFG_ENABLE, qm->io_base + QM_ARUSER_M_CFG_ENABLE); in sec_set_user_domain_and_cache()
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/hpre/
Dhpre_main.c264 writel(HPRE_QM_USR_CFG_MASK, HPRE_ADDR(qm, QM_ARUSER_M_CFG_ENABLE)); in hpre_set_user_domain_and_cache()