Searched refs:REG_EDP_HSYNC_VSYNC_WIDTH_POLARITY (Results 1 – 2 of 2) sorted by relevance
127 #define REG_EDP_HSYNC_VSYNC_WIDTH_POLARITY 0x00000024 macro
1331 edp_write(ctrl->base + REG_EDP_HSYNC_VSYNC_WIDTH_POLARITY, data); in msm_edp_ctrl_timing_cfg()