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Searched refs:REG_WAIT (Results 1 – 24 of 24) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.c87 REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dce_dmcu_load_iram()
111 REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dce_get_dmcu_psr_state()
135 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_dmcu_set_psr_enable()
229 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_dmcu_setup_psr()
306 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); in dce_psr_wait_loop()
338 REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dcn10_get_dmcu_version()
360 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_enable_fractional_pwm()
373 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_enable_fractional_pwm()
410 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_init()
428 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_init()
[all …]
Ddce_abm.c66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
106 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, in dmcu_set_backlight_level()
134 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, in dmcu_set_backlight_level()
206 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_level()
Ddce_aux.c139 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 1, in acquire_engine()
150 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 0, in acquire_engine()
214 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0, in submit_channel_request()
343 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1, in get_channel_status()
Ddce_panel_cntl.c261 REG_WAIT(BL_PWM_GRP1_REG_LOCK, in dce_driver_set_backlight()
Ddce_stream_encoder.c91 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in dce110_update_generic_info_packet()
737 REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, in dce110_stream_encoder_set_throttled_vcp_size()
956 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in dce110_stream_encoder_dp_blank()
Ddce_mem_input.c743 REG_WAIT(DMIF_BUFFER_CONTROL, in dce_mi_allocate_dmif()
780 REG_WAIT(DMIF_BUFFER_CONTROL, in dce_mi_free_dmif()
Ddce_opp.c651 REG_WAIT(FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED, 1, 10, 10); in program_formatter_reset_dig_resync_fifo()
Ddce_transform.c228 REG_WAIT(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, 0, 1, 10); in program_multi_taps_filter()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c362 REG_WAIT(DOMAIN16_PG_STATUS, in dcn20_dsc_pg_control()
370 REG_WAIT(DOMAIN17_PG_STATUS, in dcn20_dsc_pg_control()
378 REG_WAIT(DOMAIN18_PG_STATUS, in dcn20_dsc_pg_control()
386 REG_WAIT(DOMAIN19_PG_STATUS, in dcn20_dsc_pg_control()
394 REG_WAIT(DOMAIN20_PG_STATUS, in dcn20_dsc_pg_control()
402 REG_WAIT(DOMAIN21_PG_STATUS, in dcn20_dsc_pg_control()
433 REG_WAIT(DOMAIN1_PG_STATUS, in dcn20_dpp_pg_control()
441 REG_WAIT(DOMAIN3_PG_STATUS, in dcn20_dpp_pg_control()
449 REG_WAIT(DOMAIN5_PG_STATUS, in dcn20_dpp_pg_control()
457 REG_WAIT(DOMAIN7_PG_STATUS, in dcn20_dpp_pg_control()
[all …]
Ddcn20_stream_encoder.c236 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in enc2_update_gsp7_128_info_packet()
493 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); in enc2_stream_encoder_dp_unblank()
Ddcn20_optc.c326 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc2_triplebuffer_lock()
Ddcn20_mpc.c480 REG_WAIT(MPCC_STATUS[id], in mpc2_assert_idle_mpcc()
Ddcn20_hubp.c954 REG_WAIT(DCHUBP_CNTL, in hubp2_set_blank()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c80 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in enc1_update_generic_info_packet()
643 REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, in enc1_stream_encoder_set_throttled_vcp_size()
768 REG_WAIT(DP_SEC_CNTL2, DP_SEC_GSP4_SEND_PENDING, in enc1_stream_encoder_send_immediate_sdp_message()
781 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in enc1_stream_encoder_send_immediate_sdp_message()
824 REG_WAIT(AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE_PENDING, in enc1_stream_encoder_send_immediate_sdp_message()
912 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in enc1_stream_encoder_dp_blank()
Ddcn10_optc.c455 REG_WAIT(OPTC_INPUT_CLOCK_CONTROL, in optc1_enable_optc_clock()
463 REG_WAIT(OTG_CLOCK_CONTROL, in optc1_enable_optc_clock()
528 REG_WAIT(OTG_CLOCK_CONTROL, in optc1_disable_crtc()
648 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc1_lock()
803 REG_WAIT(OTG_STATUS, in optc1_wait_for_state()
809 REG_WAIT(OTG_STATUS, in optc1_wait_for_state()
Ddcn10_hw_sequencer.c555 REG_WAIT(DOMAIN1_PG_STATUS, in dcn10_dpp_pg_control()
563 REG_WAIT(DOMAIN3_PG_STATUS, in dcn10_dpp_pg_control()
571 REG_WAIT(DOMAIN5_PG_STATUS, in dcn10_dpp_pg_control()
579 REG_WAIT(DOMAIN7_PG_STATUS, in dcn10_dpp_pg_control()
607 REG_WAIT(DOMAIN0_PG_STATUS, in dcn10_hubp_pg_control()
615 REG_WAIT(DOMAIN2_PG_STATUS, in dcn10_hubp_pg_control()
623 REG_WAIT(DOMAIN4_PG_STATUS, in dcn10_hubp_pg_control()
631 REG_WAIT(DOMAIN6_PG_STATUS, in dcn10_hubp_pg_control()
Ddcn10_mpc.c108 REG_WAIT(MPCC_STATUS[id], in mpc1_assert_idle_mpcc()
Ddcn10_hubp.c60 REG_WAIT(DCHUBP_CNTL, in hubp1_set_blank()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_optc.c55 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc3_triplebuffer_lock()
114 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc3_lock()
Ddcn30_vpg.c71 REG_WAIT(VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED, in vpg3_update_generic_info_packet()
Ddcn30_mmhubbub.c94 REG_WAIT(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_STATUS, 1, 20, 100); in mmhubbub3_warmup_mcif()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c138 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 1000); in dcn20_update_clocks_update_dentist()
141 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100); in dcn20_update_clocks_update_dentist()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubbub.c101 REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100); in dcn21_dchvm_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h218 #define REG_WAIT(reg_name, field, val, delay_between_poll_us, max_try) \ macro