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Searched refs:SMUIO_BASE (Results 1 – 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dnavi14_reg_init.c47 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in navi14_reg_base_init()
Dnavi12_reg_init.c47 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in navi12_reg_base_init()
Dnavi10_reg_init.c47 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in navi10_reg_base_init()
Dsienna_cichlid_reg_init.c50 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in sienna_cichlid_reg_base_init()
Darct_reg_init.c52 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in arct_reg_base_init()
Dvega10_reg_init.c49 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in vega10_reg_base_init()
Dvega20_reg_init.c48 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); in vega20_reg_base_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h115 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } }, variable
Dnavi12_ip_offset.h158 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0x00440000, 0x02401000, 0 }… variable
Dvega20_ip_offset.h123 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } }, variable
Dnavi14_ip_offset.h158 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0x00440000, 0x02401000, 0 }… variable
Dsienna_cichlid_ip_offset.h165 static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0x00016A00, 0x00440000, 0x02401000, 0 … variable
Dvega10_ip_offset.h193 static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0, 0, 0, 0 } }, variable
Drenoir_ip_offset.h198 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0x02401000, 0x00440000, 0 }… variable
Darct_ip_offset.h199 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } }, variable