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Searched refs:STORE_RT_REG (Results 1 – 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qed/
Dqed_init_fw_funcs.c175 STORE_RT_REG((p_hwfn), QM_REG_TXPQMAP_RT_OFFSET + (pq_id), \
205 STORE_RT_REG(p_hwfn, QM_REG_RLPFENABLE_RT_OFFSET, pf_rl_en ? 1 : 0); in qed_enable_pf_rl()
211 STORE_RT_REG(p_hwfn, in qed_enable_pf_rl()
216 STORE_RT_REG(p_hwfn, in qed_enable_pf_rl()
218 STORE_RT_REG(p_hwfn, in qed_enable_pf_rl()
224 STORE_RT_REG(p_hwfn, in qed_enable_pf_rl()
233 STORE_RT_REG(p_hwfn, QM_REG_WFQPFENABLE_RT_OFFSET, pf_wfq_en ? 1 : 0); in qed_enable_pf_wfq()
237 STORE_RT_REG(p_hwfn, in qed_enable_pf_wfq()
245 STORE_RT_REG(p_hwfn, QM_REG_RLGLBLENABLE_RT_OFFSET, in qed_enable_global_rl()
249 STORE_RT_REG(p_hwfn, in qed_enable_global_rl()
[all …]
Dqed_cxt.c1323 STORE_RT_REG(p_hwfn, CDU_REG_CID_ADDR_PARAMS_RT_OFFSET, cdu_params); in qed_cdu_init_common()
1336 STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT0_PARAMS_RT_OFFSET, cdu_params); in qed_cdu_init_common()
1348 STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT1_PARAMS_RT_OFFSET, cdu_params); in qed_cdu_init_common()
1399 STORE_RT_REG(p_hwfn, rt_type_offset_arr[i], cdu_seg_params); in qed_cdu_init_pf()
1408 STORE_RT_REG(p_hwfn, rt_type_offset_fl_arr[i], cdu_seg_params); in qed_cdu_init_pf()
1447 STORE_RT_REG(p_hwfn, XCM_REG_CON_PHY_Q3_RT_OFFSET, in qed_cm_init_pf()
1458 STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_0_RT_OFFSET, dq_pf_max_cid); in qed_dq_init_pf()
1461 STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_0_RT_OFFSET, dq_vf_max_cid); in qed_dq_init_pf()
1464 STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_1_RT_OFFSET, dq_pf_max_cid); in qed_dq_init_pf()
1467 STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_1_RT_OFFSET, dq_vf_max_cid); in qed_dq_init_pf()
[all …]
Dqed_init_ops.h69 #define STORE_RT_REG(hwfn, offset, val) \ macro
Dqed_dev.c2574 STORE_RT_REG(p_hwfn, PGLUE_REG_B_CACHE_LINE_SIZE_RT_OFFSET, val); in qed_init_cache_line_size()
2576 STORE_RT_REG(p_hwfn, PSWRQ2_REG_DRAM_ALIGN_WR_RT_OFFSET, val); in qed_init_cache_line_size()
2577 STORE_RT_REG(p_hwfn, PSWRQ2_REG_DRAM_ALIGN_RD_RT_OFFSET, val); in qed_init_cache_line_size()
2797 STORE_RT_REG(p_hwfn, NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET, 0); in qed_hw_init_port()
2837 STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_TAG_EN_RT_OFFSET, 1); in qed_hw_init_pf()
2838 STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_TAG_VALUE_RT_OFFSET, in qed_hw_init_pf()
2843 STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_FILTER_HDR_SEL_RT_OFFSET, in qed_hw_init_pf()
2851 STORE_RT_REG(p_hwfn, in qed_hw_init_pf()
2856 STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_TCP_RT_OFFSET, in qed_hw_init_pf()
2858 STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_FCOE_RT_OFFSET, in qed_hw_init_pf()
[all …]
Dqed_int.c1497 STORE_RT_REG(p_hwfn, CAU_REG_PI_MEMORY_RT_OFFSET + pi_offset, in qed_int_cau_conf_pi()
2263 STORE_RT_REG(p_hwfn, IGU_REG_PF_CONFIGURATION_RT_OFFSET, igu_pf_conf); in qed_int_igu_init_rt()
Dqed_sriov.c813 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf); in qed_iov_enable_vf_access()