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Searched refs:UMC_BASE__INST3_SEG0 (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h792 #define UMC_BASE__INST3_SEG0 0 macro
Dnavi12_ip_offset.h1011 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dvega20_ip_offset.h861 #define UMC_BASE__INST3_SEG0 0 macro
Dnavi14_ip_offset.h1011 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dsienna_cichlid_ip_offset.h1060 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dvega10_ip_offset.h1103 #define UMC_BASE__INST3_SEG0 0 macro
Drenoir_ip_offset.h1261 #define UMC_BASE__INST3_SEG0 0 macro
Darct_ip_offset.h1446 #define UMC_BASE__INST3_SEG0 0x00013320 macro