Searched refs:V8 (Results 1 – 25 of 27) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | lochnagar.rst | 33 in1_input Measured voltage for 1V8 DSP (milliVolts)
34 in1_label "1V8 DSP"
35 curr2_input Measured current for 1V8 DSP (milliAmps)
36 curr2_label "1V8 DSP"
37 power2_average Measured average power for 1V8 DSP (microWatts)
39 power2_label "1V8 DSP"
40 in2_input Measured voltage for 1V8 CDC (milliVolts)
41 in2_label "1V8 CDC"
42 curr3_input Measured current for 1V8 CDC (milliAmps)
43 curr3_label "1V8 CDC"
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | bcm2835-rpi-cm1.dtsi | 28 regulator-name = "1V8";
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| D | bcm2837-rpi-cm3.dtsi | 30 regulator-name = "1V8";
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| D | gemini-nas4220b.dts | 110 pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV";
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| D | r8a73a4-ape6evm.dts | 58 regulator-name = "1V8";
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| D | gemini-sl93512r.dts | 222 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
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| D | gemini-sq201.dts | 185 pins = "V8 GMAC0 RXDV";
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| D | gemini-dlink-dns-313.dts | 249 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
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| D | stm32mp15xx-dhcor-avenger96.dtsi | 8 /* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
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| D | am335x-boneblue.dts | 196 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */
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| D | ste-ux500-samsung-skomer.dts | 287 /* Intended for 1V8 for touchscreen but actually left unused */
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| D | gemini-dlink-dir-685.dts | 401 pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV",
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | pcap-regulator.c | 118 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
227 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
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| D | Kconfig | 1029 This driver supports internal regulators (1V1, 1V8, 3V3) in the
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | ezx-pcap.h | 120 #define V8 7 macro
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| /kernel/linux/linux-5.10/tools/perf/Documentation/ |
| D | perf-inject.txt | 65 if you are monitoring environment using JIT runtimes, such as Java, DART or V8.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | phy-stm32-usbphyc.txt | 44 - vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-libretech-cc-v2.dts | 155 regulator-name = "VCC 1V8";
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| D | meson-gxbb-odroidc2.dts | 255 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zcu100-revC.dts | 252 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
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| /kernel/linux/linux-5.10/Documentation/arm64/ |
| D | sve.rst | 454 Z8 | : * V8 |
487 This follows from the way these bits are mapped to V8..V15, which are caller-
511 * V8 | |
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | nvidia,tegra20-sdhci.txt | 59 using pads at 3V3 and 1V8 levels.
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| /kernel/linux/linux-5.10/drivers/eisa/ |
| D | eisa.ids | 611 ICU0220 "Microfield Graphics V8 Video Controller"
1060 ISAE401 "Microfield V8 Color Graphics Controller"
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | Kconfig | 1383 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
1401 as XGI V3XT, V5, V8 and Z7.
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0030_linux_drivers_pci_misc_nvmem_of_mtd_mmc.patch | 13339 - * NEEDS_PAD_CONTROL NVQUIRK is for SoC's having separate 3V3 and 1V8 pads.
13340 - * 3V3/1V8 pad selection happens through pinctrl state selection depending
13410 - * voltage are applicable for SoCs supporting 3V3 and 1V8 pad controls.
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