Searched refs:WM1_LP_SR_EN (Results 1 – 3 of 3) sorted by relevance
3410 results->wm_lp[wm_lp - 1] |= WM1_LP_SR_EN; in ilk_compute_wm_results()3534 if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] & WM1_LP_SR_EN) { in _ilk_disable_lp_wm()3535 previous->wm_lp[2] &= ~WM1_LP_SR_EN; in _ilk_disable_lp_wm()3539 if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] & WM1_LP_SR_EN) { in _ilk_disable_lp_wm()3540 previous->wm_lp[1] &= ~WM1_LP_SR_EN; in _ilk_disable_lp_wm()3544 if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] & WM1_LP_SR_EN) { in _ilk_disable_lp_wm()3545 previous->wm_lp[0] &= ~WM1_LP_SR_EN; in _ilk_disable_lp_wm()6735 I915_WRITE(WM3_LP_ILK, I915_READ(WM3_LP_ILK) & ~WM1_LP_SR_EN); in ilk_init_lp_watermarks()6736 I915_WRITE(WM2_LP_ILK, I915_READ(WM2_LP_ILK) & ~WM1_LP_SR_EN); in ilk_init_lp_watermarks()6737 I915_WRITE(WM1_LP_ILK, I915_READ(WM1_LP_ILK) & ~WM1_LP_SR_EN); in ilk_init_lp_watermarks()
6353 #define WM1_LP_SR_EN (1 << 31) macro
155 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM1_LP_SR_EN; in i915_sr_status()