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Searched refs:_clk (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/include/linux/
Dsh_clk.h200 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } argument
201 #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } argument
202 #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } argument
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Domap_hwmod.c632 } else if (oh->_clk) { in _get_clkdm()
633 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk))) in _get_clkdm()
635 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); in _get_clkdm()
830 oh->_clk = clk; in _init_main_clk()
836 oh->_clk = clk_get(NULL, oh->main_clk); in _init_main_clk()
839 if (IS_ERR(oh->_clk)) { in _init_main_clk()
852 clk_prepare(oh->_clk); in _init_main_clk()
885 os->_clk = c; in _init_interface_clks()
894 clk_prepare(os->_clk); in _init_interface_clks()
922 oc->_clk = c; in _init_opt_clks()
[all …]
Ddisplay.c388 if (oc->_clk) in omap_dss_reset()
389 clk_prepare_enable(oc->_clk); in omap_dss_reset()
415 if (oc->_clk) in omap_dss_reset()
416 clk_disable_unprepare(oc->_clk); in omap_dss_reset()
Domap_hwmod.h181 struct clk *_clk; member
244 struct clk *_clk; member
585 struct clk *_clk; member
/kernel/linux/linux-5.10/drivers/scsi/ufs/
Dufs-exynos.c341 unsigned long clk = 0, _clk, clk_period; in exynos_ufs_calc_pwm_clk_div() local
346 _clk = NSEC_PER_SEC * mult / (clk_period * divs[i] * div); in exynos_ufs_calc_pwm_clk_div()
347 if (_clk >= pwm_min && _clk <= pwm_max) { in exynos_ufs_calc_pwm_clk_div()
348 if (_clk > clk) { in exynos_ufs_calc_pwm_clk_div()
350 clk = _clk; in exynos_ufs_calc_pwm_clk_div()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dcdns,csi2tx.txt15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
Dcdns,csi2rx.txt14 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgm20b.c852 struct gm20b_clk *_clk = gm20b_clk(base); in gm20b_clk_init() local
856 _clk->uv = nvkm_volt_get(volt); in gm20b_clk_init()
859 ret = gm20b_clk_init_dvfs(_clk); in gm20b_clk_init()
/kernel/linux/linux-5.10/drivers/clk/renesas/
Dr9a06g032-clocks.c60 #define I_GATE(_clk, _rst, _rdy, _midle, _scon, _mirack, _mistat) \ argument
61 { .gate = _clk, .reset = _rst, \
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0009_linux_sound.patch4230 + dev_err(dev, "Failed to enable sdma_root _clk ret = %d\n", ret);
/kernel/linux/patches/linux-5.10/hispark_taurus_patch/
Dhispark_taurus.patch32706 +#define CLK_FMC_TO_CRG_MHZ(_clk) ((_clk) * 2000000)
/kernel/linux/patches/linux-4.19/hispark_taurus_patch/
Dhispark_taurus.patch207852 +#define CRG48_FMC_CLK_SEL(_clk) (((_clk) & 0x7) << 2)
208241 +#define CRG48_FMC_CLK_SEL(_clk) (((_clk) & 0x7) << 2)
323653 +#define CLK_FMC_TO_CRG_MHZ(_clk) ((_clk) * 2000000)